1. MT2301
EMBEDDED SYSTEMS AND PROGRAMMING
Dr. K. Kannan, M.E., M.E., Ph.D.,
Professor & Head,
Department of Mechatronics Engineering
2. Preamble
• To familiarize the architecture and
fundamental units of microcontroller.
• To understand the microcontroller
programming methodology
• To acquire the interfacing skills
• To exchange data using various
communication protocols.
3. Unit I – Introduction to Microcontroller (9)
• Fundamentals, Functions of ALU
• Microprocessor, Microcontrollers, CISC and
RISC, Types Microcontroller
• 8051 Family, Architecture, Features and
Specifications
• Memory Organization
• Instruction Sets and Addressing Modes.
4. Unit II – Programming and Communication (9)
Fundamentals of Assembly Language Programming
Instruction to Assembler, Compiler and IDE
C Programming for 8051 Microcontroller
Basic Arithmetic and Logical Programming
Timer and Counter, Interrupts
Interfacing and Programming of Serial Communication, I2C, SPI
and CAN of 8051 Microcontroller
Bluetooth and WI-FI interfacing of 8051 Microcontroller.
5. Unit III – ARM Processor (9)
• Introduction ARM 7 Processor
• Internal Architecture
• Modes of Operations
• Register Set, Instruction Sets
• ARM Thumb, Thumb State Registers
• Pipelining
• Basic programming of ARM 7 - Applications.
7. Unit V – Real Time Operating System (9)
• Real time operating systems Architecture
• Tasks and Task states - Tasks and Data
• Semaphore and shared data
• Message queues, mail boxes and pipes,
• Encapsulating semaphores and queues
• Interrupt routines in an RTOS Environment.
8. Learning Resources
Text Books
1. David E. Simon, An embedded software primer, Addison – Wesley,
Indian Edition Reprint,2009.
2. Kenneth J. Aylala, The 8051 Microcontroller, the Architecture and
Programming Applications, 2003.
Reference Books
1. Muhammad Ali Mazidi and Janice Gillispic Mazdi, The 8051
Microcontroller and Embedded Systems, Pearson Education, 2006.
2. James W. Stewart, The 8051 Microcontroller Hardware, Software and
Interfacing, Regents Prentice Hall, 2003.
9. Outcome
CO. No. Course Outcome K-Level
CO1
Explain the various functional units of microcontroller, processors
and system-on-chip based on the features and specifications.
K2
CO2
Recognize the role of each functional units in microcontroller,
processors and system-on-chip based on the features and
specifications.
K2
CO3 Explain the architecture and Instruction set in ARM Processor K2
CO4
Explain the architecture and fundamental operating concepts
behind PIC Microcontroller
K2
CO5
Summarize the basics of Real time operating system and its
applications.
K2
10. Unit I –
INTRODUCTION TO MICROCONTROLLER
Fundamentals - Functions of ALU -
Microprocessor - Microcontrollers – CISC
and RISC – Types Microcontroller - 8051
Family - Architecture - Features and
Specifications - Memory Organization -
Instruction Sets – Addressing Modes.
11. Microprocessor
The microprocessor
is a programmable
device that takes in
numbers, performs
on them arithmetic
or logical operations
according to the
program stored in
memory and then
produces other
numbers as a result.
13. Microcontroller
A microcontroller is a
compact integrated circuit
designed to govern a
specific operation in
an embedded system. A
typical microcontroller
includes a processor,
memory and input/output
(I/O) peripherals on a
single chip.
17. CISC
• A complex instruction set computer (CISC) is a
microprocessor instruction set architecture (ISA)
in which each instruction can execute several
low-level operations, such as a load from
memory, an arithmetic operation, and a memory
store, all in a single instruction.
18. Main Idea of CISC
• Hardware is always faster than software, therefore
a powerful instruction set may be made to provide
the programmers with assembly instructions to do
a lot with short programs.
• So the primary goal of the CISC is to complete a
task in few lines of assembly instruction as
possible.
19. Memory in those days was expensive
• bigger program->more storage->more money
Hence needed to reduce the number of instructions per program
Number of instructions are reduced by having multiple
operations within a single instruction
Multiple operations lead to many different kinds of
instructions that access memory
• In turn making instruction length variable and fetch-decode
execute time unpredictable – making it more complex
• Thus hardware handles the complexity
Main Idea of CISC
20. Use microcode
• Used a simplified microcode instruction set to control the
data path logic. This type of implementation is known as a
micro programmed implementation.
Build rich instruction sets
• Consequences of using a micro programmed design is that
designers could build more functionality into each
instruction.
Build high-level instruction sets
• The logical next step was to build instruction sets which
map directly from high-level languages
Main Idea of CISC
21. Characteristics of a CISC design
• Register to register, register to memory, and memory to
register commands.
• Uses Multiple addressing modes.
• Variable length instructions where the length often varies
according to the addressing mode
• Instructions which require multiple clock cycles to execute.
22. CISC Vs. RISC
General purpose registers
Arithmetic Logical Unit
Main memory
Memory (1,1) .. (6,4) = 24 locations
Registers: A,B,C,D,E,F
Execution unit : arithmetic ( + -* ÷)
23. Multiplication
Let's say we want to find
the product of two
numbers - one stored in
location 2:3 and another
stored in location 5:2 - and
then store the product
back in the location 2:3.
i.e.,
M(2,3)< - M(5,2)*M(2,3)
2,3
5,2
24. CISC Approach
For this particular task, a CISC
processor would come prepared with a specific instruction (we'll call it "MULT").
MULT A,B When executed, this instruction
loads the two values into separate registers,
multiplies the operands in the execution unit, and then
stores the product in the appropriate register. Thus, the entire task of multiplying
two numbers can be completed with one instruction
MULT is what is known as a "complex instruction."
It operates directly on the computer's memory banks and does not require the
programmer to explicitly call any loading or storing functions.
It closely resembles a command in a higher level language, identical to the C
statement “a = a * b.”
25. RISC Approach
• RISC processors only use simple instructions that can be
executed within one clock cycle.
• The "MULT" command described above could be divided
into three separate commands:
LOAD A, 2:3
LOAD B, 5:2
PROD A, B ("PROD,"finds the product of two operands )
STORE 2:3, A ("STORE,“ moves data from a register to
the memory banks)
(LOAD, which moves data from the memory bank
to a register)
26. CISC RISC
Primary goal is to complete a task in
as few lines of assembly as possible
Emphasis on hardware
Includes multi-clock,
complex instructions
Memory-to-memory:
"LOAD" and "STORE"
incorporated in instructions
Difficult to apply pipelining.
Small code sizes,
high cycles per second
Primary goal is to speedup
individual instruction
Emphasis on software
Single-clock,
reduced instruction only
Register to register:
"LOAD" and "STORE”
are independent instructions
Easy to apply pipelining.
Low cycles per second,
large code sizes
27. The Performance Equation
• The following equation is commonly used for expressing a
computer's performance ability:
Cisc
Risc
The CISC approach attempts to minimize the number of instructions
per program, sacrificing the number of cycles per instruction.
RISC does the opposite, reducing the cycles per instruction at the
cost of the number of instructions per program.
28. Which one is better?
• There is still considerable controversy among experts about which
architecture is better.
Some say that RISC is cheaper and faster and therefore the
architecture of the future.
Others note that by making the hardware simpler, RISC puts a greater
burden on the software. Software needs to become more complex.
Software developers need to write more lines for the same tasks.
29. No Big Difference Now
• RISC and CISC architectures are becoming more and more alike.
• Many of today's RISC chips support just as many instructions as
yesterday's CISC chips. The PowerPC 601, for example, supports more
instructions than the Pentium. Yet the 601 is considered a RISC chip,
while the Pentium is definitely CISC.
• Further more today's CISC chips use many techniques formerly
associated with RISC chips
• So simply said: RISC and CISC are growing to each other
37. Features of 8051
• 4KB bytes on-chip program memory (ROM) and 128 bytes
on-chip data memory (RAM)
• Four register banks
• 8-bit bidirectional data bus and 16-bit unidirectional address
bus
• 32 general purpose registers, each of 8-bit
• 16 bit Timers (usually 2)
• Three internal and two external Interrupts
• Four 8-bit ports
• 16-bit program counter and data pointer
• It has 21 special function register.
• 1 Microsecond instruction cycle with 12 MHz Crystal.
• Multi mode high speed programmable full duplex serial port
• It has 111 instructions, 64 instructions are single cycle.
54. Timer Mode Register
The Gatex bit is used to operate the Timerx with respect to the INTx pin or regardless of the INTx
pin.
GATE1 = 1 ==> Timer1 is operated only if INT1 is SET.
GATE1 = 0 ==> Timer1 is operates irrespective of INT1 pin.
GATE0 = 1 ==> Timer0 is operated only if INT0 is SET.
GATE0 = 0 ==> Timer0 is operates irrespective of INT0 pin.
The C/Tx bit is used selects the source of pulses for the Timer to count.
C/T1 = 1 ==> Timer1 counts pulses from Pin T1 (P3.5) (Counter Mode)
C/T1 = 0 ==> Timer1 counts pulses from internal oscillator (Timer Mode)
C/T0 = 1 ==> Timer0 counts pulses from Pin T0 (P3.4) (Counter Mode)
C/T0 = 0 ==> Timer0 counts pulses from internal oscillator (Timer Mode)
101. Instruction Set
• An instruction is an order or command given
to a processor by a computer program. All
commands are known as instruction set and set
of instructions is known as program.
• 8051 have in total 111 instructions, i.e. 111
different words available for program writing.
102. Instruction Format
• Where first part describes WHAT should be done,
while other explains HOW to do it.
• The latter part can be a data (binary number) or
the address at which the data is stored.
• Depending upon the number of bytes required to
represent 1 instruction completely.
103. Types of Instructions
Instructions are divided into 3 types
1. One/single byte instruction.
2. Two/double byte instruction.
3. Three/triple byte instruction.
104. Types of Instructions
1. One/single byte instructions :
• If operand is not given in the instruction or there
is no digits present with instruction, the
instructions can be completely represented in
one byte opcode.
• OPCODE 8 bit
105. Types of Instructions
2. Two/double byte instruction:
– If 8 bit number is given as operand in the
instruction, the such instructions can be
completed represented in two bytes.
– First byte OPCODE
– Second byte 8 bit data or I/O port
106. Types of Instructions
3. Three/triple byte instruction:
• If 16 bit number is given as operand in the
instructions than such instructions can be
completely represented in three bytes 16 bit
number specified may be data or address.
107. Types of Instructions
1. First byte will be instruction code.
2. Second byte will be 8 LSB’s of 16 bit number.
3. Third byte will be 8 MSB’s of 16 bit number.
• First byte OPCODE.
• Second byte 8 LSB’s of data/address.
• Third byte 8 MSB’S of data/address.
108. Addressing Modes
• Addressing modes specifies where the data
(operand) is. They specify the source or
destination of data (operand) in several
different ways, depending upon the situation.
• Addressing modes are used to know where the
operand located is.
109. Addressing Modes
• There are 5 types of addressing modes:
1. Register addressing.
2. Direct addressing.
3. Register indirect addressing.
4. Immediate addressing.
5. Index addressing.
110. Register Addressing Mode
• In register addressing mode, the source and/or
destination is a register.
• In this case, data is placed in any of the 8
registers(R0-R7). In instructions, it is specified
with letter Rn (where N indicates 0 to 7).
111. Register Addressing Mode
• For example,
1. ADD A, Rn (This is general instruction).
2. ADD A, R5 (This instruction will add the
contents of register R5 with the accumulator
contents).
114. Direct Addressing Mode
• In direct addressing mode, the address of
memory location containing data to be read is
specified in instruction.
• In this case, address of the data is given with
the instruction itself.
115. Direct Addressing Mode
• For example,
MOV A, 25H
(This instruction will read/move the data from
internal RAM address 25H and store it in the
accumulator).
116. Register Indirect Addressing Mode
• In register indirect addressing mode, the
contents of the designated register are used as
a pointer to memory.
• In this case, data is placed in memory, but
address of memory location is not given
directly with instruction.
117. Register Indirect Addressing Mode
• For example,
MOV A,@R0 This instruction moves the data
from the register whose address is in the R0
register into the accumulator.
118. Immediate Addressing Mode
• In immediate addressing mode, the data is
given with the instruction itself.
• In this case, the data to be stored in memory
immediately follows the opcode.
122. Indexed Addressing Mode
• Offset (from accumulator) is added to the base
index register( DPTR OR Program Counter) to
form the effective address of the memory
location.
• In this case, this mode is made for reading
tables in the program memory.
123. Indexed Addressing Mode
For example,
MOVC A, @ A + DPTR ( This instruction
moves the data from the memory to accumulator;
whose address is computed by adding the
contents of accumulator and DPTR)
125. Types Of Instructions
1. Data transfer instructions.
2. Arithmetic instructions.
3. Logical instructions.
4. Logical instructions with bits.
5. Branch instructions.
126. Data Transfer Instructions
• These instructions move the content of one
register to another one.
• Data can be transferred to stack with the help
of PUSH and POP instructions.
130. Arithmetic Instructions
• These instructions perform several basic
operations. After execution, the result is stored
in the first operand.
• 8 bit addition, subtraction, multiplication,
increment-decrement instructions can be
performed.
140. Logical Instructions
These instructions perform logical operations
between two register contents on bit by bit basis.
After execution, the result is stored in the first
operand.
145. Logical Instructions On Bits
MNEMONIC DESCRIPTION BYTE
CLR C ( C = 0 ) 1
CLR bit clear directly addressed bit 2
SETB C ( C = 1 ) 1
146. Logical Instructions On Bits
SETB bit Set directly 2
addressed bit
CPL C (1 = 0, 0 = 1) 1
CPL bit Complement directly 2
addressed bit
147. Program Flow Control Instructions
In this group, instructions are related to the flow
of the program, these are used to control the
operation like, JUMP and CALL instructions.
Some instructions are used to introduce delay in
the program, to the halt program.