This slide contain the description about the various technique related to parallel Processing(vector Processing and array processor), Arithmetic pipeline, Instruction Pipeline, SIMD processor, Attached array processor
Pipelining is an speed up technique where multiple instructions are overlapped in execution on a processor. It is an important topic in Computer Architecture.
This slide try to relate the problem with real life scenario for easily understanding the concept and show the major inner mechanism.
(Ref : Computer System Architecture by Morris Mano 3rd edition) : Microprogrammed Control unit, micro instructions, micro operations, symbolic and binary microprogram.
In these slides the registration organization and stack organization have discussed in detail. Stack organization is discussed with the aid of animation to let the user understand it in a better and easy way.
This is a brief introductory lecture I conducted on von Neumann Architecture. Von Neumann is a fundamental computer hardware architecture based on the store program concept, designed by John von Neumann.
Multiprocessor system is an interconnection of two or more CPUs with memory and input-output equipment
The components that forms multiprocessor are CPUs IOPs connected to input –output devices , and memory unit that may be partitioned into a number of separate modules.
Multiprocessor are classified as multiple instruction stream, multiple data stream (MIMD) system.
Pipelining is an speed up technique where multiple instructions are overlapped in execution on a processor. It is an important topic in Computer Architecture.
This slide try to relate the problem with real life scenario for easily understanding the concept and show the major inner mechanism.
(Ref : Computer System Architecture by Morris Mano 3rd edition) : Microprogrammed Control unit, micro instructions, micro operations, symbolic and binary microprogram.
In these slides the registration organization and stack organization have discussed in detail. Stack organization is discussed with the aid of animation to let the user understand it in a better and easy way.
This is a brief introductory lecture I conducted on von Neumann Architecture. Von Neumann is a fundamental computer hardware architecture based on the store program concept, designed by John von Neumann.
Multiprocessor system is an interconnection of two or more CPUs with memory and input-output equipment
The components that forms multiprocessor are CPUs IOPs connected to input –output devices , and memory unit that may be partitioned into a number of separate modules.
Multiprocessor are classified as multiple instruction stream, multiple data stream (MIMD) system.
pipelining is the concept of decomposing the sequential process into number of small stages in which each stage execute individual parts of instruction life cycle inside the processor.
Parallel computing and its applicationsBurhan Ahmed
Parallel computing is a type of computing architecture in which several processors execute or process an application or computation simultaneously. Parallel computing helps in performing large computations by dividing the workload between more than one processor, all of which work through the computation at the same time. Most supercomputers employ parallel computing principles to operate. Parallel computing is also known as parallel processing.
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In this paper we describe paradigms for building and designing parallel computing machines. Firstly we
elaborate the uniqueness of MIMD model for the execution of diverse applications. Then we compare the
General Purpose Architecture of Parallel Computers with Special Purpose Architecture of Parallel
Computers in terms of cost, throughput and efficiency. Then we describe how Parallel Computer
Architecture employs parallelism and concurrency through pipelining. Since Pipelining improves the
performance of a machine by dividing an instruction into a number of stages, therefore we describe how
the performance of a vector processor is enhanced by employing multi pipelining among its processing
elements. Also we have elaborated the RISC architecture and Pipelining in RISC machines After comparing
RISC computers with CISC computers we observe that although the high speed of RISC computers is very
desirable but the significance of speed of a computer is dependent on implementation strategies. Only CPU
clock speed is not the only parameter to move the system software from CISC to RISC computers but the
other parameters should also be considered like instruction size or format, addressing modes, complexity of
instructions and machine cycles required by instructions. Considering all parameters will give performance
gain . We discuss Multiprocessor and Data Flow Machines in a concise manner. Then we discuss three
SIMD (Single Instruction stream Multiple Data stream) machines which are DEC/MasPar MP-1, Systolic
Processors and Wavefront array Processors. The DEC/MasPar MP-1 is a massively parallel SIMD array
processor. A wide variety of number representations and arithmetic systems for computers can be
implemented easily on the DEC/MasPar MP-1 system. The principal advantages of using such 64×64
SIMD array of 4-bit processors for the implementation of a computer arithmetic laboratory arise out of its
flexibility. After comparison of Systolic Processors with Wave front Processors we found that both of the
Systolic Processors and Wave front Processors are fast and implemented in VLSI. The major drawback of
Systolic Processors is the problem of availability of inputs when clock ticks because of propagation delays
in connection buses. The Wave front Processors combine the Systolic Processor architecture with Data
Flow machine architecture. Although the Wave front processors use asynchronous data flow computing
structure, the timing in the interconnection buses, at input and at output is not problematic..
Model Attribute Check Company Auto PropertyCeline George
In Odoo, the multi-company feature allows you to manage multiple companies within a single Odoo database instance. Each company can have its own configurations while still sharing common resources such as products, customers, and suppliers.
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The people of Punjab felt alienated from main stream due to denial of their just demands during a long democratic struggle since independence. As it happen all over the word, it led to militant struggle with great loss of lives of military, police and civilian personnel. Killing of Indira Gandhi and massacre of innocent Sikhs in Delhi and other India cities was also associated with this movement.
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1. Parallel Processing, Flynn’s Classification of
Computers
Pipelining
Instruction Pipeline
Pipeline Hazards and their solution
Array and Vector Processing
Pipelining and Vector
Processing
2. Parallel Processing
It refers to techniques that are used to provide
simultaneous data processing.
The system may have two or more ALUs to be able to
execute two or more instruction at the same time.
The system may have two or more processors
operating concurrently.
It can be achieved by having multiple functional
units that perform same or different operation
simultaneously.
3.
4. Classification
There are variety of ways in which the parallel
processing can be classified
Internal Organization of Processor
Interconnection structure between processors
Flow of information through system
5. M.J. Flynn classify the computer on the basis of
number of instruction and data items processed
simultaneously.
Single Instruction Stream, Single Data Stream(SISD)
Single Instruction Stream, Multiple Data Stream(SIMD)
Multiple Instruction Stream, Single Data Stream(MISD)
Multiple Instruction Stream, Multiple Data Stream(MIMD)
6. SISD represents the organization containing single
control unit, a processor unit and a memory unit.
Instruction are executed sequentially and system
may or may not have internal parallel processing
capabilities.
SIMD represents an organization that includes many
processing units under the supervision of a common
control unit.
7. MISD structure is of only theoretical interest since
no practical system has been constructed using this
organization.
MIMD organization refers to a computer system
capable of processing several programs at the same
time.
8. Flynn’s classification emphasize on the behavioral
characteristics of the computer system rather than
its operational and structural interconnections. One
type of parallel processing that does not fit in the
Flynn’s classification is Pipelining.
Parallel Processing can be discussed under following
topics:
Pipeline Processing
Vector Processing
Array Processors
9. Pipelining
It is a technique of decomposing a sequential process
into sub operations, with each sub process being
executed in a special dedicated segments that
operates concurrently with all other segments.
Each segment performs partial processing dictated
by the way task is partitioned.
The result obtained from each segment is transferred
to next segment.
The final result is obtained when data have passed
through all segments.
10. Example
Suppose we have to perform the following task:
Each sub operation is to be performed in a segment
within a pipeline. Each segment has one or two
registers and a combinational circuit.
11. The sub operations in each segment of the pipeline
are as follows:
12.
13.
14. General Consideration
Let us consider the case where k segments pipeline
with a clock cycle time tp is used to execute n tasks.
The first task T1 require time ktp to complete since
there are k segments.
The remaining (n-1) tasks emerge from pipe at the
rate one task per cycle. They will complete after time
(n-1)tp.
So total time required is k+(n-1) clock cycles.
Calculate total cycles in previous example.
15. Now consider non pipeline unit that performs the
same operation and takes time equal to tn to
complete each task.
Total time required is ntn.
The speedup ration is given as:
16.
17. Arithmetic Pipeline
Pipeline arithmetic units are usually found in very
high speed computers.
They are used to implement floating point
operations.
We will now discuss the pipeline unit for the floating
point addition and subtraction.
18. The inputs to floating point adder pipeline are two
normalized floating point numbers.
A and B are mantissas and a and b are the
exponents.
The floating point addition and subtraction can be
performed in four segments.
19. The sub-operation performed in each segments are:
Compare the exponents
Align the mantissas
Add or subtract the mantissas
Normalize the result
20.
21. Instruction Pipeline
Pipeline processing can occur not only in the data
stream but in the instruction stream as well.
An instruction pipeline reads consecutive instruction
from memory while previous instruction are being
executed in other segments.
This caused the instruction fetch and execute
segments to overlap and perform simultaneous
operation.
22. Four Segment CPU Pipeline
FI segment fetches the instruction.
DA segment decodes the instruction and calculate
the effective address.
FO segment fetches the operand.
EX segment executes the instruction.
23.
24.
25.
26. Handling Data Dependency
This problem can be solved in the following ways:
Hardware interlocks: It is the circuit that detects the
conflict situation and delayed the instruction by sufficient
cycles to resolve the conflict.
Operand Forwarding: It uses the special hardware to
detect the conflict and avoid it by routing the data
through the special path between pipeline segments.
Delayed Loads: The compiler detects the data conflict and
reorder the instruction as necessary to delay the loading
of the conflicting data by inserting no operation
instruction.
27. Handling of Branch Instruction
Pre fetch the target instruction.
Branch target buffer(BTB) included in the fetch
segment of the pipeline
Branch Prediction
Delayed Branch
28. RISC Pipeline
Simplicity of instruction set is utilized to implement
an instruction pipeline using small number of sub-
operation, with each being executed in single clock
cycle.
Since all operation are performed in the register,
there is no need of effective address calculation.
29. Three Segment Instruction Pipeline
I: Instruction Fetch
A: ALU Operation
E: Execute Instruction
33. Delayed Branch
Let us consider the program having the following 5
instructions
34.
35.
36. Vector Processing
There is a class of computational problems that are
beyond the capabilities of the conventional
computer.
These are characterized by the fact that they require
vast number of computation and it take a
conventional computer days or even weeks to
complete.
Computers with vector processing are able to handle
such instruction and they have application in
following fields:
37. Long range weather forecasting
Petroleum exploration
Seismic data analysis
Medical diagnosis
Aerodynamics and space simulation
Artificial Intelligence and expert system
Mapping the human genome
Image Processing
38. Vector Operation
A vector V of length n is represented as row vector by
The element Vi of vector V is written as V(I) and the
index I refers to a memory address or register where
the number is stored.
39. Let us consider the program in assembly language
that two vectors A and B of length 100 and put the
result in vector C.
40. A computer capable of vector processing eliminates
the overhead associated with the time it takes to
fetch and execute the instructions in the program
loop.
It allows operations to be specified with a single
vector instruction of the form:
43. This requires three multiplication and(after
initializing c11 to 0) three addition.
Total number of addition or multiplication required
is 3*9.
In general inner product consists of the sum of k
product terms of the form:
44. In typical application value of k may be 100 or even
1000.
The inner product calculation on a pipeline vector
processor is shown below.
Floating point adder and multiplier are assumed to
have four segments each.
45.
46. The four partial sum are added to form the final sum
48. Array Processor
An array processor is a processor that performs the
computations on large arrays of data.
There are two different types of array processor:
Attached Array Processor
SIMD Array Processor
49. Attached Array Processor
It is designed as a peripheral for a conventional host
computer.
Its purpose is to enhance the performance of the
computer by providing vector processing.
It achieves high performance by means of parallel
processing with multiple functional units.
50.
51. SIMD Array Processor
It is processor which consists of multiple processing
unit operating in parallel.
The processing units are synchronized to perform
the same task under control of common control unit.
Each processor elements(PE) includes an ALU , a
floating point arithmetic unit and working register.