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FINAL TERM PRESENTATION
on
“MULTI-THRESHOLD”
SUB:- VLSI CIRCUIT DESIGN
SEC:-[E]
Prepared For
TAWSIF IBNE ALAM
Faculty of EEE Department
Group members :-
Name ID
KABIR, SHARIF RAIHAN 12-21365-2
HASAN, ASIF MAHMUD 12-21535-2
ALAM, MIM SHAH NEWAJ 12-21951-2
OUTLINE:
• INTRODUCTION.
• DIAGRAM.
• METHODOLOGY.
• APPLICATIONS.
• REFERENCE.
INTRODUCTION
• Multi-threshold is one kind of CMOS which is a deviation in
the chip technology.
• It has transistor with multiple threshold voltages in order to
optimize delay or power.
• It can achieve a lower threshold voltage, and therefore, higher
performance as well as smaller standby leakage current.
• Simple threshold of making MOS with multiple threshold
voltages is to apply different bias voltage to the body or
substrate terminal of the transistors.
• It enables high performance and low power operation, but
requires sequential circuit structures that can retain state
during standby modes.
SCHEMATIC DIAGRAM OF MTCMOS:
PMOS & NMOS INSERTION MTCMOS:
METHODOLOGY:
• The MTCMOS technique uses a different apart from conventional
sleep transistor approach for reducing power dissipation.
• The MTCMOS technique reduces the power dissipation by
maintaining the different properties which are responsible for it;
some of them are as electron movement in ground and supply
wire.
• This technique uses sleep transistor but with different
characteristics, it uses a set of high threshold sleep transistors i.e.
PMOS and NMOS .
• When this high threshold transistors are turned off then a very low
sub threshold leakage current passes from Vdd to ground.
• In the case of both the input are different it gives the strong high
output wher as n the case of both logic high and low it give a strong
low output.
APPLICATIONS:
• Mobile Applications:
• Mostly in the idle state.
• Sub-threshold leakage current.
• Power Gating:
 Low Vth Transistors for High performance Logic
Gates.
 High Vth Transistor for Low Leakage Current Gates.
REFERENCES
[1] www.google.com/question _VLSI/
[2] www.geni.org/
[3] www.energypedia.info/
[4] www.eschooltoday.com/ MULTI THRESHOLD
.
ANY QUARIES
For further information email: join2sharif@gmail.com
THANK YOU.
For further information email: join2sharif@gmail.com

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MULTI Threshold

  • 2. Prepared For TAWSIF IBNE ALAM Faculty of EEE Department Group members :- Name ID KABIR, SHARIF RAIHAN 12-21365-2 HASAN, ASIF MAHMUD 12-21535-2 ALAM, MIM SHAH NEWAJ 12-21951-2
  • 3. OUTLINE: • INTRODUCTION. • DIAGRAM. • METHODOLOGY. • APPLICATIONS. • REFERENCE.
  • 4. INTRODUCTION • Multi-threshold is one kind of CMOS which is a deviation in the chip technology. • It has transistor with multiple threshold voltages in order to optimize delay or power. • It can achieve a lower threshold voltage, and therefore, higher performance as well as smaller standby leakage current. • Simple threshold of making MOS with multiple threshold voltages is to apply different bias voltage to the body or substrate terminal of the transistors. • It enables high performance and low power operation, but requires sequential circuit structures that can retain state during standby modes.
  • 6. PMOS & NMOS INSERTION MTCMOS:
  • 7. METHODOLOGY: • The MTCMOS technique uses a different apart from conventional sleep transistor approach for reducing power dissipation. • The MTCMOS technique reduces the power dissipation by maintaining the different properties which are responsible for it; some of them are as electron movement in ground and supply wire. • This technique uses sleep transistor but with different characteristics, it uses a set of high threshold sleep transistors i.e. PMOS and NMOS . • When this high threshold transistors are turned off then a very low sub threshold leakage current passes from Vdd to ground. • In the case of both the input are different it gives the strong high output wher as n the case of both logic high and low it give a strong low output.
  • 8. APPLICATIONS: • Mobile Applications: • Mostly in the idle state. • Sub-threshold leakage current.
  • 9. • Power Gating:  Low Vth Transistors for High performance Logic Gates.  High Vth Transistor for Low Leakage Current Gates.
  • 10. REFERENCES [1] www.google.com/question _VLSI/ [2] www.geni.org/ [3] www.energypedia.info/ [4] www.eschooltoday.com/ MULTI THRESHOLD .
  • 11. ANY QUARIES For further information email: join2sharif@gmail.com
  • 12. THANK YOU. For further information email: join2sharif@gmail.com