This document describes a proposed low power and high speed voltage sense amplifier circuit. The circuit replaces the back-to-back inverters in a previous design with a dual input single output differential amplifier. This modification improves noise immunity and reduces delay and power consumption. Simulation results show a 24% reduction in delay and 23% reduction in energy usage compared to the previous circuit, while maintaining the same offset voltage. The circuit is designed using a 180nm CMOS process at 1.8V.
The Approach on Influence of Biasing Circuit in Wideband Low Noise Amplifier ...IJEACS
This proposed work investigates the effects of biasing
circuit in the ultra-wideband microwave low noise amplifier
which operates between 3GHz to 10GHz. The complete circuit is
visualized the importance of every component in the design with
respect to linear measurements like Gain, Noise Figure, Return
loss under unconditionally stable condition. The design and
realization are made by using Hybrid Microwave integrated
circuit in AWR microwave office. The thing that is absolutely
necessary and frequently the difficult step in the design of an
LNA is 'biasing circuit design'. The difficulty situation arises
because traditional methods LNA by using S-parameters data
files in EDA tools provides almost all linear measurements.
Hence a number of time consuming iterations of different biasing
circuits with optimization methods may be required to reach
targeted specifications with the fixed operating point at the
desired points in the load line. Considering this behavior, various
alternate biasing circuit schemes are prepared and founded the
results associated with it. Furthermore, this paper unmistakably
clarifies the impacts of the biasing circuit by utilizing
intermodulation and harmonics distortion technique for
portrayal characterization. Different cases and sorts of the
biasing circuits with various biasing focuses have been tested and given clear perspective of the biasing ideas.
Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FP...IJECEIAES
This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse generated using matlab.
AVTS Approach To Digital CMOS Circuits For Diminishing Complete Power Expendi...IJRES Journal
Power utilization of present Digital integrated circuits escalating with each generation which becomes a serious design issue. This paper wished-for a generalized power tracking algorithm that reduces power directly by forceful control of supply voltage and body bias. The AVTS algorithm-(Active Voltage and Threshold Scaling algorithm) save the outflow power for the period of Active mode of the circuit. Total Active power can be diminishing by adjusting Vdd and Vth based on circuit operating environment such as hotness, operation load, and circuit structural design. The power saving method of AVTS is similar to that of the Active Voltage Scaling (AVS) scheme, which adaptively changes the supply voltage depending on the current function of the system. For the circuits, and it is possible to trade off active and sub threshold outflow power by balancing between Vdd and Vth to maintain performance
The Approach on Influence of Biasing Circuit in Wideband Low Noise Amplifier ...IJEACS
This proposed work investigates the effects of biasing
circuit in the ultra-wideband microwave low noise amplifier
which operates between 3GHz to 10GHz. The complete circuit is
visualized the importance of every component in the design with
respect to linear measurements like Gain, Noise Figure, Return
loss under unconditionally stable condition. The design and
realization are made by using Hybrid Microwave integrated
circuit in AWR microwave office. The thing that is absolutely
necessary and frequently the difficult step in the design of an
LNA is 'biasing circuit design'. The difficulty situation arises
because traditional methods LNA by using S-parameters data
files in EDA tools provides almost all linear measurements.
Hence a number of time consuming iterations of different biasing
circuits with optimization methods may be required to reach
targeted specifications with the fixed operating point at the
desired points in the load line. Considering this behavior, various
alternate biasing circuit schemes are prepared and founded the
results associated with it. Furthermore, this paper unmistakably
clarifies the impacts of the biasing circuit by utilizing
intermodulation and harmonics distortion technique for
portrayal characterization. Different cases and sorts of the
biasing circuits with various biasing focuses have been tested and given clear perspective of the biasing ideas.
Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FP...IJECEIAES
This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse generated using matlab.
AVTS Approach To Digital CMOS Circuits For Diminishing Complete Power Expendi...IJRES Journal
Power utilization of present Digital integrated circuits escalating with each generation which becomes a serious design issue. This paper wished-for a generalized power tracking algorithm that reduces power directly by forceful control of supply voltage and body bias. The AVTS algorithm-(Active Voltage and Threshold Scaling algorithm) save the outflow power for the period of Active mode of the circuit. Total Active power can be diminishing by adjusting Vdd and Vth based on circuit operating environment such as hotness, operation load, and circuit structural design. The power saving method of AVTS is similar to that of the Active Voltage Scaling (AVS) scheme, which adaptively changes the supply voltage depending on the current function of the system. For the circuits, and it is possible to trade off active and sub threshold outflow power by balancing between Vdd and Vth to maintain performance
An adaptive protection scheme to prevent recloser-fuse miscoordination in dis...iosrjce
IOSR Journal of Electrical and Electronics Engineering(IOSR-JEEE) is a double blind peer reviewed International Journal that provides rapid publication (within a month) of articles in all areas of electrical and electronics engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electrical and electronics engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
High Voltage Gain with low Current Stress Interleaved Boost Converter for Pho...Premier Publishers
A novel two stage interleaved boost converter (IBC) is investigated. In the proposed topology the advantages of IBC like current sharing, high voltage gain and less voltage and current stress on the switches are more effective. The stand-alone PV system is installed at a convenient place. The output of battery is given to proposed converter. The prototype hardware is developed without isolation transformer to drive the load about 600W with the use of pulse width modulated integrated circuits (PWM ICs) and the efficiency about 93%.
Power quality issues are the most concerned area for electrical engineers in these modern days due to indusrtrialization and advancements in electronics. Harmonics are one of the power quality issues that deteriorated the quality of source components delivered to load. Active power filters (APF) are the compensating devices used to mitigate harmonics. Distributed generation (DG) became a trendline due to economical, technical and environmental reasons. This paper presents the harmonic compensation using dual APF sharing compensating signals while active power is fed from distributed generation to grid. DG inverter acts as an interface between DG system and grid to feed active power from DG to grid. In this context, the DG inverter acts both as inverter and APF, used as inverter to invert supply from DG and feeds grid for specified time and also as APF for harmonic compensation thereafter along with dual APF. The proposed system is developed and results are obtained using MATLAB/SIMULINK software. Results are shown for DG inverter feeding active power to grid and also acting as APF. Dual APF characteristics are also shown.
Efficient Design of Differential Trans- Conductance Amplifier with Sub-Thresh...IJEEE
In this paper, a low voltage differential CMOS trans-conductance amplifier using 180nm on cadence is presented. This design operates in sub threshold region of ±0.5V-1.5V and biasing stabilization has been checked by observing relationship between differential voltage and biasing variations on Nano-scale. Simulation results shows maximum differential output is obtained when biasing current reaches 500nA with CMRR 88db and static power consumption on normal input conditions is 241nW. In this paper, layout of OTA has been presented after verifying DRC and LVS by using assura tool of cadence suite.
A Comparative Study Of Low Power Consumption Techniques In A VLSI CircuitIJERA Editor
Power optimization has become an important factor in designing a VLSI circuit. Earlier dynamic power was single largest concern but as transistor size decreases static power dominates the dynamic power. A comparable analysis of different low power, leakage current reduction techniques like sleep, stack, sleepy keeper and reverse body bias with sleep and stack has been done. Based on simulations performed on a XNOR circuit, the reverse body with sleep and stack achieves up to 60% less power consumption as compared to the base case which is better than other conventional techniques. Simulations to estimate power consumption are done on a TANNER EDA tool at 90 nm technology.
Area Efficient Pulsed Clock Generator Using Pulsed Latch Shift RegisterIJMTST Journal
Shift Registers are building blocks used for the storage of data in many devices. Currently, Flip flops which have been used in Shift Registers consume more Power and impose a heavy load on Clock distribution networks. The Proposed work overcomes the Power consumption and reduces the delay by using the Pulsed Latches instead of the Flip flops. Conventional Latches-Static differential Sense Amplifier Shared Pulse Latch (SSASPL) has been used where the number of Transistors has been reduced. Trigger generator is used to give non overlap clock signals to the memory elements, which reduced the delay and produced the fast implementation of the data. The Power consumed reduces by 27% and delay reduces by 21% when compared to the Shift Registers using Flip flops.
Sigma-Delta Analog-to-Digital converter (ADC), is widely used in portable electronic products. An operational
transconductance amplifier (OTA) is one of the most important components of ADC. This paper presents a
new design of two stages OTA. The design incorporates Sleep insertion technique and leakage feedback current
approach for improving design parameters such as gain, and power as compared to earlier work. The design is
simulated in 0.18µm CMOS technology with supply voltage 1.8V.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
An adaptive protection scheme to prevent recloser-fuse miscoordination in dis...iosrjce
IOSR Journal of Electrical and Electronics Engineering(IOSR-JEEE) is a double blind peer reviewed International Journal that provides rapid publication (within a month) of articles in all areas of electrical and electronics engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electrical and electronics engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
High Voltage Gain with low Current Stress Interleaved Boost Converter for Pho...Premier Publishers
A novel two stage interleaved boost converter (IBC) is investigated. In the proposed topology the advantages of IBC like current sharing, high voltage gain and less voltage and current stress on the switches are more effective. The stand-alone PV system is installed at a convenient place. The output of battery is given to proposed converter. The prototype hardware is developed without isolation transformer to drive the load about 600W with the use of pulse width modulated integrated circuits (PWM ICs) and the efficiency about 93%.
Power quality issues are the most concerned area for electrical engineers in these modern days due to indusrtrialization and advancements in electronics. Harmonics are one of the power quality issues that deteriorated the quality of source components delivered to load. Active power filters (APF) are the compensating devices used to mitigate harmonics. Distributed generation (DG) became a trendline due to economical, technical and environmental reasons. This paper presents the harmonic compensation using dual APF sharing compensating signals while active power is fed from distributed generation to grid. DG inverter acts as an interface between DG system and grid to feed active power from DG to grid. In this context, the DG inverter acts both as inverter and APF, used as inverter to invert supply from DG and feeds grid for specified time and also as APF for harmonic compensation thereafter along with dual APF. The proposed system is developed and results are obtained using MATLAB/SIMULINK software. Results are shown for DG inverter feeding active power to grid and also acting as APF. Dual APF characteristics are also shown.
Efficient Design of Differential Trans- Conductance Amplifier with Sub-Thresh...IJEEE
In this paper, a low voltage differential CMOS trans-conductance amplifier using 180nm on cadence is presented. This design operates in sub threshold region of ±0.5V-1.5V and biasing stabilization has been checked by observing relationship between differential voltage and biasing variations on Nano-scale. Simulation results shows maximum differential output is obtained when biasing current reaches 500nA with CMRR 88db and static power consumption on normal input conditions is 241nW. In this paper, layout of OTA has been presented after verifying DRC and LVS by using assura tool of cadence suite.
A Comparative Study Of Low Power Consumption Techniques In A VLSI CircuitIJERA Editor
Power optimization has become an important factor in designing a VLSI circuit. Earlier dynamic power was single largest concern but as transistor size decreases static power dominates the dynamic power. A comparable analysis of different low power, leakage current reduction techniques like sleep, stack, sleepy keeper and reverse body bias with sleep and stack has been done. Based on simulations performed on a XNOR circuit, the reverse body with sleep and stack achieves up to 60% less power consumption as compared to the base case which is better than other conventional techniques. Simulations to estimate power consumption are done on a TANNER EDA tool at 90 nm technology.
Area Efficient Pulsed Clock Generator Using Pulsed Latch Shift RegisterIJMTST Journal
Shift Registers are building blocks used for the storage of data in many devices. Currently, Flip flops which have been used in Shift Registers consume more Power and impose a heavy load on Clock distribution networks. The Proposed work overcomes the Power consumption and reduces the delay by using the Pulsed Latches instead of the Flip flops. Conventional Latches-Static differential Sense Amplifier Shared Pulse Latch (SSASPL) has been used where the number of Transistors has been reduced. Trigger generator is used to give non overlap clock signals to the memory elements, which reduced the delay and produced the fast implementation of the data. The Power consumed reduces by 27% and delay reduces by 21% when compared to the Shift Registers using Flip flops.
Sigma-Delta Analog-to-Digital converter (ADC), is widely used in portable electronic products. An operational
transconductance amplifier (OTA) is one of the most important components of ADC. This paper presents a
new design of two stages OTA. The design incorporates Sleep insertion technique and leakage feedback current
approach for improving design parameters such as gain, and power as compared to earlier work. The design is
simulated in 0.18µm CMOS technology with supply voltage 1.8V.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Implementation and analysis of power reduction in 2 to 4 decoder design using...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal1
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate
goal for such application is to reach high performance and low cost, and between high performance and
low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the
specification requirements of the desired.
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate goal for such application is to reach high performance and low cost, and between high performance and low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate
goal for such application is to reach high performance and low cost, and between high performance and
low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the
specification requirements of the desired
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate
goal for such application is to reach high performance and low cost, and between high performance and
low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
Low Power SI Class E Power Amplifier and Rf Switch for Health Careieijjournal1
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software. And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate goal for such application is to reach high performance and low cost, and between high performance and low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
An improved design of CMOS dynamic latch comparator with dual input dual output with a simple
design of three stages is represented. The basic disadvantages of latch type comparators are overcome by
producing an edge triggered comparison. The circuit is designed for a resolution of 300nV and the power
consumption is reduced to 450uW. It is designed for 1.8V DC supply voltage and 1 MHz clock frequency for
PVT variations. The simulation of the comparator is done in Cadence® Virtuoso Analog Design Environment
using 180nm technology. The error quotient is reduced less than 5% by adding a buffer stage. The delay is
brought down to 5nS. The active area appreciably is reduced. Layout of the proposed comparator has been
simulated in Cadence® Virtuoso Layout XL Design Environment. DRC and LVS have been verified.
Design and Implementation of Low Power 3-Bit Flash ADC Using 180nm CMOS Techn...IJERA Editor
Analog-to-digital converter has become a very important device in today’s digitized world as they have a very
wide variety of applications. Among all the ADC’s available, the Flash ADC is the fastest one but a main
disadvantage of Flash ADC is its power consumption. So, this paper aims at implementing a low power high
speed Flash ADC. A 3-bit Flash ADC has been designed using CMOS technology. A two stage open loop
comparator and a priority encoder have been implemented using which the ADC has been designed. All the
circuits are simulated using 180nm technology in Tanner EDA environment. The supply voltage Vdd is
1.8v.Analog output of each comparator depending upon the comparison between the input and the reference
voltage is fed to the encoder and finally the compressed digital output is obtained. The power dissipation of
each circuit implemented is calculated individually including other parameters like are, resolution gain and
speed.
Design, Simulation and Hardware Implementation of a Multi Device Interleaved ...IJPEDS-IAES
This paper presents the analysis and implementation of a two-phase Multi Device Interleaved Boost Converter (MDIBC). Among the various DC-DC topologies, Multi device Interleaved converter is considered as a better solution for fuel cell hybrid vehicles as it reduces the input current ripple, output voltage ripple and the size of passive components. Detailed analysis has been done to investigate the benefits of Multi device Interleaved boost converter by comparing it with the conventional Interleaved boost converter topology. Moreover, in this paper, power loss analysis (switching loss, conduction loss, inductor loss) of the proposed converter has been performed. Simulation study of Multi device interleaved converter has been studied using MATLAB/SIMULINK. Hardware prototype is built to validate the results.
Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
Courier management system project report.pdfKamal Acharya
It is now-a-days very important for the people to send or receive articles like imported furniture, electronic items, gifts, business goods and the like. People depend vastly on different transport systems which mostly use the manual way of receiving and delivering the articles. There is no way to track the articles till they are received and there is no way to let the customer know what happened in transit, once he booked some articles. In such a situation, we need a system which completely computerizes the cargo activities including time to time tracking of the articles sent. This need is fulfilled by Courier Management System software which is online software for the cargo management people that enables them to receive the goods from a source and send them to a required destination and track their status from time to time.
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxR&R Consult
CFD analysis is incredibly effective at solving mysteries and improving the performance of complex systems!
Here's a great example: At a large natural gas-fired power plant, where they use waste heat to generate steam and energy, they were puzzled that their boiler wasn't producing as much steam as expected.
R&R and Tetra Engineering Group Inc. were asked to solve the issue with reduced steam production.
An inspection had shown that a significant amount of hot flue gas was bypassing the boiler tubes, where the heat was supposed to be transferred.
R&R Consult conducted a CFD analysis, which revealed that 6.3% of the flue gas was bypassing the boiler tubes without transferring heat. The analysis also showed that the flue gas was instead being directed along the sides of the boiler and between the modules that were supposed to capture the heat. This was the cause of the reduced performance.
Based on our results, Tetra Engineering installed covering plates to reduce the bypass flow. This improved the boiler's performance and increased electricity production.
It is always satisfying when we can help solve complex challenges like this. Do your systems also need a check-up or optimization? Give us a call!
Work done in cooperation with James Malloy and David Moelling from Tetra Engineering.
More examples of our work https://www.r-r-consult.dk/en/cases-en/
Vaccine management system project report documentation..pdfKamal Acharya
The Division of Vaccine and Immunization is facing increasing difficulty monitoring vaccines and other commodities distribution once they have been distributed from the national stores. With the introduction of new vaccines, more challenges have been anticipated with this additions posing serious threat to the already over strained vaccine supply chain system in Kenya.
Automobile Management System Project Report.pdfKamal Acharya
The proposed project is developed to manage the automobile in the automobile dealer company. The main module in this project is login, automobile management, customer management, sales, complaints and reports. The first module is the login. The automobile showroom owner should login to the project for usage. The username and password are verified and if it is correct, next form opens. If the username and password are not correct, it shows the error message.
When a customer search for a automobile, if the automobile is available, they will be taken to a page that shows the details of the automobile including automobile name, automobile ID, quantity, price etc. “Automobile Management System” is useful for maintaining automobiles, customers effectively and hence helps for establishing good relation between customer and automobile organization. It contains various customized modules for effectively maintaining automobiles and stock information accurately and safely.
When the automobile is sold to the customer, stock will be reduced automatically. When a new purchase is made, stock will be increased automatically. While selecting automobiles for sale, the proposed software will automatically check for total number of available stock of that particular item, if the total stock of that particular item is less than 5, software will notify the user to purchase the particular item.
Also when the user tries to sale items which are not in stock, the system will prompt the user that the stock is not enough. Customers of this system can search for a automobile; can purchase a automobile easily by selecting fast. On the other hand the stock of automobiles can be maintained perfectly by the automobile shop manager overcoming the drawbacks of existing system.
Forklift Classes Overview by Intella PartsIntella Parts
Discover the different forklift classes and their specific applications. Learn how to choose the right forklift for your needs to ensure safety, efficiency, and compliance in your operations.
For more technical information, visit our website https://intellaparts.com
Saudi Arabia stands as a titan in the global energy landscape, renowned for its abundant oil and gas resources. It's the largest exporter of petroleum and holds some of the world's most significant reserves. Let's delve into the top 10 oil and gas projects shaping Saudi Arabia's energy future in 2024.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.