This paper presents the analysis and implementation of a two-phase Multi Device Interleaved Boost Converter (MDIBC). Among the various DC-DC topologies, Multi device Interleaved converter is considered as a better solution for fuel cell hybrid vehicles as it reduces the input current ripple, output voltage ripple and the size of passive components. Detailed analysis has been done to investigate the benefits of Multi device Interleaved boost converter by comparing it with the conventional Interleaved boost converter topology. Moreover, in this paper, power loss analysis (switching loss, conduction loss, inductor loss) of the proposed converter has been performed. Simulation study of Multi device interleaved converter has been studied using MATLAB/SIMULINK. Hardware prototype is built to validate the results.
An Active Input Current Waveshaping with Zero Switching Losses for Three-Phas...IDES Editor
In this paper a zero voltage switched active network
(Fig. 1) which can be used in conjunction with single-phase or
three-phase ac to dc diode rectifiers is presented. It is shown
that application of the proposed switching network in threephase
ac to dc boost converter yields zero switching losses
while maintaining a unity input power factor. Active network
capacitor, Cs, diodes D7, and D8, maintain a zero voltage during
turn-off of Q1, and Q2, Capacitor, Cs, discharges through
the boost inductors of the circuit thus limiting the rate of rise
of current during turn-on. Moreover, the advantage of the
proposed active network is that it can maintain a zero voltage
switching over the entire range of the duty cycle of the operation.
Consequently, boost stage can be used directly to control
the dc bus voltage by varying the duty cycle at Constant switching
frequency. The resulting advantages include higher
switching frequencies, and better efficiency. Finally the operation
of the active switching network is verified experimentally
on a prototype three-phase ac to dc converter.
Optimal Body Biasing Technique for CMOS Tapered Buffer IJEEE
This paper represents Fixed Body Biased CMOS Tapered Buffer which is designed to minimize the average power dissipation across large capacitive load. The implementation of Reverse Body Bias (RBB) in the proposed Buffer chain is to vary Vth value of NMOS in the first stage. And with the increase in Vth /sub-threshold leakage current and power has been reduced. The technology constraints on the threshold voltage does not allow designer to set high threshold voltage for MOS devices. Hence, this was found that in proposed circuit that when optimal Reverse Body Bias value is set within (0.2 VDD to 0.4 VDD) range, the average power dissipation across capacitive load reduces to 82.2 % at very less penalty in delay. Thus CMOS buffer designers can use the proposed method to vary Vth while keeping VDD constant, which could improve the performance parameters of Tapered Buffer. The proposed analysis is verified by simulating the 3-stage tapered buffer schematics using standard 180nm CMOS technology in Cadence environment.
This paper deals with comparison of responses of PI and Proportional Resonant controlled DC to AC Converter systems. The objective of this work is to regulate the output of Dual Active Bridge DC to DC converter (DABDAC). The input DC is converted into high frequency AC using Half bridge inverter. It is stepped up by using step up transformer and then it is rectified. The DC is converted into Low frequency AC using a Half bridge inverter. The open loop DABDAC system, closed loop PI based DABDAC system an Proportional Resonant Controller (PRC)based DABDAC system are designed, modeled and simulated using MATLAB Simulink. The results of PR controlled system are compared with those of PI controlled system. The results indicate that the proposed PRC-DABDAC has better time domain response than PI controlled DABDAC system. The proposed DABDAC system has advantages like high gain and steady state error in output voltage.
Dynamic model of A DC-DC quasi-Z-source converter (q-ZSC)IJECEIAES
Two quasi-Z-source DC-DC converters (q-ZSCs) with buck-boost converter gain were recently proposed. The converters have advantages of continuous gain curve, higher gain magnitude and buck-boost operation at efficient duty ratio range when compared with existing q-ZSCs. Accurate dynamic models of these converters are needed for global and detailed overview by understanding their operation limits and effects of components sizes. A dynamic model of one of these converters is proposed here by first deriving the gain equation, state equations and state space model. A generalized small signal model was also derived before localizing it to this topology. The transfer functions (TF) were all derived, the poles and zeros analyzed with the boundaries for stable operations presented and discussed. Some of the findings include existence of right-hand plane (RHP) zero in the duty ratio to output capacitor voltage TF. This is common to the Z-source and quasi-Z-source topologies and implies control limitations. Parasitic resistances of the capacitors and inductors affect the nature and positions of the poles and zeros. It was also found and verified that rather than symmetric components, use of carefully selected smaller asymmetric components L1 and C1 produces less parasitic voltage drop, higher output voltage and current under the same conditions, thus better efficiency and performance at reduced cost, size and weight.
Design of 6 bit flash analog to digital converter using variable switching vo...VLSICS Design
This paper presents the design of 6-bit flash analog to digital Converter (ADC) using the new variable
switching voltage (VSV) comparator. In general, Flash ADCs attain the highest conversion speed at the
cost of high power consumption. By using the new VSV comparator, the designed 6-bit Flash ADC exhibits
significant improvement in terms of power and speed of previously reported Flash ADCs. The simulation
result shows that the converter consumes peak power 2.1 mW from a 1.2 V supply and achieves the speed of
1 GHz in a 65nm standard CMOS process. The measurement of maximum differential and integral
nonlinearities (DNL and INL) of the Flash ADC are 0.3 LSB and 0.6 LSB respectively.
This paper proposes two new simplified cascade multiphase DC-DC boost power converters with high voltage-gain and low ripple. All simplifications reduce the number of active switching devices from 2N into N, where N is the phase number. The first simplification reduces the number of inductors from 2N into N+1 and increases the number of diodes from 2N into (2N+1). The second simplification reduces the number of inductors from 2N into N+1 and increases the number of diodes from 2N into (3N+1). The second simplification needs inductors with smaller current rating than the first simplification. The expressions of output voltage as a function of load current are derived by taking into account the voltage drops across the inductors and switching power devices. Simulated and experimental results are included to show the basic performance of the proposed cascade multiphase DC-DC boost power converters.
An Active Input Current Waveshaping with Zero Switching Losses for Three-Phas...IDES Editor
In this paper a zero voltage switched active network
(Fig. 1) which can be used in conjunction with single-phase or
three-phase ac to dc diode rectifiers is presented. It is shown
that application of the proposed switching network in threephase
ac to dc boost converter yields zero switching losses
while maintaining a unity input power factor. Active network
capacitor, Cs, diodes D7, and D8, maintain a zero voltage during
turn-off of Q1, and Q2, Capacitor, Cs, discharges through
the boost inductors of the circuit thus limiting the rate of rise
of current during turn-on. Moreover, the advantage of the
proposed active network is that it can maintain a zero voltage
switching over the entire range of the duty cycle of the operation.
Consequently, boost stage can be used directly to control
the dc bus voltage by varying the duty cycle at Constant switching
frequency. The resulting advantages include higher
switching frequencies, and better efficiency. Finally the operation
of the active switching network is verified experimentally
on a prototype three-phase ac to dc converter.
Optimal Body Biasing Technique for CMOS Tapered Buffer IJEEE
This paper represents Fixed Body Biased CMOS Tapered Buffer which is designed to minimize the average power dissipation across large capacitive load. The implementation of Reverse Body Bias (RBB) in the proposed Buffer chain is to vary Vth value of NMOS in the first stage. And with the increase in Vth /sub-threshold leakage current and power has been reduced. The technology constraints on the threshold voltage does not allow designer to set high threshold voltage for MOS devices. Hence, this was found that in proposed circuit that when optimal Reverse Body Bias value is set within (0.2 VDD to 0.4 VDD) range, the average power dissipation across capacitive load reduces to 82.2 % at very less penalty in delay. Thus CMOS buffer designers can use the proposed method to vary Vth while keeping VDD constant, which could improve the performance parameters of Tapered Buffer. The proposed analysis is verified by simulating the 3-stage tapered buffer schematics using standard 180nm CMOS technology in Cadence environment.
This paper deals with comparison of responses of PI and Proportional Resonant controlled DC to AC Converter systems. The objective of this work is to regulate the output of Dual Active Bridge DC to DC converter (DABDAC). The input DC is converted into high frequency AC using Half bridge inverter. It is stepped up by using step up transformer and then it is rectified. The DC is converted into Low frequency AC using a Half bridge inverter. The open loop DABDAC system, closed loop PI based DABDAC system an Proportional Resonant Controller (PRC)based DABDAC system are designed, modeled and simulated using MATLAB Simulink. The results of PR controlled system are compared with those of PI controlled system. The results indicate that the proposed PRC-DABDAC has better time domain response than PI controlled DABDAC system. The proposed DABDAC system has advantages like high gain and steady state error in output voltage.
Dynamic model of A DC-DC quasi-Z-source converter (q-ZSC)IJECEIAES
Two quasi-Z-source DC-DC converters (q-ZSCs) with buck-boost converter gain were recently proposed. The converters have advantages of continuous gain curve, higher gain magnitude and buck-boost operation at efficient duty ratio range when compared with existing q-ZSCs. Accurate dynamic models of these converters are needed for global and detailed overview by understanding their operation limits and effects of components sizes. A dynamic model of one of these converters is proposed here by first deriving the gain equation, state equations and state space model. A generalized small signal model was also derived before localizing it to this topology. The transfer functions (TF) were all derived, the poles and zeros analyzed with the boundaries for stable operations presented and discussed. Some of the findings include existence of right-hand plane (RHP) zero in the duty ratio to output capacitor voltage TF. This is common to the Z-source and quasi-Z-source topologies and implies control limitations. Parasitic resistances of the capacitors and inductors affect the nature and positions of the poles and zeros. It was also found and verified that rather than symmetric components, use of carefully selected smaller asymmetric components L1 and C1 produces less parasitic voltage drop, higher output voltage and current under the same conditions, thus better efficiency and performance at reduced cost, size and weight.
Design of 6 bit flash analog to digital converter using variable switching vo...VLSICS Design
This paper presents the design of 6-bit flash analog to digital Converter (ADC) using the new variable
switching voltage (VSV) comparator. In general, Flash ADCs attain the highest conversion speed at the
cost of high power consumption. By using the new VSV comparator, the designed 6-bit Flash ADC exhibits
significant improvement in terms of power and speed of previously reported Flash ADCs. The simulation
result shows that the converter consumes peak power 2.1 mW from a 1.2 V supply and achieves the speed of
1 GHz in a 65nm standard CMOS process. The measurement of maximum differential and integral
nonlinearities (DNL and INL) of the Flash ADC are 0.3 LSB and 0.6 LSB respectively.
This paper proposes two new simplified cascade multiphase DC-DC boost power converters with high voltage-gain and low ripple. All simplifications reduce the number of active switching devices from 2N into N, where N is the phase number. The first simplification reduces the number of inductors from 2N into N+1 and increases the number of diodes from 2N into (2N+1). The second simplification reduces the number of inductors from 2N into N+1 and increases the number of diodes from 2N into (3N+1). The second simplification needs inductors with smaller current rating than the first simplification. The expressions of output voltage as a function of load current are derived by taking into account the voltage drops across the inductors and switching power devices. Simulated and experimental results are included to show the basic performance of the proposed cascade multiphase DC-DC boost power converters.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
Neuro-Fuzzy Five-level Cascaded Multilevel Inverter for Active Power FilterIDES Editor
This paper presents an investigation of five-Level
Cascaded H-bridge(CHB) inverter as Active Power Filter in
Power System (PS) for compensation of reactive power and
harmonics. The advantages of CHB inverter are low harmonic
distortion, reduced number of switches and suppression of
switching losses. The Active Power Filter helps to improve
the power factor and eliminate the Total Harmonics Distortion
(THD) drawn from a Non-Liner Diode Rectifier Load (NLDRL).
The D-Q reference frame theory is used to generate the
reference compensating currents for Active Power Filter
while Neuro-Fuzzy controller(NFC) is used for capacitor dc
voltage regulation. A CHB Inverter is considered for shunt
compensation of a 11 kV distribution system. Finally a level
shifted PWM (LSPWM) technique adopted to investigate the
performance of CHB Inverter. The results are obtained through
Mat lab / Simulink .
This paper presents a new simplified cascade multiphase DC-DC buck power converter suitable for low voltage and large current applications. Cascade connection enables very low voltage ratio without using very small duty cycles nor transformers. Large current with very low ripple content is achieved by using the multiphase technique. The proposed converter needs smaller number of components compared to conventional cascade multiphase DC-DC buck power converters. This paper also presents useful analysis of the proposed DC-DC buck power converter with a method to optimize the phase and cascade number. Simulation and experimental results are included to verify the basic performance of the proposed DC-DC buck power converter.
Gain improvement of two stage opamp through body bias in 45nm cmos technologyeSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Electrical, Electronics and Computer Engineering,
Information Engineering and Technology,
Mechanical, Industrial and Manufacturing Engineering,
Automation and Mechatronics Engineering,
Material and Chemical Engineering,
Civil and Architecture Engineering,
Biotechnology and Bio Engineering,
Environmental Engineering,
Petroleum and Mining Engineering,
Marine and Agriculture engineering,
Aerospace Engineering.
A Review on Modeling and Analysis of Multi Stage with Multi Phase DC DC Boost...YogeshIJTSRD
A new version of the new Hybrid Boost DC DC ready to draw power from two different DC sources for standard DC bus feeds is presented in this paper. An important feature of the proposed converter is that both sources provide simultaneous power to a lower load than the reduced current rate. This feature is very attractive for DC grid applications. With the analysis of the time zone, steady state performance is established and the transformational power correction parameters are obtained. In this paper, a powerful converter is introduced, with its operating principles based on charging pumps and converters of reinforcement series. In addition, although three switches are used, no separate gate driver is required instead of one bridge gate driver and one gate driver on the lower side. As such, the proposed converter is easy to analyze and easy to operate. In addition, additional test results are provided to confirm the effectiveness of the proposed converter. Mukesh Kuma | Manoj Kumar Dewangan | Maheedhar Dubey "A Review on Modeling and Analysis of Multi Stage with Multi Phase DC-DC Boost Converter" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-5 | Issue-3 , April 2021, URL: https://www.ijtsrd.com/papers/ijtsrd39985.pdf Paper URL: https://www.ijtsrd.com/engineering/electrical-engineering/39985/a-review-on-modeling-and-analysis-of-multi-stage-with-multi-phase-dcdc-boost-converter/mukesh-kuma
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium
voltage grid, to connect only one power semiconductor switch directly is a not practically successful
concept. To overcome this multilevel power converter structure has been introduced and studied as an
alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic,
wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications.
In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are
presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased
are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
FAST VOLTAGE STABILTY INDEX BASED OPTIMAL REACTIVE POWER PLANNING USING DIFFE...elelijjournal
This Article presents an application of Fast Voltage Stability Index (FVSI) to Optimal Reactive Power
Planning (RPP) using Differential Evolution(DE). FVSI is used to identify the weak buses for the Reactive
Power Planning problem which involves process of experimental by voltage stability analysis based on the
load variation. The peak at Fast Voltage Stabilty Index secure to 1 indicates the greatest feasible connected
load and the bus with least connected load is identified as the weakest bus at the point of bifurcation. This technique is tested on the IEEE 30-bus system. The outcome confirm significant decrease in system losses and enhancementt of voltage stability with the use of Fast Voltage Stability Index based optimal Reactive Power Planning using Differential Evolution and compared with Evalutionary Programming
A modified Cuk DC-DC converter for DC microgrid systemsTELKOMNIKA JOURNAL
A new efficient step-updirect current-direct current (DC-DC) power converter that is suitable for DC microgrid systems is proposed in this paper. The proposed step-up DC-DC converter is derived from the conventional Cuk DC-DC power converter. Output voltage analysis that is useful to predict the conduction losses is presented. It is shown that the proposed step-up DC-DC converter is more efficient than the conventional DC-DC boost power converter. Current ripple analysis that is useful to determine the required inductors and capacitors is also presented. Experimental results are included to show the validity of the proposed step-up DC-DC power converter.
Comparison of Buck-Boost and Cuk Converters for BLDC Drive Applications with PFCIJMTST Journal
The devices generally used in industrial, commercial and residential applications need to undergo rectification for their proper functioning and operation. Hence there is a need to reduce the line current harmonics so as to improve the power factor of the system. This has led to designing of Power Factor Correction circuits. This project presents a power factor corrected (PFC) bridgeless (BL) buck–boost converter-fed brushless direct current (BLDC) motor drive as a cost-effective solution for low-power applications. The conventional PFC scheme of the BLDC motor drive utilizes a pulse width-modulated voltage source inverter (PWM-VSI) for speed control with a constant dc link voltage. This offers higher switching losses in VSI as the switching losses increase as a square function of switching frequency. A BL configuration of the buck–boost converter is proposed which offers the elimination of the diode bridge rectifier, thus reducing the conduction losses associated with it. A PFC BL buck–boost converter is designed to operate in discontinuous inductor current mode (DICM) to provide an inherent PFC at ac mains. The simulation results are presented by using Matlab/Simulink software. The proposed concept can be extended with cuk converter for BLDC drive applications using Matlab/Simulink software
Power Quality Improvement Using Cascaded H-Bridge Multilevel Inverter Based D...IJERA Editor
Cascaded multilevel configuration of the inverter has the advantage of its simplicity and modularity over the
configurations of the diode-clamped and flying capacitor multilevel inverters. This paper presents a threephase,
five-level and seven level cascaded multilevel voltage source inverter based active filter for power line
conditioning to improve power quality in the distribution network. The DSTATCOM helps to improve the
power factor and eliminate the Total Harmonics Distortion (THD) drawn from a Non-Liner Diode Rectifier
Load (NLDRL). The compensation process is based on concept of p-q theory. A CHB Inverter is considered for
shunt compensation of a 11 kV distribution system. Finally a level shifted PWM (LSPWM) and phase shifted
PWM (PSPWM) techniques are adopted to investigate the performance of CHB Inverter. The results are
obtained through Matlab/Simulink software package.
A Modern Technique of Deduction in Leakage Current in Resonant Bi-directional...IJMTST Journal
This Paper Presents A whole New resonant twin active bridge(DAB) topology, that uses a tuned inductor-capacitor-inductor(LCL) network. As compared to ancient DAB topologies, the planned topologies significantly reduced the bridge current, lowering every physical phenomenon and alter losses and conjointly VA rating associated with the bridges. The performance of the DAB is investigated using a mathematical model at a lower place varied operational conditions. Experiment results of a model is reduced the outflow current of the circuit. are presented with discussion to demonstrate the improved performance of the LCL DAB topology. Result clearly that the planned DAB Topology provide higher efficiency over an oversized vary of every input voltage and as compared to ancient DAB topology
New Dead-Time Compensation Method of Power Inverter Using Carrier Based Sinus...IJECEIAES
A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.
DESIGN OF LOW POWER SAR ADC FOR ECG USING 45nm CMOS TECHNOLOGYVLSICS Design
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in
45nm CMOS Technology for biopotential acquisition systems is presented. It is designed by using a high
threshold voltage (Vt) cell to reduce power dissipation. A 10-bit SAR ADC is designed and compared with
the low resolution SAR ADC and normal threshold voltage (Vt) ADC with respect to power and delay. The
results show that high Vt SAR ADC saves power upto 67% as compared to low Vt SAR ADC without any
penalty of delay. Other performance metrics studied are the Effective Number of Bits (ENOB) and Signal to
Noise Ratio (SNR), Signal to Noise and Distortion Ratio and Spurious Free Dynamic ratio.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Interleaving Technique in Multiphase Buck & Boost ConverterIDES Editor
Some of the recent applications in the field of the
power supplies use multiphase converters to achieve fast
dynamic response, smaller input/output filters or better
packaging. Typically, these converters have several paralleled
power stages with a current loop in each phase and a unique
voltage loop. The presence of the current loops is necessary to
increase dynamic response (by using Current mode control)
and to avoid current unbalance among phases.
39 9146 a novel single source multi output (edit lafi)IAESIJEECS
This paper presents a novel single DC input source and multiple DC output suitable for switched mode power supply (SMPS) applications integrating interleaved boost and sepic converter with fly back topology. The proposed converter can be remodeled for any required output voltage power supply without changing hardware structure because wide range of output voltage can be obtained using sepic and boost converters by changing duty cycle command by implementing a simple voltage input pi controller. Conventional fly back topology is added to interleaved circuit to produce desired dc output voltage this voltage can be controlled by choosing turns ratio of fly back transformer. The proposed multi output DC converter is simulated in MATLAB/Simulink environment and results are presented for verifying merits of the converter.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
Neuro-Fuzzy Five-level Cascaded Multilevel Inverter for Active Power FilterIDES Editor
This paper presents an investigation of five-Level
Cascaded H-bridge(CHB) inverter as Active Power Filter in
Power System (PS) for compensation of reactive power and
harmonics. The advantages of CHB inverter are low harmonic
distortion, reduced number of switches and suppression of
switching losses. The Active Power Filter helps to improve
the power factor and eliminate the Total Harmonics Distortion
(THD) drawn from a Non-Liner Diode Rectifier Load (NLDRL).
The D-Q reference frame theory is used to generate the
reference compensating currents for Active Power Filter
while Neuro-Fuzzy controller(NFC) is used for capacitor dc
voltage regulation. A CHB Inverter is considered for shunt
compensation of a 11 kV distribution system. Finally a level
shifted PWM (LSPWM) technique adopted to investigate the
performance of CHB Inverter. The results are obtained through
Mat lab / Simulink .
This paper presents a new simplified cascade multiphase DC-DC buck power converter suitable for low voltage and large current applications. Cascade connection enables very low voltage ratio without using very small duty cycles nor transformers. Large current with very low ripple content is achieved by using the multiphase technique. The proposed converter needs smaller number of components compared to conventional cascade multiphase DC-DC buck power converters. This paper also presents useful analysis of the proposed DC-DC buck power converter with a method to optimize the phase and cascade number. Simulation and experimental results are included to verify the basic performance of the proposed DC-DC buck power converter.
Gain improvement of two stage opamp through body bias in 45nm cmos technologyeSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Electrical, Electronics and Computer Engineering,
Information Engineering and Technology,
Mechanical, Industrial and Manufacturing Engineering,
Automation and Mechatronics Engineering,
Material and Chemical Engineering,
Civil and Architecture Engineering,
Biotechnology and Bio Engineering,
Environmental Engineering,
Petroleum and Mining Engineering,
Marine and Agriculture engineering,
Aerospace Engineering.
A Review on Modeling and Analysis of Multi Stage with Multi Phase DC DC Boost...YogeshIJTSRD
A new version of the new Hybrid Boost DC DC ready to draw power from two different DC sources for standard DC bus feeds is presented in this paper. An important feature of the proposed converter is that both sources provide simultaneous power to a lower load than the reduced current rate. This feature is very attractive for DC grid applications. With the analysis of the time zone, steady state performance is established and the transformational power correction parameters are obtained. In this paper, a powerful converter is introduced, with its operating principles based on charging pumps and converters of reinforcement series. In addition, although three switches are used, no separate gate driver is required instead of one bridge gate driver and one gate driver on the lower side. As such, the proposed converter is easy to analyze and easy to operate. In addition, additional test results are provided to confirm the effectiveness of the proposed converter. Mukesh Kuma | Manoj Kumar Dewangan | Maheedhar Dubey "A Review on Modeling and Analysis of Multi Stage with Multi Phase DC-DC Boost Converter" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-5 | Issue-3 , April 2021, URL: https://www.ijtsrd.com/papers/ijtsrd39985.pdf Paper URL: https://www.ijtsrd.com/engineering/electrical-engineering/39985/a-review-on-modeling-and-analysis-of-multi-stage-with-multi-phase-dcdc-boost-converter/mukesh-kuma
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium
voltage grid, to connect only one power semiconductor switch directly is a not practically successful
concept. To overcome this multilevel power converter structure has been introduced and studied as an
alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic,
wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications.
In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are
presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased
are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
FAST VOLTAGE STABILTY INDEX BASED OPTIMAL REACTIVE POWER PLANNING USING DIFFE...elelijjournal
This Article presents an application of Fast Voltage Stability Index (FVSI) to Optimal Reactive Power
Planning (RPP) using Differential Evolution(DE). FVSI is used to identify the weak buses for the Reactive
Power Planning problem which involves process of experimental by voltage stability analysis based on the
load variation. The peak at Fast Voltage Stabilty Index secure to 1 indicates the greatest feasible connected
load and the bus with least connected load is identified as the weakest bus at the point of bifurcation. This technique is tested on the IEEE 30-bus system. The outcome confirm significant decrease in system losses and enhancementt of voltage stability with the use of Fast Voltage Stability Index based optimal Reactive Power Planning using Differential Evolution and compared with Evalutionary Programming
A modified Cuk DC-DC converter for DC microgrid systemsTELKOMNIKA JOURNAL
A new efficient step-updirect current-direct current (DC-DC) power converter that is suitable for DC microgrid systems is proposed in this paper. The proposed step-up DC-DC converter is derived from the conventional Cuk DC-DC power converter. Output voltage analysis that is useful to predict the conduction losses is presented. It is shown that the proposed step-up DC-DC converter is more efficient than the conventional DC-DC boost power converter. Current ripple analysis that is useful to determine the required inductors and capacitors is also presented. Experimental results are included to show the validity of the proposed step-up DC-DC power converter.
Comparison of Buck-Boost and Cuk Converters for BLDC Drive Applications with PFCIJMTST Journal
The devices generally used in industrial, commercial and residential applications need to undergo rectification for their proper functioning and operation. Hence there is a need to reduce the line current harmonics so as to improve the power factor of the system. This has led to designing of Power Factor Correction circuits. This project presents a power factor corrected (PFC) bridgeless (BL) buck–boost converter-fed brushless direct current (BLDC) motor drive as a cost-effective solution for low-power applications. The conventional PFC scheme of the BLDC motor drive utilizes a pulse width-modulated voltage source inverter (PWM-VSI) for speed control with a constant dc link voltage. This offers higher switching losses in VSI as the switching losses increase as a square function of switching frequency. A BL configuration of the buck–boost converter is proposed which offers the elimination of the diode bridge rectifier, thus reducing the conduction losses associated with it. A PFC BL buck–boost converter is designed to operate in discontinuous inductor current mode (DICM) to provide an inherent PFC at ac mains. The simulation results are presented by using Matlab/Simulink software. The proposed concept can be extended with cuk converter for BLDC drive applications using Matlab/Simulink software
Power Quality Improvement Using Cascaded H-Bridge Multilevel Inverter Based D...IJERA Editor
Cascaded multilevel configuration of the inverter has the advantage of its simplicity and modularity over the
configurations of the diode-clamped and flying capacitor multilevel inverters. This paper presents a threephase,
five-level and seven level cascaded multilevel voltage source inverter based active filter for power line
conditioning to improve power quality in the distribution network. The DSTATCOM helps to improve the
power factor and eliminate the Total Harmonics Distortion (THD) drawn from a Non-Liner Diode Rectifier
Load (NLDRL). The compensation process is based on concept of p-q theory. A CHB Inverter is considered for
shunt compensation of a 11 kV distribution system. Finally a level shifted PWM (LSPWM) and phase shifted
PWM (PSPWM) techniques are adopted to investigate the performance of CHB Inverter. The results are
obtained through Matlab/Simulink software package.
A Modern Technique of Deduction in Leakage Current in Resonant Bi-directional...IJMTST Journal
This Paper Presents A whole New resonant twin active bridge(DAB) topology, that uses a tuned inductor-capacitor-inductor(LCL) network. As compared to ancient DAB topologies, the planned topologies significantly reduced the bridge current, lowering every physical phenomenon and alter losses and conjointly VA rating associated with the bridges. The performance of the DAB is investigated using a mathematical model at a lower place varied operational conditions. Experiment results of a model is reduced the outflow current of the circuit. are presented with discussion to demonstrate the improved performance of the LCL DAB topology. Result clearly that the planned DAB Topology provide higher efficiency over an oversized vary of every input voltage and as compared to ancient DAB topology
New Dead-Time Compensation Method of Power Inverter Using Carrier Based Sinus...IJECEIAES
A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.
DESIGN OF LOW POWER SAR ADC FOR ECG USING 45nm CMOS TECHNOLOGYVLSICS Design
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in
45nm CMOS Technology for biopotential acquisition systems is presented. It is designed by using a high
threshold voltage (Vt) cell to reduce power dissipation. A 10-bit SAR ADC is designed and compared with
the low resolution SAR ADC and normal threshold voltage (Vt) ADC with respect to power and delay. The
results show that high Vt SAR ADC saves power upto 67% as compared to low Vt SAR ADC without any
penalty of delay. Other performance metrics studied are the Effective Number of Bits (ENOB) and Signal to
Noise Ratio (SNR), Signal to Noise and Distortion Ratio and Spurious Free Dynamic ratio.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Interleaving Technique in Multiphase Buck & Boost ConverterIDES Editor
Some of the recent applications in the field of the
power supplies use multiphase converters to achieve fast
dynamic response, smaller input/output filters or better
packaging. Typically, these converters have several paralleled
power stages with a current loop in each phase and a unique
voltage loop. The presence of the current loops is necessary to
increase dynamic response (by using Current mode control)
and to avoid current unbalance among phases.
39 9146 a novel single source multi output (edit lafi)IAESIJEECS
This paper presents a novel single DC input source and multiple DC output suitable for switched mode power supply (SMPS) applications integrating interleaved boost and sepic converter with fly back topology. The proposed converter can be remodeled for any required output voltage power supply without changing hardware structure because wide range of output voltage can be obtained using sepic and boost converters by changing duty cycle command by implementing a simple voltage input pi controller. Conventional fly back topology is added to interleaved circuit to produce desired dc output voltage this voltage can be controlled by choosing turns ratio of fly back transformer. The proposed multi output DC converter is simulated in MATLAB/Simulink environment and results are presented for verifying merits of the converter.
Closed Loop Analysis of Multilevel Inverter Fed Drives IJPEDS-IAES
This paper deals with the simulation and implementation of multilevel inverter for drives application. Here the focuses will be onimproving the efficiency of the multilevel inverter and quality of output voltage waveform. The circuit is developed towards high efficiency, high performance, and low cost, simple control scheme. Harmonics Elimination was implemented to reduce the Total Harmonics Distortion (THD) value which is achieved by selecting appropriate switching angles. In this paper to determine the performance of rectifier, steady state analysis is done. Furthermore, the merits of multilevel inverter topology are inherited.Closed loop control is done to analysis the stability of the system.
Design and Simulation of Power Factor Correction Boost Converter using Hyster...ijtsrd
Nowadays various power converters like AC DC or DC DC are widely used due to their flexible output voltage and high efficiency. But these converters take the current in the form of pulses from the utility grid so that the high Total Harmonic Distortion THD and poor Power Factor PF are the major disadvantages of these converters. Hence there is a continuous need for PF improvement and reduction of line current harmonics. The most popular topology for Active Power Factor Correction APFC is a boost converter as it draws continuous input current. This input current can be manipulated by Hysteresis control technique. The boost converter can perform this type of active power factor correction in many discontinuous and continuous modes. The design and simulation of boost converter with power factor correction in continuous conduction mode is represented by using MATLAB SIMULINK software. Yu Yu Khin | Yan Aung Oo "Design and Simulation of Power Factor Correction Boost Converter using Hysteresis Control" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-3 | Issue-5 , August 2019, URL: https://www.ijtsrd.com/papers/ijtsrd27905.pdfPaper URL: https://www.ijtsrd.com/engineering/electrical-engineering/27905/design-and-simulation-of-power-factor-correction-boost-converter-using-hysteresis-control/yu-yu-khin
COMPARISION OF SINGLE PHASE AND FOUR PHASE BOOST CONVERTER FOR CLOSED LOOP MODELijsrd.com
The objective of this paper deals on analysis and implementation of single phase and four phase boost converter. The input ripple current and output ripple voltage, steady state capacitor current are observed using MATLAB Simulink.
This paper proposes an alternative topology of an inverter to the existing topologies available in the market. A prototype is intended with the purpose of investigates the possibility of designing an inverter using two Boost Converters. This project initialized with a series of simulations using Matlab in order to determine the feasibility of the proposed topology. The next step is the design and development of the proposed prototype where suitable electronics components are chosen based on the simulation result. A PIC microcontroller is used to control the proposed prototype where a control scheme is created based on the programming in the microcontroller. The performance of the proposed prototype has been verified to be optimum by several practical testing using different values of capacitor, inductor and duty cycle. Lastly, data and analysis are presented in a proper mannered way. In the end, this project intends to produce stepped-up square wave output voltage waveform by proper controlling of two Boost Converters.
Design high gain dc dc boost converter with coupling inductor and simulation ...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Study and implementation of comparator in cmos 50 nm technologyeSAT Journals
Abstract This paper describes the comparator circuits used in FLASH Analog to digital converter (ADC). The performance of FLASH ADC is greatly influenced by the choice of comparator. In this paper, first a single ended “Threshold Inverter Quantizer” (TIQ) is presented. The TIQ comparator is based on a CMOS inverter cell, in which voltage transfer characteristics (VTC) are changed by systematic transistor sizing. However, TIQ comparator is very sensitive to power supply noise. Another comparator circuit presented in this paper is “Two stage open loop comparator”. It is implemented in 50 nm CMOS Technology. Pre-simulation of comparator is done in LT-Spice and post layout simulation is done in Microwind 3.1. Keywords: CMOS, Comparator, TIQ (Threshold Inverter Quantizer), LT-Spice.
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium voltage grid, to connect only one power semiconductor switch directly is a not practically successful concept. To overcome this multilevel power converter structure has been introduced and studied as an alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic, wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications. In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
Performance enhancement of DC/DC converters for solar powered EV IJECEIAES
The paper initially presents the essential drive arrangement required for electric vehicle. It requests high power bidirectional stream ability, with wide info voltage range, and yield voltage of vitality stockpiling gadgets, for example, super capacitors or batteries shift with the adjustment in stack. At that point the tenacity and outline of previously mentioned converter is proposed in this paper. The converter which relates a half extension topology, has high power stream ability and least gadget focuses on that can appropriately interface a super capacitor with the drive prepare of a crossover electric vehicle. Besides, by contrasting the fundamental qualities and applications with some ordinary bidirectional DC/DC converter, the proposed converter has low gadget rating and can be controlled by obligation cycle and stage move. Finally, the most essential attributes of this converter is that it utilizes the transformer spillage inductance as the essential vitality exchange component and control parameters, Simulation waveforms in light of MATLAB recreation are given to exhibit the integrity of this novel topology, and this converter is additionally reasonable for high power application, specifically to control the charge-release of super capacitors or batteries that can be utilized as a part of cross breed solar based electric vehicle.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
This paper analyses a 3-phase interleaved DC-DC boost converter for the conversion of low input voltage with high input current to higher DC output voltage. The operation of the 3-phase interleaved DC-DC boost converter with multi-parallel of boost converters is controlled by interleaved of switching signals with 120 degrees phase-shifted. Therefore, with this circuit configuraion, high input current is evenly shared among the parallel units and consequently the current stress is reduced on the circuit and semiconductor devices and contributes reduction of overall losses. The simulation and hardware results show that the current stress and the semiconductor conduction losses were reduced approximately 33% and 32%, respectively in the 3-phase interleaved DC-DC boost converter compared to the conventional DC-DC boost converters. Furthermore, the use of interleaving technique with continuous conduction mode on DC-DC boost converters is reducing input current and output voltage ripples to increase reliability and efficiency of boost converters.
This paper proposes a new voltage frequency converter (VFC) that converts both voltage and frequency to the required level of voltage and frequency in low voltage networks used in various countries. The proposed converter could be used as a universal power supply for sensitive AC loads. The converter is composed of, input voltage and frequency detection circuitry, full bridge boost rectifier and a DC to AC inverter. In addition, to improve the feasibility and performance of the converter, synchronous reference based PI (SRFPI) controller is adopted, where the system behaves similar to a DC-DC converter. The parameter selection of PI controller is done using a recent optimisation technique called Lightning Search Algorithm (LSA). The simulation of VFC is conducted in MATLAB/Simulink environment. The simulation results shows that LSA based PI controller provides better output voltage regulation with respect to the reference value under various load and input conditions.
High Frequency Soft Switching Of PWM Boost Converter Using Auxiliary Resonant...IJERA Editor
This thesis presents High frequency Soft Switching DC-DC boost Converter. The circuit consists of a general Boost Converter with an additional resonant circuit which has a switch, inductor, capacitor and a diode.In general Boost Converter circuits have snubber circuits where switching losses are dissipated in external passive resistors; which is known as hard switching. As the switching frequency of PWM converters is increased its switching losses and conduction losses also increases. This restricts the use of PWM technique. New Zero Voltage Transition-Zero Current Transition (ZVT-ZCT) PWM converter equipped with the snubber provides the most desirable features of both ZVT and ZCT converters presented previously. Moreover all semiconductors devices operate with soft switching and hence losses are reduced.
Inter-Area Oscillation Damping using an STATCOM Based Hybrid Shunt Compensati...IJPEDS-IAES
FACTS devices are one of the latest technologies which have been used to
improve power system dynamic and stability during recent years. However,
widespread adoption of this technology has been hampered by high cost
and reliability concerns. In this paper an economical phase imbalanced shunt
reactive compensation concept has been introduced and its ability for power
system dynamic enhancement and inter-area oscillation damping are
investigated. A hybrid phase imbalanced scheme is a shunt capacitive
compensation scheme, where two phases are compensated by fixed shunt
capacitor (C) and the third phase is compensated by a Static Synchronous
Compensator (STATCOM) in shunt with a fixed capacitor (CC). The power
system dynamic stability enhancement would be achieved by adding
a conventional Wide Area Damping Controller (WADC) to the main control
loop of the single phase STATCOM. Two different control methodologies
are proposed: a non-optimized conventional damping controller
and a conventional damping controller with optomised parameters that are
added to the main control loop of the unbalanced compensator in order to
damp the inter area oscillations. The proposed arrangement would, certainly,
be economically attractive when compared with a full three-phase
STATCOM. The proposed scheme is prosperously applied in a 13-bus
six-machine test system and various case studies are conducted to
demonstrate its ability in damping inter-area oscillations and power system
dynamic enhancement.
Fuzzy Gain-Scheduling Proportional–Integral Control for Improving the Speed B...IJPEDS-IAES
In this article, we have set up a vector control law of induction machine
where we tried different type of speed controllers. Our control strategy is of
type Field Orientated Control (FOC). In this structure we designed a Fuzzy
Gain-Scheduling Proportional–Integral (Pi) controller to obtain best result
regarding the speed of induction machine. At the beginning we designed a Pi
controller with fixed parameters. We came up to these parameters by
identifying the transfer function of this controller to that of Broïda (second
order transfer function). Then we designed a fuzzy logic (FL) controller.
Based on simulation results, we highlight the performances of each
controller. To improve the speed behaviour of the induction machine, we
have designend a controller called “Fuzzy Gain-Scheduling Proportional–
Integral controller” (FGS-PI controller) which inherited the pros of the
aforementioned controllers. The simulation result of this controller will
strengthen its performances.
Advance Technology in Application of Four Leg Inverters to UPQCIJPEDS-IAES
This article presents a novel application of four leg inverter with
conventional Sinusoidal Pulse Width Modulation (SPWM) Scheme to
Unified Power Quality Conditioner (UPQC). The Power Quality problem
became burning issues since the starting of high voltage AC transmission
system. Hence, in this article it has been discussed to mitigate the PQ issues
in high voltage AC systems through a three phase Unified Power Quality
Conditioner (UPQC) under various conditions, such as harmonic mitigation
scheme, non linear loads, sag and swell conditions as well. Also, it proposes
to control harmoincs with various artificial intelligent techniques. Thus
application of these control technique such as Neural Networks (ANN)
Fuzzy Logic makes the system performance in par with the standards
and also compared with existing system. The simulation results based on
MATLAB/Simulink are discussed in detail to support the concept developed
in the paper.
Modified SVPWM Algorithm for 3-Level Inverter Fed DTC Induction Motor DriveIJPEDS-IAES
In this paper, a modified space vector pulse width modulation (MSVPWM)
algorithm is developed for 3-level inverter fed direct torque controlled
induction motor drive (DTC-IMD). MSVPWM algorithm simplifies
conventional space vector pulse width modulation (CSVPWM) algorithm for
multilevel inverter (MLI), whose complexity lies in sector/subsector/subsubsector
identification; which will commensurate with number of levels. In
the proposed algorithm sectors are identified as in two level inverter
and subsectors/sub-subsectors are identified by shifting the original reference
vector to sector 1 (S1). This is valid due to the fact that a three level space
vector plane is a composition of six two level space planes, and are
symmetrical with reference to six pivot states. Switching state/sequence
selection is also very important while dealing with SVPWM strategy for
MLI. In the proposed algorithm out of 27 available switching states apt
switching state is selected based on sector and subsector number, such that
voltage ripple is considerably less. To validate the proposed algorithm, it is
tested on a three level neutral point clamped (NPC) inverter fed DTC-IMD.
The performance of the MSVPWM algorithm is analyzed by comparing no
load stator current ripple of the three level DTC-IMD with two level
DTC-IMD. Significant reduction in steady state torque and flux ripple is
observed. Hence, reduced acoustic noise is a distinctive facet of the proposed
method.
Modelling of a 3-Phase Induction Motor under Open-Phase Fault Using Matlab/Si...IJPEDS-IAES
The d-q model of Induction Motors (IMs) has been effectively used as an
efficient method to analyze the performance of the induction machines. This
study presents a step by step Matlab/Simulink implementation
of a star-connected 3-phase IM under open-phase fault (faulty 3-phase IM)
using d-q model. The presented technique in this paper can be simply
implemented in one block and can be made available for control purposes.
The simulated results provide to show the behavior of the star-connected 3-phase IM under open-phase fault condition.
Performance Characteristics of Induction Motor with FielIJPEDS-IAES
With development of power electronics and control Theories, the AC motor
control becomes easier. So the AC motors are used instead of the DC motor
in the drive applications. With this development, a several methods of control
are invented. The field oriented control and direct torque control are from the
best methods to control the drive systems. This paper is compared between
the field oriented control and direct torque control to show the advantages
and disadvantages of these methods of controls. This study discussed the
effects of these methods of control on the total harmonic distortion of the
current and torque ripples. This occurs through study the performance
characteristics of the AC motor. The motor used in this study is an induction
motor. This study is simulated through the MATLAB program.
A Novel Modified Turn-on Angle Control Scheme for Torque- Ripple Reduction in...IJPEDS-IAES
In recent years, Switched Reluctance Motors (SRM) have been dramatically
considered with both researchers and industries. SRMs not only have a
simple and reliable structure, but also have low cost production process.
However, discrete torque production of SRM along with intensive magnetic
saturation in stator and rotor cores are the major drawbacks of utilizing in
variety of industrial applications and also causes the inappropriate torque
ripples. In this paper, a modified logical-rule-based Torque Sharing Function
(TSF) method is proposed considering turn-on angle control. The optimized
turn-on angle for conducting each phase is achieved by estimating the
inductance curve in the vicinity of unaligned position and based on an
analytical solution for each phase voltage equation. Simulation results on a
four-phase switched reluctance motor and comparison with the conventional
methods validates the effectiveness of the proposed method.
Modeling and Simulation of Induction Motor based on Finite Element AnalysisIJPEDS-IAES
This paper presents the development of a co-simulation platform of induction
motor (IM). For the simulation, a coupled model is introduced which
contains the control, the power electronics and also the induction machine.
Each of these components is simulated in different software environments.
So, this study provides an advanced modeling and simulation tools for IM
which integrate all the components into one common simulation platform
environment. In this work, the IM is created using Ansys-Maxwell based on
Finite Element Analysis (FEA), whereas the power electronic converter is
developed in Ansys-Simplorer and the control scheme is build in MATLABSimulink
environment. Such structure can be useful for accurate design
and allows coupling analysis for more realistic simulation. This platform is
exploited to analyze the system models with faults caused by failures of
different drive’s components. Here, two studies cases are presented: the first
is the effects of a faulty device of the PWM inverter, and the second case is
the influence of the short circuit of two stator phases. In order to study the
performance of the control drive of the IM under fault conditions,
a co-simulation of the global dynamic model has been proposed to analyze
the IM behavior and control drives. In this work, the co-simulation has been
performed; furthermore the simulation results of scalar control allowed
verifying the precision of the proposed FEM platform.
Comparative Performance Study for Closed Loop Operation of an Adjustable Spee...IJPEDS-IAES
In this paper an extensive comparative study is carried out between PI
and PID controlled closed loop model of an adjustable speed Permanent
Magnet Synchronous Motor (PMSM) drive. The incorporation of Sinusoidal
Pulse Width Modulation (SPWM) strategy establishes near sinusoidal
armature phase currents and comparatively less torque ripples without
sacrificing torque/weight ratio. In this closed loop model of PMSM drive, the
information about reference speed is provided to a speed controller, to ensure
that actual drive speed tracks the reference speed with ideally zero steady
state speed error. The entire model of PMSM closed loop drive is divided
into two loops, inner loop current and outer loop speed. By taking the
different combinations of two classical controllers (PI & PID) related with
two loop control structure, different approximations are carried out. Hence a
typical comparative study is introduced to familiar with the different
performance indices of the system corresponding to time domain and
frequency domain specifications. Therefore overall performance of closed
loop PMSM drive is tested and effectiveness of controllers will be
determined for different combinations.
Novel Discrete Components Based Speed Controller for Induction MotorIJPEDS-IAES
This paper presents an electronic design based on general purpose discrete
components for speed control of a single phase induction motor drive. The
MOSFETs inverter switching is controlled using Sampled Sinusoidal Pulse
Width Modulation (SPWM) techniques with V/F method based on Voltage
Controlled Oscillator (VCO). The load power is also controlled by a novel
design to produce a suitable SPWM pulse. The proposed electronic system
has ability to control the output frequency with flexible setting of lower limit
to less than 1 Hz and to higher frequency limits to 55 Hz. Moreover, the
proposed controller able to control the value of load voltage to frequency
ratio, which plays a major parameter in the function of IM speed control.
Furthermore, the designed system is characterized by easy manufacturing
and maintenance, high speed response, low cost, and does not need to
program steps as compared to other systems based on Microcontroller
and digital signal processor (DSP) units. The complete proposed electronic
design is made by the software of NI Multisim version 11.0 and all the
internal sub-designs are shown in this paper. Simulation results show the
effectiveness of electronic design for a promising of a high performance IM
PWM drive.
Sensorless Control of a Fault Tolerant PMSM Drives in Case of Single-Phase Op...IJPEDS-IAES
This paper introduces a sensorless-speed-controlled PMSM motor fed by a
four-leg inverter in case of a single phase open circuit fault regardless in
which phase is the fault. To minimize the system performance degradation
due to a single phase open circuit fault, a fault tolerant control strategy that
includes taking appropriate actions to control the two remaining healthy
currents is used in addition to use the fourth leg of the inverter. Tracking the
saliency is done through measuring the dynamic current responses of the
healthy phases of the PMSM motor due the IGBT switching actions using the
fundamental PWM method without introducing any modification to the
operation of the fourth leg of the inverter. Simulation results are provided to
verify the effectiveness of the proposed strategy for sensorless controlling of
a PMSM motor driven by a fault-tolerant four-phase inverter over a wide
speed ranges under the case of a single phase open circuit.
Improved Stator Flux Estimation for Direct Torque Control of Induction Motor ...IJPEDS-IAES
Stator flux estimation using voltage model is basically the integration of the
induced stator back electromotive force (emf) signal. In practical
implementation the pure integration is replaced by a low pass filter to avoid
the DC drift and saturation problems at the integrator output because of the
initial condition error and the inevitable DC components in the back emf
signal. However, the low pass filter introduces errors in the estimated stator
flux which are significant at frequencies near or lower than the cutoff
frequency. Also the DC components in the back emf signal are amplified at
the low pass filter output by a factor equals to . Therefore, different
integration algorithms have been proposed to improve the stator flux
estimation at steady state and transient conditions. In this paper a new
algorithm for stator flux estimation is proposed for direct torque control
(DTC) of induction motor drives. The proposed algorithm is composed of a
second order high pass filter and an integrator which can effectively
eliminates the effect of the error initial condition and the DC components.
The amplitude and phase errors compensation algorithm is selected such that
the steady state frequency response amplitude and phase angle are equivalent
to that of the pure integrator and the multiplication and division by stator
frequency are avoided. Also the cutoff frequency selection is improved; even
small value can filter out the DC components in the back emf signal. The
simulation results show the improved performance of the induction motor
direct torque control drive with the proposed stator flux estimation algorithm.
The simulation results are verified by the experimental results.
Minimization of Starting Energy Loss of Three Phase Induction Motors Based on...IJPEDS-IAES
The purpose of this paper is to minimize energy losses consumed by three
phase induction motors during starting with wide range of load torque from
no load to full load. This will limit the temperature rise and allows for more
numbers of starting during a definite time. Starting energy losses
minimization is achieved by controlling the rate of increasing voltage
and frequency to start induction motor under certain load torque within a
definite starting time. Optimal voltage and frequency are obtained by particle
swarm optimization (PSO) tool according to load torque. Then, outputs of the
PSO are used to design a neuro-fuzzy controller to control the output voltage
and frequency of the inverter during starting for each load torque. The
starting characteristics using proposed method are compared to that of direct
on line and V/F methods. A complete model of the system is developed using
SIMULINK/MATLAB.
Hardware Implementation of Solar Based Boost to SEPIC Converter Fed Nine Leve...IJPEDS-IAES
Multi level inverters are widely used in high power applications because of
low harmonic distortion. This paper deals with the simulation
and implementation of PV based boost to SEPIC converter with multilevel
inverter. The output of PV system is stepped up using boost to sepic
converter and it is converted into AC using a multilevel inverter.
The simulation and experimental results with the R load is presented in this
paper. The FFT analysis is done and the THD values are compared. Boost to
SEPIC converter is proposed to step up the voltage to the required value. The
experimental results are compared with the simulation results. The results
indicate that nine level inverter system has better performance than seven
level inverter system.
Transformer Less Voltage Quadrupler Based DC-DC Converter with Coupled Induct...IJPEDS-IAES
In this paper a voltage quadrupler dc-dc converter with coupled inductor
and π filter is presented. The use of the coupled inductor reduces the high
leakage inductance which is present in a transformer enabled converter.
The output ripples in the converter is reduced by providing a π filter.
The interleaved voltage quadrupler is used in this system in order to boost the
output voltage. The voltage multiplier improves the output voltage gain.
The main advantage of this system is more voltage gain when compared with
the transformer eneabled circuit and the overall efficiency of the system is
improved. The circuit is simple to control. As a final point of this research,
the simulation and the hardware investigational results are presented to
demonstrate the effectiveness of this proposed converter.
IRAMY Inverter Control for Solar Electric VehicleIJPEDS-IAES
Solar Electric Vehicles (SEV) are considered the future vehicles to solve the issues of air pollution, global warming, and the rapid decreases of the petroleum resources facing the current transportation technology. However, SEV are still facing important technical obstacles to overcome. They include batteries energy storage capacity, charging times, efficiency of the solar panels and electrical propulsion systems. Solving any of those problems and electric vehicles will compete-complement the internal combustion engines vehicles. In the present work, we propose an electrical propulsion system based on three phase induction motor in order to obtain the desired speed and torque with less power loss. Because of the need to lightweight nature, small volume, low cost, less maintenance and high efficiency system, a three phase squirrel cage induction motor (IM) is selected in the electrical propulsion system. The IM is fed from three phase inverter operated by a constant V/F control method and Space Vector Pulse Width Modulation (SVPWM) algorithm. The proposed control strategy has been implemented on the texas instruments TM320F2812 Digital Signal Processor (DSP) to generate SVPWM signal needed to trigger the gates of IGBT based inverter. The inverter used in this work is a three phase inverter IRAMY20UP60B type. The experimental results show the ability of the proposed control strategy to generate a three-phase sine wave signal with desired frequency. The proposed control strategy is experimented on a locally manufactured EV prototype. The results show that the EV prototype can be propelled to speed up to 60km/h under different road conditions.
Design and Implementation of Single Phase AC-DC Buck-Boost Converter for Powe...IJPEDS-IAES
This paper discusses the Power Factor Correction (PFC) for single phase AC-DC Buck-Boost Converter (BBC) operated in Continuous Conduction Mode (CCM) using inductor average current mode control. The proposed control technique employs Proportional-Integral (PI) controller in the outer voltage loop and the Inductor Average Current Mode Control (IACMC) in the inner current loop for PFC BBC. The IACMC has advantages such as robustness when there are large variations in line voltage and output load. The PI controller is developed by using state space average model of BBC. The simulation of the proposed system with its control circuit is implemented in MatLab/Simulink. The simulation results show a nearly unity power factor can be attained and there is almost no change in power factor when the line frequency is at various ranges. Experimental results are provided to show its validity and feasibility.
Improvement of Wind farm with PMSG using STATCOMIJPEDS-IAES
This paper studies about the dynamic performance of the Permanent Magnet Synchronous Generator with Static Synchronous Compensator (STATCOM) for Wind farm integration. A whole dynamic model of wind energy conversion system (WECS) with PMSG and STATCOM are established in a MATLAB environment. With this model the dynamic behaviour of the generator and the overall system has been studied to determine the performance of them with and without STATCOM. Final results portrays that the WECS based PMSG with STATCOM improves the transient response of the wind farm when the system is in fault.
Modeling and Control of a Doubly-Fed Induction Generator for Wind Turbine-Gen...IJPEDS-IAES
This paper presents a vector control direct (FOC) of double fed induction generator intended to control the generated stator powers. This device is intended to be implemented in a variable-speed wind-energy conversion system connected to the grid. In order to control the active and reactive power exchanged between the machine stator and the grid, the rotor is fed by a bi-directional converter. The DFIG is controlled by standard relay controllers. Details of the control strategy and system simulation were performed using Simulink and the results are presented in this here to show the effectiveness of the proposed control strategy.
A Review on Design and Development of high Reliable Hybrid Energy Systems wit...IJPEDS-IAES
Hybrid Energy system is a combination of two or more different types of energy resources. Now a day this hybrid energy system plays key role in various remote area power applications. Hybrid energy system is more reliable than single energy system. This paper deals with high reliable hybrid energy system with solar, wind and micro hydro resources. The proposed hybrid system cable of multi mode operation and high reliable due to non communicated based controllers (Droop Characteristic Control) are used for optimal power sharing. Size of battery can be reduced because hydro used as back up source and Maximum power point Tracking also applied to solar and wind energy systems.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxR&R Consult
CFD analysis is incredibly effective at solving mysteries and improving the performance of complex systems!
Here's a great example: At a large natural gas-fired power plant, where they use waste heat to generate steam and energy, they were puzzled that their boiler wasn't producing as much steam as expected.
R&R and Tetra Engineering Group Inc. were asked to solve the issue with reduced steam production.
An inspection had shown that a significant amount of hot flue gas was bypassing the boiler tubes, where the heat was supposed to be transferred.
R&R Consult conducted a CFD analysis, which revealed that 6.3% of the flue gas was bypassing the boiler tubes without transferring heat. The analysis also showed that the flue gas was instead being directed along the sides of the boiler and between the modules that were supposed to capture the heat. This was the cause of the reduced performance.
Based on our results, Tetra Engineering installed covering plates to reduce the bypass flow. This improved the boiler's performance and increased electricity production.
It is always satisfying when we can help solve complex challenges like this. Do your systems also need a check-up or optimization? Give us a call!
Work done in cooperation with James Malloy and David Moelling from Tetra Engineering.
More examples of our work https://www.r-r-consult.dk/en/cases-en/
Welcome to WIPAC Monthly the magazine brought to you by the LinkedIn Group Water Industry Process Automation & Control.
In this month's edition, along with this month's industry news to celebrate the 13 years since the group was created we have articles including
A case study of the used of Advanced Process Control at the Wastewater Treatment works at Lleida in Spain
A look back on an article on smart wastewater networks in order to see how the industry has measured up in the interim around the adoption of Digital Transformation in the Water Industry.
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
Water scarcity is the lack of fresh water resources to meet the standard water demand. There are two type of water scarcity. One is physical. The other is economic water scarcity.
NO1 Uk best vashikaran specialist in delhi vashikaran baba near me online vas...Amil Baba Dawood bangali
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Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
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system bandwidth. The reason for higher bandwidth is that a faster dynamic response is achieved and also the
size of the passive component reduces.
Figure 1. Circuit diagram of MDIBC
Also, the sequence of the driving signals is very important which provides a double ripple frequency
in inductor current at the same switching frequency and to achieve the interleaved control. With the help of
this strategy, the switching pattern is shifted by 360◦/(n × m),where m is the number of parallel power
switches per channel, while n is the number of channels or phases. The input current ripple is (n × m) times
of the switching frequency. Similarly, the output voltage ripple is (n × m) times of the switching frequency
.As a result, the size of the passive components will be reduced by m times compared with the n-phase
interleaved dc/dc converters. In this proposed converter structure, m is selected to be 2, while n is chosen to
be 2. Figure 2 shows the gating pattern for interleaved boost converter. It is also assumed that the proposed
converter operates in the continuous conduction mode (CCM). All switches have identical duty cycles which
means d1 = d2 = d3 = d4 = d.
Figure 2. Sequence of the driving gate signals for MDIBC switches for d ≥ Ts/4
The design aspects of MDIBC are discussed in this section [4]-[5]:
a. Boost ratio
The voltage gain of the converter is a function of the duty ratio and it is defined as:
(1)
Where is the output voltage, is the input voltage and D is the duty ratio.
b. Input current
The input current can be calculated by the input power and the input voltage
(2)
Where is the input power, is the input voltage.
c. Inductor current ripple peak-to-peak amplitude:
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The inductor current ripple peak-peak amplitude is given by:
∆ , (3)
Where is the switching frequency, D is the duty cycle, is the input voltage and L is the inductance.
d. Relationship between input current ripple peak-to-peak amplitude and inductor current ripple
peak-to-peak amplitude
Mostly the minimum input ripple occurs at a duty ratio of 0.5 due to the 180 degree phase shifted
gating signals between the devices. There are two operating modes which can be defined by the inductor [6]-
[7]:
(i) Mode 1, D>0.5: over a particular period of time the current in both the inductors rises.
(ii) Mode2, D<0.5: over a specified period of time both the inductors discharge.
Hence the input current ripple peak-to –peak amplitude is given by,
∆
∙
∙
0.5
1 0.5
(4)
The design of IBC and MDIBC involves selection of inductor, output capacitor, number of phases, device
selection and the freewheeling diodes. The inductors and diodes have to be same in all the parallel paths of an
IBC and MDIBC.
e. Selection of inductor and capacitor:
Nowadays in the power electronic systems the magnetic components play a major role for energy
storage and filtering.The value of the inductor can be found out by the following formulae [8]:
∆
(5)
Where Vs represents the source voltage and ∆ represents the inductor current ripple, D represents the duty
ratio. The value of the capacitor is given by the formulae:
∆
(6)
Where Vo represents the output voltage (V), D represents the duty ratio, F represents the frequency, R
represents the resistance and ∆Vo represents the change in the output voltage (V).
f. Choosing the number of phases:
The factor which decides in choosing the number of phases is that the ripple content reduces with
the increases in the number of phases. There is a restriction to the increase in number of phases because if the
number of phases is increased further without much reduction in ripple content the size of the components
increases and hence increases the cost of performance [9]. It is to be noted that the number of inductor
switches and diodes are same as the number of phases and the switching frequency should be same for all the
phases.
g. Duty ratio:
The duty ratio selection is based on the number of phases, the ripple is minimum at a certain duty
ratio. Here in the ripple is minimum at duty ratio in the range of 0.45.
h. Selection of the devices:
The device which is chosen for the multidevice interleaved boost converter is power MOSFET
because of its high commutation speed and high efficiency at low voltages.
3. SIMULATION RESULTS
Based on the design equations, the proposed interleaved boost converter is designed and the
simulation parameters are shown in Table 1.
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Table 1. Simulation Parameters Of Multidevice Boost Converter At 0.45 Duty Ratio
PARAMETERS MULTIDEVICE IBC
Vin 24V
Vout 43.63V
Switching frequency 25khz
Output voltage ripple 3.63%
Input current ripple 0.055%
Inductor current ripple 0.1246%
Input current ripple frequency 100khz
Inductor current ripple frequency 50khz
Figure 3. Steady and transient response of MDIBC Figure 4. Output voltage ripple of MDIBC
The steady and transient response of multi device interleaved boost converter is shown in Figure 3.
The output voltage ripple waveform of multi device interleaved boost converter is shown in Figure 4.
Table 2 shows the comparison between conventional boost converter and multi device interleaved
boost converter at 0.45 duty ratio.
Table 2. Comparison between conventional interleaved boost converter and MDIBC for 0.45 duty ratio
PARAMETERS IBC MDIBC
Input Voltage 24V 24V
Output Voltage 42.2128V 44.25V
Input Current Ripple 3.28% 0.055%
Inductor Current Ripple 36.095% 0.1246%
Switching Frequency 25Khz 25Khz
Output Voltage Ripple Frequency 50Khz 100Khz
Input current Ripple Frequency 50Khz 100Khz
Inductor Current Ripple Frequency 25Khz 50Khz
From the results, it is found that the input current and output voltage ripple are reduced in the
proposed interleaved boost converter compared to the conventional topology.
4. POWER LOSS ANALYSIS
The power loss analysis of the converter includes power loss of the MOSFETs, diodes and main
inductor used in the converter circuit. The switching losses, conduction losses and inductor losses are
calculated and the results are tabulated. The power loss of MOSFET consists of the switching loss
(PSW(MOSFET)) and the conduction loss (PCOND(MOSFET)) [10]-[11]. The drain current waveform of
MOSFET obtained as a result of MATLAB simulation is considered for calculating conduction loss. The
MOSFET current during each time interval as shown in Figure 5 is used in calculating the rms value of drain
current.
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Figure 5. Drain current waveform of MOSFET
The PSW(MOSFET) is calculated on the basis of the overlap area of the drain-source voltage (VDS) and
drain current (IDrain) as shown in Figure 6. The switching frequency used is 20kHz.
Figure 6. Switching characteristics of Power MOSFET
Table 3. Switching and Conduction Loss of Power MOSFET for MultiDevice interleaved boost converter
POWER LOSS PARAMETER VALUE
Psw(MOSFET)×4 15.947W
PCOND(MOSFET) ×4 16.3772W
PMOSFET×4 32.3242W
A fast recovery diode was used as the main diode. The reverse recovery current is almost zero.
Thus, although the fsw is increased, the switching loss is not increased. The power loss of the diode
(PDIODE) consists of the reverse recovery loss (Ptrr(DIODE)) and the conduction loss (PCOND(DIODE)).
Table 4. Power Loss Of Diodes Of Multi Device Interleaved Boost Converter
POWER LOSS PARAMETER VALUE
(Ptrr) *4 0 W
(PRD)*4 84.8mW
(PVF )*4 1.79876W
(PSW(DIODE))*4 1.08W
(PCOND(DIODE)) *4 4.2W
PM DIODE 7.16356W
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The power losses of the main inductor (PML) consist of the core losses (PMfe) and the copper
losses (PMcu).
Table 5. Power Loss of Main Inductor
INDUCTOR POWER LOSS VALUE
(PMfe)×2 0.0594W
(PMcu)×2 6.114W
Therefore, the total loss of main inductor is found to be PML = 6.1734 W. Hence the power loss of
interleaved boost converter and multi device interleaved boost converter are calculated and tabulated as
shown in Table 6.
Table 6. Comparison of power loss between IBC and MDIBC
DEVICES IBC MDIBC
MOSFET 38.1815W 32.3252W
DIODES 7.01844W 7.16356W
INDUCTORS 6.539W 6.539W
TOTAL 51.7389W 46.0298W
From the above table, it is obvious that the power loss for multi device interleaved boost converter
are less than the conventional IBC. Hence multi device interleaved boost converter is implemented for
practical purposes.
5. HARDWARE IMPLEMENTATION
The hardware implementation of Multidevice interleaved boost converter basically consists of
power supply circuit, gating circuit and the proposed interleaved boost converter. The power supply to the
4N35 optocoupler is supplied by developing a power supply board consisting of 12V, 1mA transformer,
Bridge rectifier and a 12V regulator. To reduce the switching losses [12], IRFP460 power MOSFET is
employed as the main switch and FR-107 is used as freewheeling diodes. The gating pulses are generated by
PIC controller 18F4550 and given as input to optocoupler. The pulse generation from PIC circuit for firing
MDIBC switches is shown in Figure 8.
Figure 7. Output obtained from PIC circuit for firing
MDIBC
Figure 8. A Prototype of Multi device Interleaved
Boost converter with optocouplers and PIC circuit
Figure 8 shows that for an input voltage of 6.5V, an output of 12.94V is obtained as per the design
and the simulation results are verified. Figure 9 shows the output voltage of 11.42V for an input of 6.12V
measured using PQ analyzer.
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Figure 9. Output voltage of MDIBC measured using PQ analyzer
6. CONCLUSION
In this paper, a novel Multi Device Interleaved Boost Converter has been designed for fuel cell
applications. The simulation and experimental results have demonstrated that the inductor size and the
capacitor size of the MDIBC are reduced by two times compared to the conventional IBC. Moreover, the
current and voltage ripples are reduced by two times compared with the IBC topology. The power losses of
the proposed boost converter have been analyzed and the results were tabulated. The power loss results
shows that switching and conduction losses are less for MDIBC compared to the conventional IBC. The
maximum efficiency of the proposed interleaved converter is found to be 96.4%. Therefore, the proposed
converter seems to be very promising for high-power fuel cell systems to extend their lifespan as well as
battery systems. It is important to point out that the proposed converter can improve efficiency and reduce the
size of the passive components, leading to high reliability compared with other dc/dc converter topologies.
ACKNOWLEDGEMENT
The author wish to thank the management of SSN Institutions for providing the financial support
for carrying out this project.
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