Error detection and correction codes add additional data bits to transmitted messages to detect and possibly correct errors caused by noise during transmission. Error-detecting codes only detect errors while error-correcting codes can detect and correct errors by determining the location of corrupted bits. Common techniques for error detection include parity checks, which use an extra parity bit to make the total number of 1 bits in a message either even or odd.

1. ERROR DETECTION AND CORRECTION CODES
What is Error?
Error is a condition when the output information does not
match with the input information. During transmission, digital
signals suffer from noise that can introduce errors in the
binary bits travelling from one system to other. That means a
0 bit may change to 1 or a 1 bit may change to 0.

2. ERROR DETECTION AND CORRECTION CODES

3. ERROR DETECTION AND CORRECTION CODES
Error-Detecting codes
• Whenever a message is transmitted, it may get scrambled by noise or
data may get corrupted. To avoid this, we use error-detecting codes
which are additional data added to a given digital message to help us
detect if an error occurred during transmission of the message.
• A simple example of error-detecting code is parity check.

4. ERROR DETECTION AND CORRECTION CODES
Error-Correcting codes
• Along with error-detecting code, we can also pass some data to figure
out the original message from the corrupt message that we received.
This type of code is called an error-correcting code. Error-correcting
codes also deploy the same strategy as error-detecting codes but
additionally, such codes also detect the exact location of the corrupt
bit.

5. ERROR DETECTION AND CORRECTION CODES
• In error-correcting codes, parity check has a simple way to detect
errors along with a sophisticated mechanism to determine the
corrupt bit location. Once the corrupt bit is located, its value is
reverted (from 0 to 1 or 1 to 0) to get the original message.

6. ERROR DETECTION AND CORRECTION CODES
How to Detect and Correct Errors?
• To detect and correct the errors, additional bits are added to the data
bits at the time of transmission.
• The additional bits are called parity bits. They allow detection or
correction of the errors.
• The data bits along with the parity bits form a code word.

7. ERROR DETECTION AND CORRECTION CODES
• Parity Checking of Error Detection
• It is the simplest technique for detecting and correcting errors. The
MSB of an 8-bits word is used as the parity bit and the remaining 7
bits are used as data or message bits. The parity of 8-bits transmitted
word can be either even parity or odd parity.

8. ERROR DETECTION AND CORRECTION CODES
• Even parity -- Even parity means the number of 1's in the given word
including the parity bit should be even (2,4,6,....).
• Odd parity -- Odd parity means the number of 1's in the given word
including the parity bit should be odd (1,3,5,....).

9. ERROR DETECTION AND CORRECTION CODES
• Parity Generator
• It is combinational circuit that accepts an n-1 bit stream data and
generates the additional bit that is to be transmitted with the bit
stream. This additional or extra bit is termed as a parity bit.
• In even parity bit scheme, the parity bit is ‘0’ if there are even
number of 1s in the data stream and the parity bit is ‘1’ if there are
odd number of 1s in the data stream.
• In odd parity bit scheme, the parity bit is ‘1’ if there are even number
of 1s in the data stream and the parity bit is ‘0’ if there are odd
number of 1s in the data stream. Let us discuss both even and odd
parity generators.

10. ERROR DETECTION AND CORRECTION CODES
Even Parity Generator
• Let us assume that a 3-bit message is to be transmitted with an even
parity bit. Let the three inputs A, B and C are applied to the circuits
and output bit is the parity bit P. The total number of 1s must be
even, to generate the even parity bit P.
• The figure below shows the truth table of even parity generator in
which 1 is placed as parity bit in order to make all 1s as even when
the number of 1s in the truth table is odd.

11. ERROR DETECTION AND CORRECTION CODES

12. ERROR DETECTION AND CORRECTION CODES
Odd Parity Generator
• Let us consider that the 3-bit data is to be transmitted with an odd
parity bit. The three inputs are A, B and C and P is the output parity
bit. The total number of bits must be odd in order to generate the
odd parity bit.
• In the given truth table below, 1 is placed in the parity bit in order to
make the total number of bits odd when the total number of 1s in the
truth table is even.

13. ERROR DETECTION AND CORRECTION CODES

14. ERROR DETECTION AND CORRECTION CODES
Parity Check
• It is a logic circuit that checks for possible errors in the transmission.
• This circuit can be an even parity checker or odd parity checker depending
on the type of parity generated at the transmission end.
• When this circuit is used as even parity checker, the number of input bits
must always be even.
• When a parity error occurs, the ‘sum even’ output goes low and ‘sum odd’
output goes high.
• If this logic circuit is used as an odd parity checker, the number of input bits
should be odd.
• When a parity error occurs the ‘sum odd’ output goes low and ‘sum even’
output goes high.

15. Even Parity Checker
• Consider that three input message along with even parity bit is generated at
the transmitting end.
• These 4 bits are applied as input to the parity checker circuit which checks
the possibility of error on the data. Since the data is transmitted with even
parity, four bits received at circuit must have an even number of 1s.
• If any error occurs, the received message consists of odd number of 1s. The
output of the parity checker is denoted by PEC (parity error check).
ERROR DETECTION AND CORRECTION CODES

16. The below table shows the truth table for the even parity checker in which PEC
= 1 if the error occurs, i.e., the four bits received have odd number of 1s and
PEC = 0 if no error occurs, i.e., if the 4-bit message has even number of 1s.
ERROR DETECTION AND CORRECTION CODES

17. Odd Parity Checker
• Consider that a three bit message along with odd parity bit is transmitted at
the transmitting end.
• Odd parity checker circuit receives these 4 bits and checks whether any error
are present in the data.
• If the total number of 1s in the data is odd, then it indicates no error, whereas
if the total number of 1s is even then it indicates the error since the data is
transmitted with odd parity at transmitting end.
ERROR DETECTION AND CORRECTION CODES

18. The below figure shows the truth table for odd parity generator where PEC =1 if
the 4-bit message received consists of even number of 1s (hence the error
occurred) and PEC= 0 if the message contains odd number of 1s (that means no
error).
ERROR DETECTION AND CORRECTION CODES

19. EBCDIC CODE
• Extended Binary Coded Decimal Interchange Code
• EBCDIC was first used on the successful System/360, announced on
1964-04-07, and survived for many years.
• 8-bit alphanumeric code developed by IBM
• It supports 256 symbols.
• It is a coding method that present letters, numbers, or other symbols
in a binary language.
• EBCDIC is similar to ASCII commonly used on most computers and
computer equipment today.
• It was mainly used in IBM mainframe computers.
ERROR DETECTION AND CORRECTION CODES

20. ERROR DETECTION AND CORRECTION CODES
Char EBCDIC HEX Char EBCDIC HEX Char EBCDIC HEX
A 1100 0001 C1 P 1101 0111 D7 4 1111 0100 F4
B 1100 0010 C2 Q 1101 1000 D8 5 1111 0101 F5
C 1100 0011 C3 R 1101 1001 D9 6 1111 0110 F6
D 1100 0100 C4 S 1110 0010 E2 7 1111 0111 F7
E 1100 0101 C5 T 1110 0011 E3 8 1111 1000 F8
F 1100 0110 C6 U 1110 0100 E4 9 1111 1001 F9
G 1100 0111 C7 V 1110 0101 E5 blank ... ...
H 1100 1000 C8 W 1110 0110 E6 . ... ...
I 1100 1001 C9 X 1110 0111 E7 ( ... ...
J 1101 0001 D1 Y 1110 1000 E8 + ... ...
K 1101 0010 D2 Z 1110 1001 E9 $ ... ...
L 1101 0011 D3 0 1111 0000 F0 * ... ...
M 1101 0100 D4 1 1111 0001 F1 ) ... ...
N 1101 0101 D5 2 1111 0010 F2 - ... ...
O 1101 0110 D6 3 1111 0011 F3 /