This document discusses parity circuits and comparators in digital electronics. It describes how parity bits are used to detect errors during data transmission by making the total number of 1s in a message either even or odd. Parity generators add the parity bit and parity checkers detect errors by checking the parity. Even and odd parity circuits are explained along with examples of 3-bit generators and 4-bit checkers. The document also describes how magnitude comparators work by taking two binary numbers as input and determining if one is greater than, less than, or equal to the other. Examples of 1-bit and 2-bit comparators are presented along with their truth tables, K-maps, and logic circuits.

1. Module I
Digital electronics
Parity circuits and comparators

2. Parity Bit
• In digital electronic systems, during data transmission and
processing, data gets distorted. This is due to the noises added
to it. Such noises change 0s to 1s and 1s to 0s.
• A parity bit is an extra bit in any binary message to make the
total number of 1’s either odd or even. We need to add the
parity bit to a signal. This is done by the Parity generator. This
parity inclusive binary message then transmits from transmitter
to receiver end.
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3. Parity generator and checker
• A parity generator is a combinational logic circuit that
generates the parity bit in the transmitter.
• On the other hand, a circuit that checks the parity in the
receiver is called parity checker.
• The parity generating technique is mostly used in error
detection techniques for the data transmission.
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There are two types of parity circuits
• Even Parity circuit
In even parity bit scheme, the parity bit is ‘0’ if there are even
number of 1s in the data stream and the parity bit is ‘1’ if there
are odd number of 1s in the data stream.
• Odd Parity circuit
In odd parity bit scheme, the parity bit is ‘1’ if there are even
number of 1s in the data stream and the parity bit is ‘0’ if there
are odd number of 1s in the data stream. Let us discuss both even
and odd parity generators.
Type of parity generator circuits

5. Even Parity Generator
• Let A, B, and C be input bits and Y be output
that is even parity bit. Even parity generates as
a result of the calculation of the number of
ones in the message bit.
• If the number of 1s is even Y gets the value as
0, and if it is odd, then the parity bit Y gets the
value 1. Following is the truth table for 3-bit
even parity generator.
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6. Truth Table
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The k-map for three-bit input even parity

8. Simplified Expression
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9. • This circuit is just generating the parity bit. The complete signal
is a combination of the message signal and the parity bit.
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10. 3 bit Odd Parity Generator
• Let us consider that the 3-bit data is to be transmitted with an odd parity bit.
The three inputs are A, B and C and P is the output parity bit. The total
number of bits must be odd in order to generate the odd parity bit.
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The total number of 1s in the input bits must be odd for the odd parity bit. If
the total number of 1s in input bits is odd, then P gets the value 0, and if it is
even then, P is assigned the value 1.

12. Parity Checker
• A parity checker is a logical circuit that checks data transmission
errors. Based on the type of parity generated, it can be even a
parity checker or odd parity checker. The number of inputs must
be even for even parity checker and odd for odd parity checker.
If a parity error occurs, the “even” output goes low, and “odd’
output goes high in case of even parity checker. It is the other
way round for odd parity checker.
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13. Even Parity Checker
• Consider that three input message along with even parity bit is generated at the
transmitting end. These 4 bits are applied as input to the parity checker circuit
which checks the possibility of error on the data. Since the data is transmitted
with even parity, four bits received at circuit must have an even number of 1s.
• The below table shows the truth table for the even parity checker in which PEC
= 1 if the error occurs, i.e., the four bits received have odd number of 1s and
PEC = 0 if no error occurs, i.e., if the 4-bit message has even number of 1s.
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15. Odd Parity Checker
• The truth table for odd parity generator where PEC =1 if the 4-bit message
received consists of even number of 1s (hence the error occurred) and PEC=
0 if the message contains odd number of 1s (that means no error).
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16. Practice Problem
• Derive a circuit a 3-bit parity generator and
4 bit parity checker.
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17. Comparator
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A digital comparator or magnitude comparator is
a hardware electronic device that takes two
numbers as input in binary form and determines
whether one number is greater than, less than or
equal to the other number. Comparators are used
in central processing unit s (CPUs) and
microcontrollers (MCUs).

18. Comparator
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19. • Identity Comparator
Comparators that have only one output
terminal and produces the output either low or
high are identity comparators.
• Magnitude Comparator
Comparators with three output terminals and
checks for three conditions i.e greater than or
less than or equal to is magnitude comparator.
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21. 1- Bit Magnitude Comparator
• This magnitude comparator has two inputs
A and B
• Three outputs A<B, A=B and A>B.
• This magnitude comparator compares the
two numbers of single bits
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22. Truth Table
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23. K-Maps
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24. Logic Circuit of Comparator
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25. 2-bit Comparator
• A 2-bit comparator compares two binary
numbers, each of two bits and produces
their relation such as one number is equal
or greater than or less than the other.
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27. Truth Table
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28. Simplified expressions
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29. Logic Circuit Diagram
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