Basics of Digital Systems Lab Dept. of ECE
KL University, Guntur
1. Realization of gates using Universal gates
Aim: To realize all logic gates using NAND and NOR gates.
Apparatus:
Circuit Diagram:
I. Implementation using NAND gate:
(a) NOT gate:
(b) AND gate:
(c) OR gate:
(d) NOR gate:
S. No Description of Item Quantity
1. IC 7400 01
2. IC 7402 01
3. Digital Trainer Kit 01
4. Bread Board 01
A Y
0 1
1 0
A B Y
0 0 0
0 1 0
1 0 0
1 1 1
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
A B Y
0 0 1
0 1 0
1 0 0
1 1 0
Basics of Digital Systems Lab Dept. of ECE
KL University, Guntur
(e) Ex-OR gate:
II. Implementation using NOR gate:
(a) NOT gate:
(b) AND gate:
(c) OR gate:
(d) NAND gate:
(e) Ex-NOR gate:
A B Y
0 0 0
0 1 1
1 0 1
1 1 0
A Y
0 1
1 0
A B Y
0 0 0
0 1 0
1 0 0
1 1 1
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
A B Y

Universal gates r008

  • 1.
    Basics of DigitalSystems Lab Dept. of ECE KL University, Guntur 1. Realization of gates using Universal gates Aim: To realize all logic gates using NAND and NOR gates. Apparatus: Circuit Diagram: I. Implementation using NAND gate: (a) NOT gate: (b) AND gate: (c) OR gate: (d) NOR gate: S. No Description of Item Quantity 1. IC 7400 01 2. IC 7402 01 3. Digital Trainer Kit 01 4. Bread Board 01 A Y 0 1 1 0 A B Y 0 0 0 0 1 0 1 0 0 1 1 1 A B Y 0 0 0 0 1 1 1 0 1 1 1 1 A B Y 0 0 1 0 1 0 1 0 0 1 1 0
  • 2.
    Basics of DigitalSystems Lab Dept. of ECE KL University, Guntur (e) Ex-OR gate: II. Implementation using NOR gate: (a) NOT gate: (b) AND gate: (c) OR gate: (d) NAND gate: (e) Ex-NOR gate: A B Y 0 0 0 0 1 1 1 0 1 1 1 0 A Y 0 1 1 0 A B Y 0 0 0 0 1 0 1 0 0 1 1 1 A B Y 0 0 0 0 1 1 1 0 1 1 1 1 A B Y 0 0 1 0 1 1 1 0 1 1 1 0 A B Y