This document proposes an enhanced version of the Advanced Encryption Standard (AES) called E-AES. E-AES increases the key size to 2048 bits and the block size to 1024 bits. This provides more security than AES, which uses a 128, 192, or 256 bit key on a 128 bit block. E-AES specifies 64 rounds of encryption, compared to AES which uses 10 to 14 rounds depending on key size. The encryption process of E-AES involves four transformations at each round: byte substitution using an S-box, shifting rows of the state matrix, mixing data within columns, and adding a round key. This enhanced algorithm is proposed to address known attacks on AES and the use of its 16 year old standard with
Arm recognition encryption by using aes algorithmeSAT Journals
Abstract To provide the security of the Military confidential data we use encryption algorithm which take over reward of superior encryption algorithm. The proposed implementation using encryption algorithm was implemented on ARM 7 to encrypt and decrypt the confidential data on data storage devices such as SD card or Pen drive. The main objective of proposed implementation is to provide protection for storage devices. The ARM and encryption algorithm protect the data accessibility, reliability and privacy successfully. Since (AES) Advanced Encryption Standard algorithm is widely used in an embedded system or fixed organization. These AES algorithms are used for proper designs in defense for security. Keywords: Plain text, Cipher text, Data security, AES, Embedded System.ARM, storage device.
IRJET- Implementation of AES Algorithm in Arduino Mega2560 BoardIRJET Journal
1) The document discusses the implementation of the Advanced Encryption Standard (AES) algorithm for encryption on an Arduino Mega2560 board. AES was chosen to securely transmit sensor data collected by microcontrollers.
2) AES provides stronger encryption than older standards like DES and 3DES through its larger key sizes of 128, 192, and 256 bits and more rounds of encryption. The document implements a simple version of AES on the Arduino board.
3) Testing showed the AES code used 8824 bytes of program storage on the Arduino and encryption took 3016 microseconds while decryption took 3792 microseconds, demonstrating AES can provide security for resource-constrained devices.
IMPLEMENTATION OF AES AS A CUSTOM HARDWARE USING NIOS II PROCESSORacijjournal
This document describes the implementation of the Advanced Encryption Standard (AES) algorithm as a custom hardware accelerator connected to a Nios II processor system. AES was written in VHDL and connected to the Nios II system through GPIO pins. This allows AES operations to be controlled through C code in the Nios II IDE while running the AES algorithm in hardware, improving encryption speeds significantly compared to an all-software implementation. Synthesis results showed the hardware AES implementation reduced the number of clock cycles needed for encryption by over 99% compared to running AES solely in software on the Nios II processor.
An Efficient VLSI Architecture for AES and It's FPGA ImplementationIRJET Journal
This document discusses the design and FPGA implementation of an efficient VLSI architecture for the AES encryption algorithm. It begins with an introduction to cryptography and the AES algorithm. It then describes the key components of AES including the state array, substitution bytes, shift rows, mix columns, add round key transformations, and key expansion. The document proposes a pipelined design to reduce encryption delay by generating round keys in parallel with encryption rounds. Simulation results show this pipelined AES architecture can operate at higher clock frequencies, increasing encryption throughput for time-critical applications. In conclusion, the hardware implementation provides faster encryption speeds and higher throughput compared to a software solution.
Hardware implementation of aes encryption and decryption for low area & power...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
hardware implementation of aes encryption and decryption for low area & low p...Kumar Goud
Abstract-An AES algorithm is implemented on FPGA platform to improve the safety of data in transmission. AES algorithms can be implemented on FPGA in order to speed data processing and reduce time for key generating. We achieve higher performance by maintaining standard speed and reliability with low area and power. The 128 bit AES algorithm is implements on a FPGA using VHDL language with help of Xilinx tool.
Implementation of Cryptography Architecture with High Secure CoreIJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
International Journal of Modern Engineering Research (IJMER) covers all the fields of engineering and science: Electrical Engineering, Mechanical Engineering, Civil Engineering, Chemical Engineering, Computer Engineering, Agricultural Engineering, Aerospace Engineering, Thermodynamics, Structural Engineering, Control Engineering, Robotics, Mechatronics, Fluid Mechanics, Nanotechnology, Simulators, Web-based Learning, Remote Laboratories, Engineering Design Methods, Education Research, Students' Satisfaction and Motivation, Global Projects, and Assessment…. And many more.
Ciphering algorithms play a main role in information security systems. Therefore in this paper we are
considering the important performance of these algorithms like CPU time consumption, memory usage and
battery usage. This research tries to demonstrate a fair comparison between the most common algorithms
and with a novel method called Secured Watermark System (SWS) in data encryption field according to
CPU time, packet size and power consumption. It provides a comparison the most known algorithms used
in encryption: AES (Rijndael), DES, Blowfish, and Secured Watermark System (SWS).
For comparing these algorithms with each other variations of data block sizes, and a variation of
encryption-decryption speeds where used in this research.
In addition a comparison with different platforms such as Windows 8, Windows XP and Linux has been
conducted. Finally the results of the experimentation demonstrate the performance and efficiency of the
compared encryption algorithms with different parameters.
Arm recognition encryption by using aes algorithmeSAT Journals
Abstract To provide the security of the Military confidential data we use encryption algorithm which take over reward of superior encryption algorithm. The proposed implementation using encryption algorithm was implemented on ARM 7 to encrypt and decrypt the confidential data on data storage devices such as SD card or Pen drive. The main objective of proposed implementation is to provide protection for storage devices. The ARM and encryption algorithm protect the data accessibility, reliability and privacy successfully. Since (AES) Advanced Encryption Standard algorithm is widely used in an embedded system or fixed organization. These AES algorithms are used for proper designs in defense for security. Keywords: Plain text, Cipher text, Data security, AES, Embedded System.ARM, storage device.
IRJET- Implementation of AES Algorithm in Arduino Mega2560 BoardIRJET Journal
1) The document discusses the implementation of the Advanced Encryption Standard (AES) algorithm for encryption on an Arduino Mega2560 board. AES was chosen to securely transmit sensor data collected by microcontrollers.
2) AES provides stronger encryption than older standards like DES and 3DES through its larger key sizes of 128, 192, and 256 bits and more rounds of encryption. The document implements a simple version of AES on the Arduino board.
3) Testing showed the AES code used 8824 bytes of program storage on the Arduino and encryption took 3016 microseconds while decryption took 3792 microseconds, demonstrating AES can provide security for resource-constrained devices.
IMPLEMENTATION OF AES AS A CUSTOM HARDWARE USING NIOS II PROCESSORacijjournal
This document describes the implementation of the Advanced Encryption Standard (AES) algorithm as a custom hardware accelerator connected to a Nios II processor system. AES was written in VHDL and connected to the Nios II system through GPIO pins. This allows AES operations to be controlled through C code in the Nios II IDE while running the AES algorithm in hardware, improving encryption speeds significantly compared to an all-software implementation. Synthesis results showed the hardware AES implementation reduced the number of clock cycles needed for encryption by over 99% compared to running AES solely in software on the Nios II processor.
An Efficient VLSI Architecture for AES and It's FPGA ImplementationIRJET Journal
This document discusses the design and FPGA implementation of an efficient VLSI architecture for the AES encryption algorithm. It begins with an introduction to cryptography and the AES algorithm. It then describes the key components of AES including the state array, substitution bytes, shift rows, mix columns, add round key transformations, and key expansion. The document proposes a pipelined design to reduce encryption delay by generating round keys in parallel with encryption rounds. Simulation results show this pipelined AES architecture can operate at higher clock frequencies, increasing encryption throughput for time-critical applications. In conclusion, the hardware implementation provides faster encryption speeds and higher throughput compared to a software solution.
Hardware implementation of aes encryption and decryption for low area & power...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
hardware implementation of aes encryption and decryption for low area & low p...Kumar Goud
Abstract-An AES algorithm is implemented on FPGA platform to improve the safety of data in transmission. AES algorithms can be implemented on FPGA in order to speed data processing and reduce time for key generating. We achieve higher performance by maintaining standard speed and reliability with low area and power. The 128 bit AES algorithm is implements on a FPGA using VHDL language with help of Xilinx tool.
Implementation of Cryptography Architecture with High Secure CoreIJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
International Journal of Modern Engineering Research (IJMER) covers all the fields of engineering and science: Electrical Engineering, Mechanical Engineering, Civil Engineering, Chemical Engineering, Computer Engineering, Agricultural Engineering, Aerospace Engineering, Thermodynamics, Structural Engineering, Control Engineering, Robotics, Mechatronics, Fluid Mechanics, Nanotechnology, Simulators, Web-based Learning, Remote Laboratories, Engineering Design Methods, Education Research, Students' Satisfaction and Motivation, Global Projects, and Assessment…. And many more.
Ciphering algorithms play a main role in information security systems. Therefore in this paper we are
considering the important performance of these algorithms like CPU time consumption, memory usage and
battery usage. This research tries to demonstrate a fair comparison between the most common algorithms
and with a novel method called Secured Watermark System (SWS) in data encryption field according to
CPU time, packet size and power consumption. It provides a comparison the most known algorithms used
in encryption: AES (Rijndael), DES, Blowfish, and Secured Watermark System (SWS).
For comparing these algorithms with each other variations of data block sizes, and a variation of
encryption-decryption speeds where used in this research.
In addition a comparison with different platforms such as Windows 8, Windows XP and Linux has been
conducted. Finally the results of the experimentation demonstrate the performance and efficiency of the
compared encryption algorithms with different parameters.
Dynamic selection of symmetric key cryptographic algorithms for securing data...csandit
Most of the information is in the form of electronic data. A lot of electronic data exchanged
takes place through computer applications. Therefore information exchange through these
applications needs to be secure. Different cryptographic algorithms are usually used to address
these security concerns. However, along with security there are other factors that need to be
considered for practical implementation of different cryptographic algorithms like
implementation cost and performance. This paper provides comparative analysis of time taken
for encryption by seven symmetric key cryptographic algorithms (AES, DES, Triple DES, RC2,
Skipjack, Blowfish and RC4) with variation of parameters like different data types, data density,
data size and key sizes.
Fault Detection Scheme for AES Using Composite FieldAJAL A J
The cipher Rijndael is one of the five finalists of the Advanced Encryption Standard (AES)
The algorithm has been designed by Joan Daemen and Vincent Rijmen
It is a Block cipher.
The hardware implementation with 128-bit blocks and 128-bit keys is presented.
VLSI optimizations of the Rijndael algorithm are discussed and several hardware design modifications and techniques are used, such as memory sharing and parallelism.
IRJET- Hardware and Software Co-Design of AES Algorithm on the basis of NIOS ...IRJET Journal
1. The document discusses a hardware-software co-design of the AES encryption algorithm implemented on the NIOS II soft-core processor on an FPGA.
2. It proposes using a hardware-software co-design methodology to implement AES for encryption and decryption of 128-bit blocks using 128, 192, or 256-bit keys.
3. The implementation will utilize the Quartus II software tools and NIOS II integrated development environment to program the FPGA with the AES algorithm designed around the NIOS II soft-core processor.
PREDOMINANCE OF BLOWFISH OVER TRIPLE DATA ENCRYPTION STANDARD SYMMETRIC KEY A...IJNSA Journal
Computer data communication is the order of the day with Information Communication Technology (ICT) playing major role in everyone’s life, communicating with smart phones, tabs, laptops and desktops using internet. Security of the data transferred over the computer networks is most important as for as an organization is concerned. Hackers attempt hard to crack the software key and indulge in cyber crimes. In this paper, the main concern is not only to provide security to the data transferred at the software level but it provides the security at hardware level by the modified Blowfish Encryption and Decryption Algorithms. It results minimum delay, high speed, high throughput] and effective memory utilization compared to Blowfish (BF) and Triple Data Encryption Standard (TDES) algorithms. The implementation of Blowfish with modulo adder and Wave Dynamic Differential Logic (WDDL) is to provide security against Differential power analysis (DPA). In the proposed four implementations, BF with constant delay n-bit adder (BFCDNBA) yielded minimum delay, maximum frequency, high memory utilization and high throughput compared to BF with modulo adder and WDDL logic (BFMAWDDL), BF with modulo adder (BFMA) and TDES algorithms. The VLSI implementation of Blowfish and TDES algorithms is done using Verilog HDL.
1) The document discusses an enhancement to the AES encryption algorithm by adding an additional layer of security using the Caesar cipher encryption algorithm.
2) The enhancement aims to make the algorithm more secure by making the key variable for each letter encrypted using the Caesar cipher, removing vulnerabilities to common attacks.
3) The enhancement provides extra protection to the already secure AES algorithm and increases the security level, while being transparent to the user.
Simulated Analysis and Enhancement of Blowfish Algorithmiosrjce
This paper represents or analyzes the security of system based on Blowfish. Blowfish mainly focuses
on the encrypt and decrypt techniques and algorithms apply for cryptanalysis. It describe the algorithms for
encryption as well as decryption algorithms and also give the sufficient description of key generation, key
expansion, function and working principle of Blowfish cipher with proper explanations. Taking the current era,
Most of the famous systems which offer security for a network or web or to a data are vulnerability to attacks and
they are broken at some point of time by effective cryptanalysis methods, irrespective of its complex algorithmic
design. In the general, today’s cryptography world is bounded to an interpretive of following any one or multi
encryption scheme and that too for a single iteration on a single file only. This is evident in the maximum of the
encryption-decryption cases. It also describes the comparisons between older blowfish and enhances blowfish. It
also shows enhance Blowfish algorithm for encryption and decryption of data. It is also give the proper simulated
analysis of encryption and decryption time for different file formats using a windows application. It describe
feature of application and its process and efficiency as well as calculation of time and throughput.
Encryption and Compression of Audio-Video Data Using Enhanced AES and J-Bit A...ijsrd.com
AES is considered a good encryption algorithm in terms of providing security to a network in passing information (data) in form of audio, string, and video and in any other form. However it yields a low throughput resulting in slowness and increasing energy dispensation of server or an application. The Enhanced AES algorithm is proposed in this paper which works by using sequence counters and provides improved throughput as compare to conventional AES algorithm. The J-Bit Encoding is being a compression algorithm in lossless category which doesn't decrease the quality but reduce the size of data to some extent. It has been observed that the proposed encryption algorithm integrated to J-Bit Encoding algorithm will provide the effective security measures as well as increased throughput as a parameter and less bandwidth usage as the actual size of data shall not be sent along the network.
Hybrid Cryptography security in public cloud using TwoFish and ECC algorithmIJECEIAES
Cloud computing is a structure for rendering service to the user for free or paid basis through internet facility where we can access to a bulk of shared resources which results in saving managing cost and time for large companies, The data which are stored in the data center may incur various security, damage and threat issues which may result in data leakage, insecure interface and inside attacks. This paper will demonstrate the implementation of hybrid cryptography security in public cloud by a combination of Elliptical Curve Cryptography and Twofish algorithm, which provides an innovative solution to enhance the security features of the cloud so that we can improve the service thus results in increasing the trust over the technology.
Wireless Network Security Architecture with Blowfish Encryption ModelIOSR Journals
Abstract: In this research paper ,we developed a model for a large network, wireless nodes are interconnected and each can be considered as a node processor that offer services to other node processors connected to a specific network. A very high proportion of the nodes that offer services need to carry out an authentication process so as to make an access request to the node offering the service. In this context, an integrated reconfigurable network security architecture moved to the application layer has become the need of the day for secure wireless data sharing. The security schemes of the seven layer OSI architecture need to be placed intrinsically in the wireless node itself and should be capable of supporting the MAC layer, IP address based layer and the routing protocols of the network layer. This work focuses on the use of emulator and embedded hardware architectures for wireless network security. In this work, the individual nodes can have a unique security signature pattern maintained by respective wireless nodes using an encryption algorithm and this is made dynamic. The metrics includes latency, throughput, Scalability, Effects of data transfer operation on node processor and application data located in the processor Keywords:Wireless Network security, Embedded hardware, Reconfigurable architecture, blowfish algorithm
IRJET-Security Enhancement in Next Generation Networks using Enhanced AES wit...IRJET Journal
This document proposes enhancing the Advanced Encryption Standard (AES) algorithm for increased security in next generation networks. The enhancement involves converting the static AES S-box into a dynamic S-box using the RC4 stream cipher and AES key scheduling algorithm. This makes the system resistant to attacks by preventing repetition of the cipher key. AES would also be implemented in a round structure to increase the complexity of the system. The performance of the traditional and enhanced AES would be compared based on encryption time, decryption time, CPU usage, and throughput. The goal is to achieve speeds compatible with 4G LTE networks while enhancing security.
An improved geo encryption algorithm in location based serviceseSAT Journals
Abstract Wireless technology is used in many applications with location based data encryption techniques to secure the communication. The use of knowledge of the mobile user's location called Geo-encryption, produces more secure systems that can be used in different mobile applications. Location Based Data Encryption Methods (LBDEM) is a technique used to enhance the security of such applications called as Location Based Services (LBS). It collects position, time, latitude coordinates and longitude coordinates of mobile nodes and uses for the encryption and decryption process. Geo-encryption plays an important role to raise the security of LBS. Different Geo-protocols have been developed in the same area to add security with better throughput. The Advanced Encryption Standard in Geo-encryption with Dynamic Tolerance Distance (AES-GEDTD) is an approach which gives higher security with a great throughput. This approach mainly uses the AES algorithm, symmetric key encryption algorithm. But applying this algorithm to more complex data like images, videos, etc. like in Digital Film Distribution, we might face the problem of computational overhead. To overcome this problem, we analyze AES and modify it, to reduce the computational overhead. In the modified AES algorithm (M-AES), we omit the calculation of mix column operations and hence the M-AES-GEDTD is a fast and lightweight algorithm for multimedia data. Keywords: Geo-encryption; LBDEM; LBS, Geo-locked Keys .
International Journal of Engineering Research and Development (IJERD)IJERD Editor
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IRJET- Design and Implementation of 256-Bits Cryptography Algorithm used in t...IRJET Journal
The document describes a proposed 256-bit cryptography algorithm implemented in VHDL that is resistant to brute-force and timing attacks. The algorithm uses a modified version of the Data Encryption Standard (DES) to encrypt 256-bit plaintext into 256-bit ciphertext using a 224-bit cipher key. It then applies a Hamming(448,256) error correcting code to the ciphertext to generate the final 448-bit encrypted data. Simulation results show the encryption and decryption processes encrypt the plaintext into ciphertext and recover the original plaintext, with an encryption time of 19.231 nanoseconds, making the algorithm resistant to brute-force and timing attacks.
International Journal of Engineering Inventions (IJEI) provides a multidisciplinary passage for researchers, managers, professionals, practitioners and students around the globe to publish high quality, peer-reviewed articles on all theoretical and empirical aspects of Engineering and Science.
Cryptography technology is a security technique used to change plain text to another shape of data or to
symbols, which is known as the cipher text. Cryptography aims to keep the data secure during its journey
through public networks. Currently, there are many proposed algorithms that provide this service
especially for sensitive data or very important conversations either through mobile or video conferences. In
this paper, an inventive security symmetric algorithm is implemented and evaluated, and its performance is
compared to the AES. The algorithm has four different rounds for each quarter of the key container table,
and each of them serves to shift the table. The algorithm uses the XOR operation, which, being lightweight
and cheap, is very appropriate for use with Real Time Applications. The result shows that the suggested
algorithm spends less time than AES although it has 16 rounds and the numbers used to mix up the table
are big.
With increasing technology development in field of communication and Electronic devices, there is a need for better security service for information transfer in Medical Sectors, Banking, Financial and in other IoT applications etc. Fight against security attacks is of prime importance. Through Cryptographic techniques we can provide Authenticity as well as Confidentiality for the user data. In this paper, hardware implementation has been described for a real-time application of speech data encryption and decryption using AES algorithm along with the speech recognition using cross correlation technique. Verilog programming environment is used for AES cryptography whereas MATLAB is used for Speech recognition. ASIC design on AES core is implemented using Cadence tools. Number of gates, area and power used by AES core design has been drastically reduced by specifying wide range of constraints during front end designing. In Backend designing, layout of AES design, which is the physical geometric representation is also developed.
Pipelining Architecture of AES Encryption and Key Generation with Search Base...VLSICS Design
A high speed security algorithm is always important for wired/wireless environment. The symmetric block cipher plays a major role in the bulk data encryption. One of the best existing symmetric security algorithms to provide data security is AES. AES has the advantage of being implemented in both hardware and software. Hardware implementation of the AES has the advantage of increased throughput and offers better security. Search based S-box architecture has been proposed in this paper to reduce the constraint in the hardware resources. The pipelined architecture of the AES algorithm is proposed in order to increase the throughput of the algorithm. Moreover the key schedule algorithm of the AES encryption is pipelined to get the speedup.
Privacy Preserving and Ownership in Cloud Computing using Symmetric Key Encry...IRJET Journal
This document summarizes a research paper that proposes a model for privacy and data ownership in cloud computing using symmetric key encryption. The model uses AES-256 encryption to encrypt user data uploaded to the cloud, providing security. AES-256 is shown to be faster than other encryption algorithms like AES-128, AES-192, and DES. The proposed model includes user registration, encrypted file uploading and downloading using AES-256, and a trusted third party for sharing files between authorized users while maintaining security. Experimental results show AES-256 provides faster encryption than other algorithms.
An Efficient VLSI Design of AES Cryptography Based on DNA TRNG DesignIRJET Journal
This document describes an efficient VLSI design for AES cryptography using a true random number generator (TRNG) and DNA encoding. It aims to improve security and reduce area and delay compared to standard AES. The design generates random round keys using a TRNG instead of the standard key expansion process. It further encodes a partial key from the TRNG using DNA encoding to produce the full 128-bit key, strengthening security. Simulation and synthesis results show the TRNG-based AES has lower area and delay than standard AES. Combining the TRNG with DNA encoding further optimizes the design.
Performance Analysis of Application for Security Enhancements using Cryptanal...IRJET Journal
The document discusses performance analysis of applications for security enhancements using cryptanalysis. It begins with an introduction to cryptography and the Advanced Encryption Standard (AES). It then discusses using dynamic S-boxes generated by the RC4 algorithm to increase the security and complexity of AES. The proposed system uses a round structure and dynamic S-boxes to enhance AES security. Performance is evaluated based on randomness tests including strict avalanche criteria, differential approximation probability, and linear approximation probability. Results show encryption with the enhanced AES using dynamic S-boxes increases security and takes slightly longer than standard AES.
Security Enhancement in Next Generation Networks using Enhanced AES with RC4 ...IRJET Journal
This document proposes enhancing the Advanced Encryption Standard (AES) algorithm for increased security in next generation networks. It suggests making the AES S-box dynamic by using the RC4 stream cipher and AES key scheduling algorithm. This would prevent repetition of the cipher key. It also proposes implementing AES in a round structure to increase the algorithm's complexity. The performance of the traditional and enhanced AES would be compared based on encryption time, decryption time, CPU usage, and throughput. The goal is to achieve speeds compatible with 4G LTE networks while enhancing security.
Dynamic selection of symmetric key cryptographic algorithms for securing data...csandit
Most of the information is in the form of electronic data. A lot of electronic data exchanged
takes place through computer applications. Therefore information exchange through these
applications needs to be secure. Different cryptographic algorithms are usually used to address
these security concerns. However, along with security there are other factors that need to be
considered for practical implementation of different cryptographic algorithms like
implementation cost and performance. This paper provides comparative analysis of time taken
for encryption by seven symmetric key cryptographic algorithms (AES, DES, Triple DES, RC2,
Skipjack, Blowfish and RC4) with variation of parameters like different data types, data density,
data size and key sizes.
Fault Detection Scheme for AES Using Composite FieldAJAL A J
The cipher Rijndael is one of the five finalists of the Advanced Encryption Standard (AES)
The algorithm has been designed by Joan Daemen and Vincent Rijmen
It is a Block cipher.
The hardware implementation with 128-bit blocks and 128-bit keys is presented.
VLSI optimizations of the Rijndael algorithm are discussed and several hardware design modifications and techniques are used, such as memory sharing and parallelism.
IRJET- Hardware and Software Co-Design of AES Algorithm on the basis of NIOS ...IRJET Journal
1. The document discusses a hardware-software co-design of the AES encryption algorithm implemented on the NIOS II soft-core processor on an FPGA.
2. It proposes using a hardware-software co-design methodology to implement AES for encryption and decryption of 128-bit blocks using 128, 192, or 256-bit keys.
3. The implementation will utilize the Quartus II software tools and NIOS II integrated development environment to program the FPGA with the AES algorithm designed around the NIOS II soft-core processor.
PREDOMINANCE OF BLOWFISH OVER TRIPLE DATA ENCRYPTION STANDARD SYMMETRIC KEY A...IJNSA Journal
Computer data communication is the order of the day with Information Communication Technology (ICT) playing major role in everyone’s life, communicating with smart phones, tabs, laptops and desktops using internet. Security of the data transferred over the computer networks is most important as for as an organization is concerned. Hackers attempt hard to crack the software key and indulge in cyber crimes. In this paper, the main concern is not only to provide security to the data transferred at the software level but it provides the security at hardware level by the modified Blowfish Encryption and Decryption Algorithms. It results minimum delay, high speed, high throughput] and effective memory utilization compared to Blowfish (BF) and Triple Data Encryption Standard (TDES) algorithms. The implementation of Blowfish with modulo adder and Wave Dynamic Differential Logic (WDDL) is to provide security against Differential power analysis (DPA). In the proposed four implementations, BF with constant delay n-bit adder (BFCDNBA) yielded minimum delay, maximum frequency, high memory utilization and high throughput compared to BF with modulo adder and WDDL logic (BFMAWDDL), BF with modulo adder (BFMA) and TDES algorithms. The VLSI implementation of Blowfish and TDES algorithms is done using Verilog HDL.
1) The document discusses an enhancement to the AES encryption algorithm by adding an additional layer of security using the Caesar cipher encryption algorithm.
2) The enhancement aims to make the algorithm more secure by making the key variable for each letter encrypted using the Caesar cipher, removing vulnerabilities to common attacks.
3) The enhancement provides extra protection to the already secure AES algorithm and increases the security level, while being transparent to the user.
Simulated Analysis and Enhancement of Blowfish Algorithmiosrjce
This paper represents or analyzes the security of system based on Blowfish. Blowfish mainly focuses
on the encrypt and decrypt techniques and algorithms apply for cryptanalysis. It describe the algorithms for
encryption as well as decryption algorithms and also give the sufficient description of key generation, key
expansion, function and working principle of Blowfish cipher with proper explanations. Taking the current era,
Most of the famous systems which offer security for a network or web or to a data are vulnerability to attacks and
they are broken at some point of time by effective cryptanalysis methods, irrespective of its complex algorithmic
design. In the general, today’s cryptography world is bounded to an interpretive of following any one or multi
encryption scheme and that too for a single iteration on a single file only. This is evident in the maximum of the
encryption-decryption cases. It also describes the comparisons between older blowfish and enhances blowfish. It
also shows enhance Blowfish algorithm for encryption and decryption of data. It is also give the proper simulated
analysis of encryption and decryption time for different file formats using a windows application. It describe
feature of application and its process and efficiency as well as calculation of time and throughput.
Encryption and Compression of Audio-Video Data Using Enhanced AES and J-Bit A...ijsrd.com
AES is considered a good encryption algorithm in terms of providing security to a network in passing information (data) in form of audio, string, and video and in any other form. However it yields a low throughput resulting in slowness and increasing energy dispensation of server or an application. The Enhanced AES algorithm is proposed in this paper which works by using sequence counters and provides improved throughput as compare to conventional AES algorithm. The J-Bit Encoding is being a compression algorithm in lossless category which doesn't decrease the quality but reduce the size of data to some extent. It has been observed that the proposed encryption algorithm integrated to J-Bit Encoding algorithm will provide the effective security measures as well as increased throughput as a parameter and less bandwidth usage as the actual size of data shall not be sent along the network.
Hybrid Cryptography security in public cloud using TwoFish and ECC algorithmIJECEIAES
Cloud computing is a structure for rendering service to the user for free or paid basis through internet facility where we can access to a bulk of shared resources which results in saving managing cost and time for large companies, The data which are stored in the data center may incur various security, damage and threat issues which may result in data leakage, insecure interface and inside attacks. This paper will demonstrate the implementation of hybrid cryptography security in public cloud by a combination of Elliptical Curve Cryptography and Twofish algorithm, which provides an innovative solution to enhance the security features of the cloud so that we can improve the service thus results in increasing the trust over the technology.
Wireless Network Security Architecture with Blowfish Encryption ModelIOSR Journals
Abstract: In this research paper ,we developed a model for a large network, wireless nodes are interconnected and each can be considered as a node processor that offer services to other node processors connected to a specific network. A very high proportion of the nodes that offer services need to carry out an authentication process so as to make an access request to the node offering the service. In this context, an integrated reconfigurable network security architecture moved to the application layer has become the need of the day for secure wireless data sharing. The security schemes of the seven layer OSI architecture need to be placed intrinsically in the wireless node itself and should be capable of supporting the MAC layer, IP address based layer and the routing protocols of the network layer. This work focuses on the use of emulator and embedded hardware architectures for wireless network security. In this work, the individual nodes can have a unique security signature pattern maintained by respective wireless nodes using an encryption algorithm and this is made dynamic. The metrics includes latency, throughput, Scalability, Effects of data transfer operation on node processor and application data located in the processor Keywords:Wireless Network security, Embedded hardware, Reconfigurable architecture, blowfish algorithm
IRJET-Security Enhancement in Next Generation Networks using Enhanced AES wit...IRJET Journal
This document proposes enhancing the Advanced Encryption Standard (AES) algorithm for increased security in next generation networks. The enhancement involves converting the static AES S-box into a dynamic S-box using the RC4 stream cipher and AES key scheduling algorithm. This makes the system resistant to attacks by preventing repetition of the cipher key. AES would also be implemented in a round structure to increase the complexity of the system. The performance of the traditional and enhanced AES would be compared based on encryption time, decryption time, CPU usage, and throughput. The goal is to achieve speeds compatible with 4G LTE networks while enhancing security.
An improved geo encryption algorithm in location based serviceseSAT Journals
Abstract Wireless technology is used in many applications with location based data encryption techniques to secure the communication. The use of knowledge of the mobile user's location called Geo-encryption, produces more secure systems that can be used in different mobile applications. Location Based Data Encryption Methods (LBDEM) is a technique used to enhance the security of such applications called as Location Based Services (LBS). It collects position, time, latitude coordinates and longitude coordinates of mobile nodes and uses for the encryption and decryption process. Geo-encryption plays an important role to raise the security of LBS. Different Geo-protocols have been developed in the same area to add security with better throughput. The Advanced Encryption Standard in Geo-encryption with Dynamic Tolerance Distance (AES-GEDTD) is an approach which gives higher security with a great throughput. This approach mainly uses the AES algorithm, symmetric key encryption algorithm. But applying this algorithm to more complex data like images, videos, etc. like in Digital Film Distribution, we might face the problem of computational overhead. To overcome this problem, we analyze AES and modify it, to reduce the computational overhead. In the modified AES algorithm (M-AES), we omit the calculation of mix column operations and hence the M-AES-GEDTD is a fast and lightweight algorithm for multimedia data. Keywords: Geo-encryption; LBDEM; LBS, Geo-locked Keys .
International Journal of Engineering Research and Development (IJERD)IJERD Editor
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IRJET- Design and Implementation of 256-Bits Cryptography Algorithm used in t...IRJET Journal
The document describes a proposed 256-bit cryptography algorithm implemented in VHDL that is resistant to brute-force and timing attacks. The algorithm uses a modified version of the Data Encryption Standard (DES) to encrypt 256-bit plaintext into 256-bit ciphertext using a 224-bit cipher key. It then applies a Hamming(448,256) error correcting code to the ciphertext to generate the final 448-bit encrypted data. Simulation results show the encryption and decryption processes encrypt the plaintext into ciphertext and recover the original plaintext, with an encryption time of 19.231 nanoseconds, making the algorithm resistant to brute-force and timing attacks.
International Journal of Engineering Inventions (IJEI) provides a multidisciplinary passage for researchers, managers, professionals, practitioners and students around the globe to publish high quality, peer-reviewed articles on all theoretical and empirical aspects of Engineering and Science.
Cryptography technology is a security technique used to change plain text to another shape of data or to
symbols, which is known as the cipher text. Cryptography aims to keep the data secure during its journey
through public networks. Currently, there are many proposed algorithms that provide this service
especially for sensitive data or very important conversations either through mobile or video conferences. In
this paper, an inventive security symmetric algorithm is implemented and evaluated, and its performance is
compared to the AES. The algorithm has four different rounds for each quarter of the key container table,
and each of them serves to shift the table. The algorithm uses the XOR operation, which, being lightweight
and cheap, is very appropriate for use with Real Time Applications. The result shows that the suggested
algorithm spends less time than AES although it has 16 rounds and the numbers used to mix up the table
are big.
With increasing technology development in field of communication and Electronic devices, there is a need for better security service for information transfer in Medical Sectors, Banking, Financial and in other IoT applications etc. Fight against security attacks is of prime importance. Through Cryptographic techniques we can provide Authenticity as well as Confidentiality for the user data. In this paper, hardware implementation has been described for a real-time application of speech data encryption and decryption using AES algorithm along with the speech recognition using cross correlation technique. Verilog programming environment is used for AES cryptography whereas MATLAB is used for Speech recognition. ASIC design on AES core is implemented using Cadence tools. Number of gates, area and power used by AES core design has been drastically reduced by specifying wide range of constraints during front end designing. In Backend designing, layout of AES design, which is the physical geometric representation is also developed.
Pipelining Architecture of AES Encryption and Key Generation with Search Base...VLSICS Design
A high speed security algorithm is always important for wired/wireless environment. The symmetric block cipher plays a major role in the bulk data encryption. One of the best existing symmetric security algorithms to provide data security is AES. AES has the advantage of being implemented in both hardware and software. Hardware implementation of the AES has the advantage of increased throughput and offers better security. Search based S-box architecture has been proposed in this paper to reduce the constraint in the hardware resources. The pipelined architecture of the AES algorithm is proposed in order to increase the throughput of the algorithm. Moreover the key schedule algorithm of the AES encryption is pipelined to get the speedup.
Privacy Preserving and Ownership in Cloud Computing using Symmetric Key Encry...IRJET Journal
This document summarizes a research paper that proposes a model for privacy and data ownership in cloud computing using symmetric key encryption. The model uses AES-256 encryption to encrypt user data uploaded to the cloud, providing security. AES-256 is shown to be faster than other encryption algorithms like AES-128, AES-192, and DES. The proposed model includes user registration, encrypted file uploading and downloading using AES-256, and a trusted third party for sharing files between authorized users while maintaining security. Experimental results show AES-256 provides faster encryption than other algorithms.
An Efficient VLSI Design of AES Cryptography Based on DNA TRNG DesignIRJET Journal
This document describes an efficient VLSI design for AES cryptography using a true random number generator (TRNG) and DNA encoding. It aims to improve security and reduce area and delay compared to standard AES. The design generates random round keys using a TRNG instead of the standard key expansion process. It further encodes a partial key from the TRNG using DNA encoding to produce the full 128-bit key, strengthening security. Simulation and synthesis results show the TRNG-based AES has lower area and delay than standard AES. Combining the TRNG with DNA encoding further optimizes the design.
Performance Analysis of Application for Security Enhancements using Cryptanal...IRJET Journal
The document discusses performance analysis of applications for security enhancements using cryptanalysis. It begins with an introduction to cryptography and the Advanced Encryption Standard (AES). It then discusses using dynamic S-boxes generated by the RC4 algorithm to increase the security and complexity of AES. The proposed system uses a round structure and dynamic S-boxes to enhance AES security. Performance is evaluated based on randomness tests including strict avalanche criteria, differential approximation probability, and linear approximation probability. Results show encryption with the enhanced AES using dynamic S-boxes increases security and takes slightly longer than standard AES.
Security Enhancement in Next Generation Networks using Enhanced AES with RC4 ...IRJET Journal
This document proposes enhancing the Advanced Encryption Standard (AES) algorithm for increased security in next generation networks. It suggests making the AES S-box dynamic by using the RC4 stream cipher and AES key scheduling algorithm. This would prevent repetition of the cipher key. It also proposes implementing AES in a round structure to increase the algorithm's complexity. The performance of the traditional and enhanced AES would be compared based on encryption time, decryption time, CPU usage, and throughput. The goal is to achieve speeds compatible with 4G LTE networks while enhancing security.
Design and Implementation of Area Efficiency AES Algoritham with FPGA and ASIC,paperpublications3
Abstract: A public domain encryption standard is subject to continuous, vigilant, expert cryptanalysis. AES is a symmetric encryption algorithm processing data in block of 128 bits. Under the influence of a key, a 128-bit block is encrypted by transforming it in a unique way into a new block of the same size. To implement AES Rijndael algorithm on FPGA using Verilog and synthesis using Xilinx, Plain text of 128 bit data is considered for encryption using Rijndael algorithm utilizing key. This encryption method is versatile used for military applications. The same key is used for decryption to recover the original 128 bit plain text. For high speed applications, the Non LUT based implementation of AES S-box and inverse S-box is preferred. Development of physical design of AES-128 bit is done using cadence SoC encounter. Performance evaluation of the physical design with respect to area, power, and time has been done. The core consumes 10.11 mW of power for the core area of 330100.742 μm2.
Keywords: Encryption, Decryption Rijndael algorithm, FPGA implementation, Physical Design.
Design and Implementation of Area Efficiency AES Algoritham with FPGA and ASICpaperpublications3
Abstract: A public domain encryption standard is subject to continuous, vigilant, expert cryptanalysis. AES is a symmetric encryption algorithm processing data in block of 128 bits. Under the influence of a key, a 128-bit block is encrypted by transforming it in a unique way into a new block of the same size. To implement AES Rijndael algorithm on FPGA using Verilog and synthesis using Xilinx, Plain text of 128 bit data is considered for encryption using Rijndael algorithm utilizing key. This encryption method is versatile used for military applications. The same key is used for decryption to recover the original 128 bit plain text. For high speed applications, the Non LUT based implementation of AES S-box and inverse S-box is preferred. Development of physical design of AES-128 bit is done using cadence SoC encounter. Performance evaluation of the physical design with respect to area, power, and time has been done. The core consumes 10.11 mW of power for the core area of 330100.742 μm2.
High throughput FPGA Implementation of Advanced Encryption Standard AlgorithmTELKOMNIKA JOURNAL
The growth of computer systems and electronic communications and transactions has meant that the need for effective security and reliability of data communication, processing and storage is more important than ever. In this context, cryptography is a high priority research area in engineering. The Advanced Encryption Standard (AES) is a symmetric-key criptographic algorithm for protecting sensitive information and is one of the most widely secure and used algorithm today. High-throughput, low power and compactness have always been topic of interest for implementing this type of algorithm. In this paper, we are interested on the development of high throughput architecture and implementation of AES algorithm, using the least amount of hardware possible. We have adopted a pipeline approach in order to reduce the critical path and achieve competitive performances in terms of throughput and efficiency. This approach is effectively tested on the AES S-Box substitution. The latter is a complex transformation and the key point to improve architecture performances. Considering the high delay and hardware required for this transformation, we proposed 7-stage pipelined S-box by using composite field in order to deal with the critical path and the occupied area resources. In addition, efficient AES key expansion architecture suitable for our proposed pipelined AES is presented. The implementation had been successfully done on Virtex-5 XC5VLX85 and Virtex-6 XC6VLX75T Field Programmable Gate Array (FPGA) devices using Xilinx ISE v14.7. Our AES design achieved a data encryption rate of 108.69 Gbps and used only 6361 slices ressource. Compared to the best previous work, this implementation improves data throughput by 5.6% and reduces the used slices to 77.69%.
This document provides an overview of a final year project to implement the encryption module of the AES algorithm in VHDL. It will be completed by three students for their B.Tech in Electronics and Communication Engineering under the guidance of an assistant professor. The document outlines the different modules of the AES algorithm, including sub byte transformation, shift rows, mix columns, add round key, and key expansion. It also discusses the software and language that will be used, as well as the group's planning and methodology, which involves dividing the work, completing theoretical research, and implementing the VHDL design in a future semester as a major project.
The document describes the implementation of the Advanced Encryption Standard (AES) algorithm in Matlab. It includes:
1) An introduction to AES that describes its motivation, definitions, requirements and overall processes.
2) A high-level design section explaining the AES algorithm, its overall structure consisting of key expansion, encryption and decryption processes using operations like SubBytes, ShiftRows, MixColumns and AddRoundKey.
3) A detailed design section describing the individual operations for both encryption and decryption, including pseudo-code. It also provides illustrations of the operations.
4) Sections on key expansion and results from implementing the AES algorithm in Matlab.
This document describes a student project to implement the Advanced Encryption Standard (AES) in Verilog. AES is a symmetric block cipher that uses 128-bit blocks and 128/192/256-bit keys. The project aims to develop optimized and synthesizable Verilog code to encrypt and decrypt 128-bit data using AES. The document provides background on cryptography, AES, and its algorithm which includes key expansion, substitution, transposition, and mixing operations. It also outlines the implementation, encryption, decryption, and performance estimation aspects of the project.
This document describes the implementation of the AES (Advanced Encryption Standard) algorithm using a fully pipelined design on an FPGA. It first provides background on the AES algorithm, including its key components and previous hardware implementations. It then details the proposed fully pipelined design, which implements each of AES's 10 rounds as separate pipeline stages to achieve high throughput. Key generation is also pipelined internally. Simulation results show the design achieves a throughput higher than previous reported implementations.
A design of a fast parallel pipelined implementation of aes advanced encrypti...ijcsit
The Advanced Encryption Standard (AES) algorithm is a symmetric block cipher which operates on a
sequence of blocks each consists of 128, 192 or 256 bits. Moreover, the cipher key for the AES algorithm is
a sequence of 128, 192 or 256 bits. AES algorithm has many sources of parallelism. In this paper, a design
of parallel AES on the multiprocessor platform is presented. While most of the previous designs either use
pipelined parallelization or take advantage of the Mix_Column parallelization, our design is based on
combining pipelining of rounds and parallelization of Mix_Column and Add_Round_Key transformations.
This model is divided into two levels: the first is pipelining different rounds, while the second is through
parallelization of both the Add_Round_Key and the Mix_Column transformations. Previous work proposed
for pipelining AES algorithm was based on using nine stages, while, we propose the use of eleven stages in
order to exploit the sources of parallelism in both initial and final round. This enhances the system
performance compared to previous designs. Using two-levels of parallelization benefits from the highly
independency of Add_Round_Key and Mix_Column/ Inv_Mix_Colum transformations. The analysis shows
that the parallel implementation of the AES achieves a better performance. The analysis shows that using
pipeline increases significantly the degree of improvement for both encryption and decryption by
approximately 95%. Moreover, parallelizing Add_Round_Key and Mix_Column/ Inv_Mix_Column
transformations increases the degree of improvement by approximately 98%. This leads to the conclusion
that the proposed design is scalable and is suitable for real-time applications
Efficient Fpe Algorithm For Encrypting Credit Card NumbersIOSR Journals
This document proposes an efficient format-preserving encryption (FPE) algorithm for encrypting credit card numbers. The algorithm uses AES-128 encryption and adds two additional steps to retain the plaintext format of 16 decimal digits. Specifically, it divides the 128-bit ciphertext into blocks, performs an XOR operation between blocks, and then converts the resulting hexadecimal values to decimal digits. This allows encryption without changing the database structure or queries. The proposed algorithm is faster and requires no additional storage compared to existing FPE techniques like prefix encryption, cycle walking, or Feistel networks. It provides an efficient way to encrypt sensitive numeric fields like credit cards while preserving functionality.
International Journal of Engineering and Science Invention (IJESI) is an international journal intended for professionals and researchers in all fields of computer science and electronics. IJESI publishes research articles and reviews within the whole field Engineering Science and Technology, new teaching methods, assessment, validation and the impact of new technologies and it will continue to provide information on the latest trends and developments in this ever-expanding subject. The publications of papers are selected through double peer reviewed to ensure originality, relevance, and readability. The articles published in our journal can be accessed online.
A PERFORMANCE EVALUATION OF COMMON ENCRYPTION TECHNIQUES WITH SECURE WATERMAR...IJNSA Journal
Ciphering algorithms play a main role in information security systems. Therefore in this paper we are considering the important performance of these algorithms like CPU time consumption, memory usage and battery usage. This research tries to demonstrate a fair comparison between the most common algorithms and with a novel method called Secured Watermark System (SWS) in data encryption field according to CPU time, packet size and power consumption. It provides a comparison the most known algorithms used in encryption: AES (Rijndael), DES, Blowfish, and Secured Watermark System (SWS).
For comparing these algorithms with each other variations of data block sizes, and a variation of encryption-decryption speeds where used in this research.
In addition a comparison with different platforms such as Windows 8, Windows XP and Linux has been conducted. Finally the results of the experimentation demonstrate the performance and efficiency of the compared encryption algorithms with different parameters.
There is great research in the field of data security these days. Storing information digitally in the cloud and transferring it over the internet proposes risks of disclosure and unauthorized access, thus users, organizations and businesses are adapting new technology and methods to protect their data from breaches. In this paper, we introduce a method to provide higher security for data transferred over the internet, or information based in the cloud. The introduced method for the most part depends on the Advanced Encryption Standard (AES) algorithm. Which is currently the standard for secret key encryption. A standardized version of the algorithm was used by The Federal Information Processing Standard 197 called Rijndael for the Advanced Encryption Standard. The AES algorithm processes data through a combination of Exclusive-OR operations (XOR), octet substitution with an S-box, row and column rotations, and a MixColumn operations. The fact that the algorithm could be easily implemented and run on a regular computer in a reasonable amount of time made it highly favorable and successful.
In this paper, the proposed method provides a new dimension of security to the AES algorithm by securing the key itself such that even when the key is disclosed, the text cannot be deciphered. This is done by enciphering the key using Output Feedback Block Mode Operation. This introduces a new level of security to the key in a way in which deciphering the data requires prior knowledge of the key and the algorithm used to encipher the key for the purpose of deciphering the transferred text.
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This paper presents 16 software implementations of the Advanced Encryption Standard (AES) cipher mapped to a fine-grained many-core processor array. The implementations explore different levels of data and task parallelism. The smallest design uses 6 cores for offline key expansion and 8 cores for online expansion, while the largest uses 107 and 137 cores respectively. Compared to other software platforms, the designs achieve 3.5-15.6 times higher throughput per chip area and 8.2-18.1 times higher energy efficiency.
International Journal of Computational Engineering Research (IJCER) is dedicated to protecting personal information and will make every reasonable effort to handle collected information appropriately. All information collected, as well as related requests, will be handled as carefully and efficiently as possible in accordance with IJCER standards for integrity and objectivity.
Advanced Encryption Standard (AES) Implementaion using JavaSunil Kumar R
The document describes a project report on the implementation of the AES encryption algorithm. It was submitted by two students, Sunil Kumar R and Shreekant, in partial fulfillment of the requirements for a Bachelor of Engineering degree in computer science. The project was carried out under the guidance of three faculty members at R.V. College of Engineering in Bangalore. It includes a certificate signed by the faculty confirming the students' satisfactory completion of the project.
This document describes the design and implementation of a hybrid cryptosystem using the AES and SHA-2 algorithms. The system integrates AES, a symmetric encryption algorithm, with SHA-2, a cryptographic hash function, to improve data security. AES encrypts data using a 128-bit key generated by hashing the input message with SHA-2. The combined system was synthesized using Xilinx ISE software and implemented on a Virtex-5 FPGA, utilizing under 2% of slice registers and 5% of slice LUTs. This provides higher security than AES alone through increased algorithm complexity.
Similar to Enhanced Advanced Encryption Standard (E-AES): using ESET (20)
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...IRJET Journal
1) The document discusses the Sungal Tunnel project in Jammu and Kashmir, India, which is being constructed using the New Austrian Tunneling Method (NATM).
2) NATM involves continuous monitoring during construction to adapt to changing ground conditions, and makes extensive use of shotcrete for temporary tunnel support.
3) The methodology section outlines the systematic geotechnical design process for tunnels according to Austrian guidelines, and describes the various steps of NATM tunnel construction including initial and secondary tunnel support.
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTUREIRJET Journal
This study examines the effect of response reduction factors (R factors) on reinforced concrete (RC) framed structures through nonlinear dynamic analysis. Three RC frame models with varying heights (4, 8, and 12 stories) were analyzed in ETABS software under different R factors ranging from 1 to 5. The results showed that displacement increased as the R factor decreased, indicating less linear behavior for lower R factors. Drift also decreased proportionally with increasing R factors from 1 to 5. Shear forces in the frames decreased with higher R factors. In general, R factors of 3 to 5 produced more satisfactory performance with less displacement and drift. The displacement variations between different building heights were consistent at different R factors. This study evaluated how R factors influence
A COMPARATIVE ANALYSIS OF RCC ELEMENT OF SLAB WITH STARK STEEL (HYSD STEEL) A...IRJET Journal
This study compares the use of Stark Steel and TMT Steel as reinforcement materials in a two-way reinforced concrete slab. Mechanical testing is conducted to determine the tensile strength, yield strength, and other properties of each material. A two-way slab design adhering to codes and standards is executed with both materials. The performance is analyzed in terms of deflection, stability under loads, and displacement. Cost analyses accounting for material, durability, maintenance, and life cycle costs are also conducted. The findings provide insights into the economic and structural implications of each material for reinforcement selection and recommendations on the most suitable material based on the analysis.
Effect of Camber and Angles of Attack on Airfoil CharacteristicsIRJET Journal
This document discusses a study analyzing the effect of camber, position of camber, and angle of attack on the aerodynamic characteristics of airfoils. Sixteen modified asymmetric NACA airfoils were analyzed using computational fluid dynamics (CFD) by varying the camber, camber position, and angle of attack. The results showed the relationship between these parameters and the lift coefficient, drag coefficient, and lift to drag ratio. This provides insight into how changes in airfoil geometry impact aerodynamic performance.
A Review on the Progress and Challenges of Aluminum-Based Metal Matrix Compos...IRJET Journal
This document reviews the progress and challenges of aluminum-based metal matrix composites (MMCs), focusing on their fabrication processes and applications. It discusses how various aluminum MMCs have been developed using reinforcements like borides, carbides, oxides, and nitrides to improve mechanical and wear properties. These composites have gained prominence for their lightweight, high-strength and corrosion resistance properties. The document also examines recent advancements in fabrication techniques for aluminum MMCs and their growing applications in industries such as aerospace and automotive. However, it notes that challenges remain around issues like improper mixing of reinforcements and reducing reinforcement agglomeration.
Dynamic Urban Transit Optimization: A Graph Neural Network Approach for Real-...IRJET Journal
This document discusses research on using graph neural networks (GNNs) for dynamic optimization of public transportation networks in real-time. GNNs represent transit networks as graphs with nodes as stops and edges as connections. The GNN model aims to optimize networks using real-time data on vehicle locations, arrival times, and passenger loads. This helps increase mobility, decrease traffic, and improve efficiency. The system continuously trains and infers to adapt to changing transit conditions, providing decision support tools. While research has focused on performance, more work is needed on security, socio-economic impacts, contextual generalization of models, continuous learning approaches, and effective real-time visualization.
Structural Analysis and Design of Multi-Storey Symmetric and Asymmetric Shape...IRJET Journal
This document summarizes a research project that aims to compare the structural performance of conventional slab and grid slab systems in multi-story buildings using ETABS software. The study will analyze both symmetric and asymmetric building models under various loading conditions. Parameters like deflections, moments, shears, and stresses will be examined to evaluate the structural effectiveness of each slab type. The results will provide insights into the comparative behavior of conventional and grid slabs to help engineers and architects select appropriate slab systems based on building layouts and design requirements.
A Review of “Seismic Response of RC Structures Having Plan and Vertical Irreg...IRJET Journal
This document summarizes and reviews a research paper on the seismic response of reinforced concrete (RC) structures with plan and vertical irregularities, with and without infill walls. It discusses how infill walls can improve or reduce the seismic performance of RC buildings, depending on factors like wall layout, height distribution, connection to the frame, and relative stiffness of walls and frames. The reviewed research paper analyzes the behavior of infill walls, effects of vertical irregularities, and seismic performance of high-rise structures under linear static and dynamic analysis. It studies response characteristics like story drift, deflection and shear. The document also provides literature on similar research investigating the effects of infill walls, soft stories, plan irregularities, and different
This document provides a review of machine learning techniques used in Advanced Driver Assistance Systems (ADAS). It begins with an abstract that summarizes key applications of machine learning in ADAS, including object detection, recognition, and decision-making. The introduction discusses the integration of machine learning in ADAS and how it is transforming vehicle safety. The literature review then examines several research papers on topics like lightweight deep learning models for object detection and lane detection models using image processing. It concludes by discussing challenges and opportunities in the field, such as improving algorithm robustness and adaptability.
Long Term Trend Analysis of Precipitation and Temperature for Asosa district,...IRJET Journal
The document analyzes temperature and precipitation trends in Asosa District, Benishangul Gumuz Region, Ethiopia from 1993 to 2022 based on data from the local meteorological station. The results show:
1) The average maximum and minimum annual temperatures have generally decreased over time, with maximum temperatures decreasing by a factor of -0.0341 and minimum by -0.0152.
2) Mann-Kendall tests found the decreasing temperature trends to be statistically significant for annual maximum temperatures but not for annual minimum temperatures.
3) Annual precipitation in Asosa District showed a statistically significant increasing trend.
The conclusions recommend development planners account for rising summer precipitation and declining temperatures in
P.E.B. Framed Structure Design and Analysis Using STAAD ProIRJET Journal
This document discusses the design and analysis of pre-engineered building (PEB) framed structures using STAAD Pro software. It provides an overview of PEBs, including that they are designed off-site with building trusses and beams produced in a factory. STAAD Pro is identified as a key tool for modeling, analyzing, and designing PEBs to ensure their performance and safety under various load scenarios. The document outlines modeling structural parts in STAAD Pro, evaluating structural reactions, assigning loads, and following international design codes and standards. In summary, STAAD Pro is used to design and analyze PEB framed structures to ensure safety and code compliance.
A Review on Innovative Fiber Integration for Enhanced Reinforcement of Concre...IRJET Journal
This document provides a review of research on innovative fiber integration methods for reinforcing concrete structures. It discusses studies that have explored using carbon fiber reinforced polymer (CFRP) composites with recycled plastic aggregates to develop more sustainable strengthening techniques. It also examines using ultra-high performance fiber reinforced concrete to improve shear strength in beams. Additional topics covered include the dynamic responses of FRP-strengthened beams under static and impact loads, and the performance of preloaded CFRP-strengthened fiber reinforced concrete beams. The review highlights the potential of fiber composites to enable more sustainable and resilient construction practices.
Survey Paper on Cloud-Based Secured Healthcare SystemIRJET Journal
This document summarizes a survey on securing patient healthcare data in cloud-based systems. It discusses using technologies like facial recognition, smart cards, and cloud computing combined with strong encryption to securely store patient data. The survey found that healthcare professionals believe digitizing patient records and storing them in a centralized cloud system would improve access during emergencies and enable more efficient care compared to paper-based systems. However, ensuring privacy and security of patient data is paramount as healthcare incorporates these digital technologies.
Review on studies and research on widening of existing concrete bridgesIRJET Journal
This document summarizes several studies that have been conducted on widening existing concrete bridges. It describes a study from China that examined load distribution factors for a bridge widened with composite steel-concrete girders. It also outlines challenges and solutions for widening a bridge in the UAE, including replacing bearings and stitching the new and existing structures. Additionally, it discusses two bridge widening projects in New Zealand that involved adding precast beams and stitching to connect structures. Finally, safety measures and challenges for strengthening a historic bridge in Switzerland under live traffic are presented.
React based fullstack edtech web applicationIRJET Journal
The document describes the architecture of an educational technology web application built using the MERN stack. It discusses the frontend developed with ReactJS, backend with NodeJS and ExpressJS, and MongoDB database. The frontend provides dynamic user interfaces, while the backend offers APIs for authentication, course management, and other functions. MongoDB enables flexible data storage. The architecture aims to provide a scalable, responsive platform for online learning.
A Comprehensive Review of Integrating IoT and Blockchain Technologies in the ...IRJET Journal
This paper proposes integrating Internet of Things (IoT) and blockchain technologies to help implement objectives of India's National Education Policy (NEP) in the education sector. The paper discusses how blockchain could be used for secure student data management, credential verification, and decentralized learning platforms. IoT devices could create smart classrooms, automate attendance tracking, and enable real-time monitoring. Blockchain would ensure integrity of exam processes and resource allocation, while smart contracts automate agreements. The paper argues this integration has potential to revolutionize education by making it more secure, transparent and efficient, in alignment with NEP goals. However, challenges like infrastructure needs, data privacy, and collaborative efforts are also discussed.
A REVIEW ON THE PERFORMANCE OF COCONUT FIBRE REINFORCED CONCRETE.IRJET Journal
This document provides a review of research on the performance of coconut fibre reinforced concrete. It summarizes several studies that tested different volume fractions and lengths of coconut fibres in concrete mixtures with varying compressive strengths. The studies found that coconut fibre improved properties like tensile strength, toughness, crack resistance, and spalling resistance compared to plain concrete. Volume fractions of 2-5% and fibre lengths of 20-50mm produced the best results. The document concludes that using a 4-5% volume fraction of coconut fibres 30-40mm in length with M30-M60 grade concrete would provide benefits based on previous research.
Optimizing Business Management Process Workflows: The Dynamic Influence of Mi...IRJET Journal
The document discusses optimizing business management processes through automation using Microsoft Power Automate and artificial intelligence. It provides an overview of Power Automate's key components and features for automating workflows across various apps and services. The document then presents several scenarios applying automation solutions to common business processes like data entry, monitoring, HR, finance, customer support, and more. It estimates the potential time and cost savings from implementing automation for each scenario. Finally, the conclusion emphasizes the transformative impact of AI and automation tools on business processes and the need for ongoing optimization.
Multistoried and Multi Bay Steel Building Frame by using Seismic DesignIRJET Journal
The document describes the seismic design of a G+5 steel building frame located in Roorkee, India according to Indian codes IS 1893-2002 and IS 800. The frame was analyzed using the equivalent static load method and response spectrum method, and its response in terms of displacements and shear forces were compared. Based on the analysis, the frame was designed as a seismic-resistant steel structure according to IS 800:2007. The software STAAD Pro was used for the analysis and design.
Cost Optimization of Construction Using Plastic Waste as a Sustainable Constr...IRJET Journal
This research paper explores using plastic waste as a sustainable and cost-effective construction material. The study focuses on manufacturing pavers and bricks using recycled plastic and partially replacing concrete with plastic alternatives. Initial results found that pavers and bricks made from recycled plastic demonstrate comparable strength and durability to traditional materials while providing environmental and cost benefits. Additionally, preliminary research indicates incorporating plastic waste as a partial concrete replacement significantly reduces construction costs without compromising structural integrity. The outcomes suggest adopting plastic waste in construction can address plastic pollution while optimizing costs, promoting more sustainable building practices.
Optimizing Gradle Builds - Gradle DPE Tour Berlin 2024Sinan KOZAK
Sinan from the Delivery Hero mobile infrastructure engineering team shares a deep dive into performance acceleration with Gradle build cache optimizations. Sinan shares their journey into solving complex build-cache problems that affect Gradle builds. By understanding the challenges and solutions found in our journey, we aim to demonstrate the possibilities for faster builds. The case study reveals how overlapping outputs and cache misconfigurations led to significant increases in build times, especially as the project scaled up with numerous modules using Paparazzi tests. The journey from diagnosing to defeating cache issues offers invaluable lessons on maintaining cache integrity without sacrificing functionality.
Applications of artificial Intelligence in Mechanical Engineering.pdfAtif Razi
Historically, mechanical engineering has relied heavily on human expertise and empirical methods to solve complex problems. With the introduction of computer-aided design (CAD) and finite element analysis (FEA), the field took its first steps towards digitization. These tools allowed engineers to simulate and analyze mechanical systems with greater accuracy and efficiency. However, the sheer volume of data generated by modern engineering systems and the increasing complexity of these systems have necessitated more advanced analytical tools, paving the way for AI.
AI offers the capability to process vast amounts of data, identify patterns, and make predictions with a level of speed and accuracy unattainable by traditional methods. This has profound implications for mechanical engineering, enabling more efficient design processes, predictive maintenance strategies, and optimized manufacturing operations. AI-driven tools can learn from historical data, adapt to new information, and continuously improve their performance, making them invaluable in tackling the multifaceted challenges of modern mechanical engineering.
An improved modulation technique suitable for a three level flying capacitor ...IJECEIAES
This research paper introduces an innovative modulation technique for controlling a 3-level flying capacitor multilevel inverter (FCMLI), aiming to streamline the modulation process in contrast to conventional methods. The proposed
simplified modulation technique paves the way for more straightforward and
efficient control of multilevel inverters, enabling their widespread adoption and
integration into modern power electronic systems. Through the amalgamation of
sinusoidal pulse width modulation (SPWM) with a high-frequency square wave
pulse, this controlling technique attains energy equilibrium across the coupling
capacitor. The modulation scheme incorporates a simplified switching pattern
and a decreased count of voltage references, thereby simplifying the control
algorithm.
Rainfall intensity duration frequency curve statistical analysis and modeling...bijceesjournal
Using data from 41 years in Patna’ India’ the study’s goal is to analyze the trends of how often it rains on a weekly, seasonal, and annual basis (1981−2020). First, utilizing the intensity-duration-frequency (IDF) curve and the relationship by statistically analyzing rainfall’ the historical rainfall data set for Patna’ India’ during a 41 year period (1981−2020), was evaluated for its quality. Changes in the hydrologic cycle as a result of increased greenhouse gas emissions are expected to induce variations in the intensity, length, and frequency of precipitation events. One strategy to lessen vulnerability is to quantify probable changes and adapt to them. Techniques such as log-normal, normal, and Gumbel are used (EV-I). Distributions were created with durations of 1, 2, 3, 6, and 24 h and return times of 2, 5, 10, 25, and 100 years. There were also mathematical correlations discovered between rainfall and recurrence interval.
Findings: Based on findings, the Gumbel approach produced the highest intensity values, whereas the other approaches produced values that were close to each other. The data indicates that 461.9 mm of rain fell during the monsoon season’s 301st week. However, it was found that the 29th week had the greatest average rainfall, 92.6 mm. With 952.6 mm on average, the monsoon season saw the highest rainfall. Calculations revealed that the yearly rainfall averaged 1171.1 mm. Using Weibull’s method, the study was subsequently expanded to examine rainfall distribution at different recurrence intervals of 2, 5, 10, and 25 years. Rainfall and recurrence interval mathematical correlations were also developed. Further regression analysis revealed that short wave irrigation, wind direction, wind speed, pressure, relative humidity, and temperature all had a substantial influence on rainfall.
Originality and value: The results of the rainfall IDF curves can provide useful information to policymakers in making appropriate decisions in managing and minimizing floods in the study area.
Batteries -Introduction – Types of Batteries – discharging and charging of battery - characteristics of battery –battery rating- various tests on battery- – Primary battery: silver button cell- Secondary battery :Ni-Cd battery-modern battery: lithium ion battery-maintenance of batteries-choices of batteries for electric vehicle applications.
Fuel Cells: Introduction- importance and classification of fuel cells - description, principle, components, applications of fuel cells: H2-O2 fuel cell, alkaline fuel cell, molten carbonate fuel cell and direct methanol fuel cells.
Electric vehicle and photovoltaic advanced roles in enhancing the financial p...IJECEIAES
Climate change's impact on the planet forced the United Nations and governments to promote green energies and electric transportation. The deployments of photovoltaic (PV) and electric vehicle (EV) systems gained stronger momentum due to their numerous advantages over fossil fuel types. The advantages go beyond sustainability to reach financial support and stability. The work in this paper introduces the hybrid system between PV and EV to support industrial and commercial plants. This paper covers the theoretical framework of the proposed hybrid system including the required equation to complete the cost analysis when PV and EV are present. In addition, the proposed design diagram which sets the priorities and requirements of the system is presented. The proposed approach allows setup to advance their power stability, especially during power outages. The presented information supports researchers and plant owners to complete the necessary analysis while promoting the deployment of clean energy. The result of a case study that represents a dairy milk farmer supports the theoretical works and highlights its advanced benefits to existing plants. The short return on investment of the proposed approach supports the paper's novelty approach for the sustainable electrical system. In addition, the proposed system allows for an isolated power setup without the need for a transmission line which enhances the safety of the electrical network
artificial intelligence and data science contents.pptxGauravCar
What is artificial intelligence? Artificial intelligence is the ability of a computer or computer-controlled robot to perform tasks that are commonly associated with the intellectual processes characteristic of humans, such as the ability to reason.
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Artificial intelligence (AI) | Definitio
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