This document provides an introduction to VLSI (Very Large Scale Integration) design. It discusses several key concepts and landmarks in the field, including Moore's Law which predicted that the number of transistors on a chip would double every 18 months. It also summarizes different design styles such as full custom, ASIC, programmable logic, and system-on-chip. The document notes the increasing complexity of chip design as well as market pressures to reduce costs and time-to-market. It promotes the use of free and open-source CAD tools for chip design and discusses opportunities for VLSI design in India.

1. Introduction to VLSI
Design
Amit Kumar Mishra
ECE Department
IIT Guwahati

2. Tale of two queries!
 Y R U here?
 Y M I here?

3. Landmarks
 Moore’s axiom
 Some more funda
 Free CAD tool
 Parting notes

4. Moore’s Law
 Gordon Moore: co-founder of Intel
 Predicted that the number of transistors
per chip would grow exponentially (double
every 18 months)
 Exponential improvement in technology is
a natural trend:
e.g. Steam Engines - Dynamo - Automobile

5. Moore’s Law
1
10
100
1K
10K
100K
1M
10M
Transistors
10x/6 years
8086
68000
68020
80386
80486
68040
8080
4004
Pentium Pro
Pentium
PPC601
PPC603
MIPS R4000
Microprocessors
[©Keutzer]

6. IC Products
 Processors
 CPU, DSP, Controllers
 Memory chips
 RAM, ROM, EEPROM
 Analog
 Mobile communication,
audio/video processing
 Programmable
 PLA, FPGA
 Embedded systems
 Used in cars, factories
 Network cards
 System-on-chip (SoC)
Images: amazon.com

7. IC Product Market Shares
Source: Electronic Business

8. Example: Intel Processor Sizes
Source: http://www.intel.com/
Intel386TM DX
Processor
Intel486TM DX
Processor
Pentium® Processor
Pentium® Pro &
Pentium® II Processors
1.5m 1.0m 0.8m 0.6m 0.35m 0.25m
Silicon Process
Technology

9. Heterogeneity on Chip
 Greater diversity of on-
chip elements
Processors
Software
Memory
Analog
[©Keutzer]
More transistors doing different things!
Heterogeneity

10. Stronger Market Pressures
 Decreasing design
window
 Less tolerance for design
revisions
[©Keutzer]
Time-to-market
Exponentially more complex, greater design risk,
greater variety, and a smaller design window!

11. VLSI Design Styles
 Full Custom
 Application-Specific Integrated Circuit
(ASIC)
 Programmable Logic (PLD, FPGA)
 System-on-a-Chip

12. Full Custom Design
 Each circuit element carefully “handcrafted”
 Huge design effort
 High Design & NRE Costs / Low Unit Cost
 High Performance
 Typically used for high-volume applications

13. ASIC
 Constrained design using pre-designed (and
sometimes pre-manufactured) components
 Also called semi-custom design
 CAD tools greatly reduce design effort
 Low Design Cost / High NRE Cost / Med. Unit
Cost
 Medium Performance

14. Programmable Logic (FPGA)
 Pre-manufactured components with
programmable interconnect
 CAD tools greatly reduce design effort
 Low Design Cost / Low NRE Cost / High Unit
Cost
 Lower Performance

15. System-on-chip (SOC)
 Idea: combine several large blocks
 Predesigned custom cores (e.g., microcontroller) -
“intellectual property” (IP)
 ASIC logic for special-purpose hardware
 Programmable Logic (PLD, FPGA)
 Analog
 Open issues
 Keeping design cost low
 Verifying correctness of design

16. The Inverted Pyramid
[©Keutzer]
Electronic Systems > $1 Trillion
Semiconductor > $220 B
CAD $3 B

17. Where is the money?
 Gaps to be filled:
System-semiconductor gap
Semiconductor-CAD gap

18. A free CAD flow for all who care!
 Alliance CAD tools
 "Architecture des Systèmes intégrés et
Micro électronique" department of LIP6
 875 000 Transistor design done
 Limit is your processor power and your
design abilities!

19. Scenario in India???
 HUGE outsourcing
 Loads of startups (WHY?)
 VLSI design is nowhere a single nation job
 Fabrication labs (fabs) in USA getting sold
out
 India getting 4 fabs by next year!

20. Thank You
Best of Luck for End-Sems and Internships