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ADITYA ENGINEERING COLLEGE (A)
Steady state analysis of R, L
and C circuits
By
I V VEERANJANEYULU
Dept of Electrical & Electronics Engineering
Aditya Engineering College(A)
Surampalem.
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Concept of Phase angle and Phase difference
A phasor diagram can be used to represent a sine wave in terms of its magnitude and angular position.
The length of the arrow represents the magnitude of the sine wave and angle θ represents the angular
position of the sine wave.


1 0
30
1 4∠1350
3∠2250
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU


1 0
360
1 

or 135
1
0
225
1 

or
)
30
sin(
10
)
(
)
45
sin(
10
)
(
sin
7
)
(
0
0





t
t
v
t
t
v
t
t
v
C
B
A



0
0
0
45
10
30
5
0
7







C
B
A
V
V
V
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Draw the phasor diagram to represent the two sine waves shown in fig.
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Phasor Relationships for Circuit Elements
Resistor
If the current through a resistor R is i(t) = Im cos(ωt+Φ),
then voltage across it is given by Ohm’s law as
v(t) = i(t)R = RIm cos(ωt+Φ)
The phasor form of this voltage is V = RIm ∠ Φ
But the phasor representation of the current is I = Im ∠ Φ.
Hence, V =R I Phasor diagram for the resistor.
In case of resistor, Voltage wave form follows current wave form. Voltage phasor and current phasor are
in phase.
The impedance Z of a circuit is the ratio of the phasor voltage V to the phasor current I, measured in
ohms (Ω).
R
I
V
Z 






m
m
I
RI
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Inductor
reactance
inductive
the
is
L
where
L
90
L
I
90
LI
I
V
Z
Impedance
LI
90
LI
V
and
I
I
notation
phasor
The
)
90
cos(
LI
)
90
cos(
LI
).
sin(
LI
dt
t)
(
d
L
t)
(
is
inductor
the
across
voltage
The
).
cos(
I
t)
(
is
L
inductor
hrough
current t
the
Assume
m
m
m
m
m
m
m
m
m



















































L
L
X
jX
j
j
t
t
t
i
v
t
i
In case of inductor, current waveform lags voltage waveform by 900.
Voltage phasor and current phasor are out of phase by 900,
voltage phasor leads current phasor by 900 or current phasor lags voltage phasor by 900
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Capacitor
reactance
capacitive
the
is
C
1
where
C
90
C
1
90
CV
V
I
V
Z
Impedance
CV
90
CV
I
and
V
V
notation
phasor
The
)
90
cos(
CV
)
90
cos(
CV
).
sin(
CV
dt
t)
(
d
C
t)
(
is
capacitor
rough
Current th
The
).
cos(
V
t)
(
is
C
capacitor
across
voltage
the
Assume
m
m
m
m
m
m
m
m
m






















































C
C
X
jX
j
j
t
t
t
v
i
t
v
In case of capacitor current waveform leads voltage waveform by 900.
Voltage phasor and current phasor are out of phase by 900,
voltage phasor lags current phasor by 900 or current phasor leads voltage phasor by 900.
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
The admittance Y is the reciprocal of
impedance, measured in siemens (S)
Frequency (ω) is 0 for dc. Frequency (ω) is ∞ at high
frequencies
Z = jωL = 0
Z = jωL = ∞




C
j
Z

0



C
j
Z

Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Steady state analysis of RL series circuit
inductor
the
across
voltage
t)
(
resistor,
the
across
voltage
t)
(
V
is
t)
(
of
notation
phasor
the
circuit.
the
across
voltage
is
t)
(
0
I
I
is
t)
(
of
notation
phasor
the
sin
I
t)
(
Let
circuit
series
RL
Consider
m
m





L
R
v
v
v
v
i
t
i 
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU















sin
and
cos
R
R
tan
and
where
R
Z
R
L
R
I
L)I
R
(
I
V
Z
Impedance
L)I
R
(
LI
RI
V
V
V
circuit
the
to
KVL
Applying
LI
90
LI
V
is
t)
(
of
notation
phasor
the
)
90
sin(
LI
cos
LI
dt
t)
(
d
L
t)
(
RI
0
RI
V
is
t)
(
of
notation
phasor
the
sin
RI
t)
(
R
t)
(
1
-
2
2
m
m
m
m
m
L
R
m
m
L
m
m
m
m
R
m
Z
X
Z
X
X
R
Z
Z
jX
jX
j
j
j
j
j
v
t
t
i
v
v
t
i
v
L
L
L
L
L
L
L
R
R




































angle
an
by
V
lags
I
angle
an
by
I
leads
v
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Siemens
in
measured
are
e
susceptanc
and
e
conductanc
nce)
B(Suscepta
R
nce)
G(conducta
where
R
R
R
1
Z
1
Y
Admittance
2
2
2
2
2
2
2
2
2
2
L
L
L
L
L
L
L
L
L
X
R
X
X
R
jB
G
X
R
X
j
X
R
X
R
jX
jX


















Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Steady state analysis of RC series circuit
capacitor
the
across
voltage
t)
(
resistor,
the
across
voltage
t)
(
V
is
t)
(
of
notation
phasor
the
circuit.
the
across
voltage
is
t)
(
0
I
I
is
t)
(
of
notation
phasor
the
sin
I
t)
(
Let
circuit
series
RC
Consider
m
m





C
R
v
v
v
v
i
t
i 
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU















sin
and
cos
R
R
tan
and
where
R
Z
R
R
I
)I
R
(
I
V
Z
Impedance
)I
R
(
I
RI
V
V
V
circuit
the
to
KVL
Applying
I
90
I
1
V
is
t)
(
of
notation
phasor
the
)
90
sin(
I
1
cos
I
1
t)dt
(
1
t)
(
RI
0
RI
V
is
t)
(
of
notation
phasor
the
sin
RI
t)
(
R
t)
(
1
-
2
2
m
m
m
m
m
C
R
m
m
C
m
m
m
m
R
m
Z
X
Z
X
X
R
Z
Z
jX
jX
C
j
C
j
C
j
C
j
C
j
C
v
t
C
t
C
i
C
v
v
t
i
v
C
C
C
C
C
C
C
R
R










































angle
an
by
V
leads
I
angle
an
by
I
lag
v
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Siemens
in
measured
are
e
susceptanc
and
e
conductanc
nce)
B(Suscepta
R
nce)
G(conducta
where
R
R
R
1
Z
1
Y
Admittance
2
2
2
2
2
2
2
2
2
2
C
C
C
C
C
C
C
C
C
X
R
X
X
R
jB
G
X
R
X
j
X
R
X
R
jX
jX
















Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
The impedance may be expressed in rectangular form as Z = R ± jX
where Re[Z] is the resistance R and Im[Z ]is the reactance X.
The reactance X may be positive or negative.
The impedance is inductive when X is positive or capacitive when X is negative.
Thus, impedance Z = R + jX is said to be inductive or lagging since current lags voltage,
while impedance Z = R - jX is capacitive or leading because current leads voltage.
The impedance, resistance, and reactance are all measured in ohms.
Admittance, conductance, and susceptance are all expressed in the unit of Siemens (or mhos).
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
Steady state analysis of RLC series circuit
capacitor
the
across
voltage
t)
(
inductor
the
across
voltage
t)
(
resistor,
the
across
voltage
t)
(
V
is
t)
(
of
notation
phasor
the
circuit.
the
across
voltage
is
t)
(
0
I
I
is
t)
(
of
notation
phasor
the
sin
I
t)
(
Let
circuit
series
RLC
Consider
m
m






C
L
R
v
v
v
v
v
i
t
i 
Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
m
m
C
m
m
m
m
L
m
m
m
m
R
m
I
90
I
1
V
is
t)
(
of
notation
phasor
the
)
90
sin(
I
1
cos
I
1
t)dt
(
1
t)
(
LI
90
LI
V
is
t)
(
of
notation
phasor
the
)
90
sin(
LI
cos
LI
dt
t)
(
d
L
t)
(
RI
0
RI
V
is
t)
(
of
notation
phasor
the
sin
RI
t)
(
R
t)
(
C
j
C
v
t
C
t
C
i
C
v
j
v
t
t
i
v
v
t
i
v
C
C
L
L
R
R




































Aditya Engineering College (A)
Basic Electrical Circuits Tuesday, December 12, 2023
I V VEERANJANEYULU
R
tan
R
tan
and
,
X
where
R
Z
)
(
R
-
L
R
I
)I
-
L
R
(
I
V
Z
Impedance
)I
-
L
R
(
I
LI
RI
V
V
V
V
circuit
the
to
KVL
Applying
1
-
1
-
2
2
m
m
m
m
m
m
C
L
R
C
L
C
L
C
L
X
X
X
X
R
Z
X
X
Z
jX
X
X
j
C
j
j
C
j
j
C
j
j
C
j
j





































age.
with volt
inphase
current
and
circuit
resistive
as
behaves
circuit
the
and
zero
is
X
then
,
If
voltage.
leads
current
and
circuit
capacitive
as
behaves
circuit
the
and
negative
is
X
then
,
If
voltage.
lags
current
and
circuit
inductive
as
behaves
circuit
the
and
positive
is
X
then
,
If
L
C
L
C
C
L
X
X
X
X
X
X




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2. Steady state analysis of R, L and C circuits.pptx

  • 1. ADITYA ENGINEERING COLLEGE (A) Steady state analysis of R, L and C circuits By I V VEERANJANEYULU Dept of Electrical & Electronics Engineering Aditya Engineering College(A) Surampalem.
  • 2. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Concept of Phase angle and Phase difference A phasor diagram can be used to represent a sine wave in terms of its magnitude and angular position. The length of the arrow represents the magnitude of the sine wave and angle θ represents the angular position of the sine wave.   1 0 30 1 4∠1350 3∠2250
  • 3. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU   1 0 360 1   or 135 1 0 225 1   or ) 30 sin( 10 ) ( ) 45 sin( 10 ) ( sin 7 ) ( 0 0      t t v t t v t t v C B A    0 0 0 45 10 30 5 0 7        C B A V V V
  • 4. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Draw the phasor diagram to represent the two sine waves shown in fig.
  • 5. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Phasor Relationships for Circuit Elements Resistor If the current through a resistor R is i(t) = Im cos(ωt+Φ), then voltage across it is given by Ohm’s law as v(t) = i(t)R = RIm cos(ωt+Φ) The phasor form of this voltage is V = RIm ∠ Φ But the phasor representation of the current is I = Im ∠ Φ. Hence, V =R I Phasor diagram for the resistor. In case of resistor, Voltage wave form follows current wave form. Voltage phasor and current phasor are in phase. The impedance Z of a circuit is the ratio of the phasor voltage V to the phasor current I, measured in ohms (Ω). R I V Z        m m I RI
  • 6. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Inductor reactance inductive the is L where L 90 L I 90 LI I V Z Impedance LI 90 LI V and I I notation phasor The ) 90 cos( LI ) 90 cos( LI ). sin( LI dt t) ( d L t) ( is inductor the across voltage The ). cos( I t) ( is L inductor hrough current t the Assume m m m m m m m m m                                                    L L X jX j j t t t i v t i In case of inductor, current waveform lags voltage waveform by 900. Voltage phasor and current phasor are out of phase by 900, voltage phasor leads current phasor by 900 or current phasor lags voltage phasor by 900
  • 7. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Capacitor reactance capacitive the is C 1 where C 90 C 1 90 CV V I V Z Impedance CV 90 CV I and V V notation phasor The ) 90 cos( CV ) 90 cos( CV ). sin( CV dt t) ( d C t) ( is capacitor rough Current th The ). cos( V t) ( is C capacitor across voltage the Assume m m m m m m m m m                                                       C C X jX j j t t t v i t v In case of capacitor current waveform leads voltage waveform by 900. Voltage phasor and current phasor are out of phase by 900, voltage phasor lags current phasor by 900 or current phasor leads voltage phasor by 900.
  • 8. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU The admittance Y is the reciprocal of impedance, measured in siemens (S) Frequency (ω) is 0 for dc. Frequency (ω) is ∞ at high frequencies Z = jωL = 0 Z = jωL = ∞     C j Z  0    C j Z 
  • 9. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Steady state analysis of RL series circuit inductor the across voltage t) ( resistor, the across voltage t) ( V is t) ( of notation phasor the circuit. the across voltage is t) ( 0 I I is t) ( of notation phasor the sin I t) ( Let circuit series RL Consider m m      L R v v v v i t i 
  • 10. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU                sin and cos R R tan and where R Z R L R I L)I R ( I V Z Impedance L)I R ( LI RI V V V circuit the to KVL Applying LI 90 LI V is t) ( of notation phasor the ) 90 sin( LI cos LI dt t) ( d L t) ( RI 0 RI V is t) ( of notation phasor the sin RI t) ( R t) ( 1 - 2 2 m m m m m L R m m L m m m m R m Z X Z X X R Z Z jX jX j j j j j v t t i v v t i v L L L L L L L R R                                     angle an by V lags I angle an by I leads v
  • 11. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Siemens in measured are e susceptanc and e conductanc nce) B(Suscepta R nce) G(conducta where R R R 1 Z 1 Y Admittance 2 2 2 2 2 2 2 2 2 2 L L L L L L L L L X R X X R jB G X R X j X R X R jX jX                  
  • 12. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Steady state analysis of RC series circuit capacitor the across voltage t) ( resistor, the across voltage t) ( V is t) ( of notation phasor the circuit. the across voltage is t) ( 0 I I is t) ( of notation phasor the sin I t) ( Let circuit series RC Consider m m      C R v v v v i t i 
  • 13. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU                sin and cos R R tan and where R Z R R I )I R ( I V Z Impedance )I R ( I RI V V V circuit the to KVL Applying I 90 I 1 V is t) ( of notation phasor the ) 90 sin( I 1 cos I 1 t)dt ( 1 t) ( RI 0 RI V is t) ( of notation phasor the sin RI t) ( R t) ( 1 - 2 2 m m m m m C R m m C m m m m R m Z X Z X X R Z Z jX jX C j C j C j C j C j C v t C t C i C v v t i v C C C C C C C R R                                           angle an by V leads I angle an by I lag v
  • 14. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Siemens in measured are e susceptanc and e conductanc nce) B(Suscepta R nce) G(conducta where R R R 1 Z 1 Y Admittance 2 2 2 2 2 2 2 2 2 2 C C C C C C C C C X R X X R jB G X R X j X R X R jX jX                
  • 15. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU The impedance may be expressed in rectangular form as Z = R ± jX where Re[Z] is the resistance R and Im[Z ]is the reactance X. The reactance X may be positive or negative. The impedance is inductive when X is positive or capacitive when X is negative. Thus, impedance Z = R + jX is said to be inductive or lagging since current lags voltage, while impedance Z = R - jX is capacitive or leading because current leads voltage. The impedance, resistance, and reactance are all measured in ohms. Admittance, conductance, and susceptance are all expressed in the unit of Siemens (or mhos).
  • 16. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU Steady state analysis of RLC series circuit capacitor the across voltage t) ( inductor the across voltage t) ( resistor, the across voltage t) ( V is t) ( of notation phasor the circuit. the across voltage is t) ( 0 I I is t) ( of notation phasor the sin I t) ( Let circuit series RLC Consider m m       C L R v v v v v i t i 
  • 17. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU m m C m m m m L m m m m R m I 90 I 1 V is t) ( of notation phasor the ) 90 sin( I 1 cos I 1 t)dt ( 1 t) ( LI 90 LI V is t) ( of notation phasor the ) 90 sin( LI cos LI dt t) ( d L t) ( RI 0 RI V is t) ( of notation phasor the sin RI t) ( R t) ( C j C v t C t C i C v j v t t i v v t i v C C L L R R                                    
  • 18. Aditya Engineering College (A) Basic Electrical Circuits Tuesday, December 12, 2023 I V VEERANJANEYULU R tan R tan and , X where R Z ) ( R - L R I )I - L R ( I V Z Impedance )I - L R ( I LI RI V V V V circuit the to KVL Applying 1 - 1 - 2 2 m m m m m m C L R C L C L C L X X X X R Z X X Z jX X X j C j j C j j C j j C j j                                      age. with volt inphase current and circuit resistive as behaves circuit the and zero is X then , If voltage. leads current and circuit capacitive as behaves circuit the and negative is X then , If voltage. lags current and circuit inductive as behaves circuit the and positive is X then , If L C L C C L X X X X X X   