The document provides an overview of serial and parallel communication ports in PCs, detailing how they differ and their respective uses. It focuses on the RS232 protocol and the UART (Universal Asynchronous Receiver/Transmitter), explaining their roles in data transmission and the concept of handshaking between devices. Additionally, it includes technical specifications and register settings required for implementing serial communication through UART in computers.

1. BY-ARPAN BHATIA
EMBLOGIC 53 BATCH

2. SERIAL PORT
1. INTRODUCTION
Our PCs are generally contains two parallel ports and one serial port.
These both the ports work in different manner. Parallel port is generally used to
connect a PC to Printer, and rarely used for any other work. A parallel port
sends and receives the data 8 bits, through eight separate wires at a time. While
serial port send and receive one bit at a time by use of one wire. It uses three
wires one for send one for receive the data and one wire for ground. so two way
communication is possible in that case.
2. RS232 PROTOCOL
RS23 is a common standard protocol used for communication between
the computers and its peripheral devices. It specifies common voltage and
signal level, common pin wire configuration and minimum, amount of control
signals. As mentioned above this standard was designed with specification for
electromechanically teletypewriter and modem system and did not define
elements such as character encoding, framing of characters, error detection
protocols that are essential features when data transfer takes place between a
computer and a printer. Without which it could not be adopted to transfer data
between a computer and a printer. To overcome this problem a single integrated
circuit called as UART known as universal asynchronous receiver/transmitter is
used in conjunction with RS232.
A standard definition was given by EIA to define RS232 as “an interface
between Data terminal equipment and Data communication equipment”. A
typical RS232 system is shown below.
The arrangement to shown in fig1 and fig2-

3. Fig:1
Fig:2
2.1 DTE-A DTE stands for data terminal equipment is an end instrument that
convert user information into signals or reconverts the receive signal. It is a
functional unit of station that serves as data source or data sink and provides for
communication control function according to the link protocol. A male
connector is used in DTE and has pin out configuration.
2.2 DCE-A DCE stands for data communication equipments. It sits between the
DTE and data transmission circuit for example modem. A DCE device uses a
female connector which has holes on the surface to hold male connector.
A minimum of three signals are required for communication between a DTE
and a DCE devices. These signals are a transmission line, a reception line and
ground. These two devices communicate with each other by handshaking. It

4. allows a DTE and a DCE device system to acknowledge each other before
sending the data.
2.3 Handshaking -is a process in which a DTE device sends a signal to a DCE
device to establish a connection between the devices before the actual transfer
of data. It sets the parameters of communication channel establish between two
equipment before normal communication over the channel begins. It follows
physical establishment of the channel and precedes normal information
transfer. Handshaking makes it possible to connect relatively heterogeneous
systems or equipment over a communication channel without the need for
human intervention to set parameters. This same concept is used in RS232 to
allow two devices communicate with each other before the actual exchange of
information.
All these terms put together gives a complete picture of a RS232 system starting
from DTE to DCE with UART, line drivers and RS232 as conjunction between
them.
3.UART
The Universal Asynchronous Receiver/Transmitter (UART) controller is
the key component of the serial communications subsystem of a computer.
The UART takes bytes of data and transmits the individual bits in a sequential
fashion. At the destination, a second UART re-assembles the bits into complete
bytes. Serial transmission is commonly used with modems and for non-
networked communication between computers, terminals and other devices.
There are two primary forms of serial transmission: Synchronous and
Asynchronous Depending on the modes that are supported by the hardware.
3.1 SYNCHRONOUS SERIAL TRANSMISSION-Synchronous serial
transmission requires that the sender and receiver share a clock with one
another, or that the sender provide a strobe or other timing signal so that the

5. receiver knows when to “read” the next bit of the data. In most forms of serial
Synchronous communication, if there is no data available at a given instant to
transmit, a fill character must be sent instead so that data is always being
transmitted. Synchronous communication is usually more efficient because only
data bits are transmitted between sender and receiver, and synchronous
communication can be more costly if extra wiring and circuits are required to
share a clock signal between the sender and receiver. The standard serial
communications hardware in the PC does not support Synchronous operations.
3.2 ASYNCHRONOUS SERIAL TRANSMISSION-Asynchronous
transmission allows data to be transmitted without the sender having to send a
clock signal to the receiver. Instead, the sender and receiver must agree on
timing parameters in advance and special bits are added to each word which are
used to synchronize the sending and receiving units. When a word is given to
the UART for Asynchronous transmissions, a bit called the "Start Bit" is added
to the beginning of each word that is to be transmitted. The Start Bit is used to
alert the receiver that a word of data is about to be sent, and to force the clock in
the receiver into synchronization with the clock in the transmitter.

6. 4. BLOCK DIAGRAM OF UART-
Fig:3
Before Considering the Block Diagram this is necessary to know about the task
we want to perform there are mainly three task for we want to make the driver
of our serial port and give the following task under consideration we will
proceed further-
CASE1: To implement the NULL modem and send and receive a character.
CASE2: Modify the above driver and send a string using ring buffer.
CASE: Transfer a file using FTP across a serial port.
4.1 NULL MODEM -The null modem cable is frequently called a crossover
cable. It is used to allow two serial Data Terminal Equipment (DTE) devices to

7. communicate with each other without using a modem or a Data Communications
Equipment (DCE) device in between. For this to happen, the Transmit (TXD) pin
of one device needs to be connected to the Receive (RXD) pin of the other
device. To enable handshaking between the two devices, the Request to Send
(RTS) pin of one device must be connected to the Clear to Send (CTS) pin of the
other device. Because these pins are "crossed" on the two cable terminals, the
name crossover cable is used.
A straight-through cable is used to connect a DTE device to a DCE
device. The TXD-RXD and RTS-CTS pins are not cross-connected in this case,
hence the term straight through cable.
Fig: 4 Simple Null Modem
Fig: 5 Null Modem with Handshaking

8. 5. REGISTERS-
To set the addresses of register first we set the BASE_ADDRESS in header file
i.e. 0x3f8 and according to the table 1 we given the address of all registers as
follows
#define BASE_ADDRESS 0X3f8
#define RBR (BASE_ADDRESS+0)
#define DLL (BASE_ADDRESS+0)
#define DLM (BASE_ADDRESS+1)
#define THR (BASE_ADDRESS+0)
#define IER (BASE_ADDRESS+1)
#define IIR (BASE_ADDRESS+2)
#define FCR (BASE_ADDRESS+2)
#define LCR (BASE_ADDRESS+3)
#define MCR (BASE_ADDRESS+4)
#define LSR (BASE_ADDRESS+5)
#define MSR (BASE_ADDRESS+6)
#define SCR (BASE_ADDRESS+7)
5.1 Line Control Registers (LCR) - The Default value of this registers is
0000 0000 it is called also the reset value. The programmer can also read the
contents of the Line Control Register. The read capability simplifies system
programming and eliminates the need for separate storage in system memory of
the line characteristics. The system programmer specifies the format of the
asynchronous data communications exchange and set the Divisor Latch Access
bit via the Line Control Register (LCR).
CASE1: According to table 1 we have to set the value. first we initialize the
value of LCR 0x8c using outb(0x8c,LCR); to activate the divisor latch.
After this we have to set the baud rate according to specification of computer.

9. Than we again set this register to outb(0x03,LCR); to assign the number of bits
to send and access receiver buffer, Transmitter holding register and interrupt
enable register.
5.2 DIVISOR LETCH- This register is used to set the baud rate for the
computer. It is a 16 bit register divided into two parts Divisor Letch (LS) and
Divisor Latch (MS) generally called as DLL and DLM. We can set baud rate
According to the given table below or we have a formula i.e.
output frequency of the Baud Generator is 16 x the Baud [divisor =
16 x (frequency input) / (baud rate c 16)].
Table:1
we put the value in init file for DLL and DLM like: outb(0x0c,DLL); and
(0x00,DLM);.
After this we put the value of LCR is (0x03,LCR); as discussed above.
5.3 Line Status Register (LSR) - This register provides status information to
the CPU concerning the data transfer. Its default value is 0110 0000.
we will set the bit 0 of this register because this bit is use to tell us that this bit
will be 1 whenever all the characters will be received and transfer to receiver
buffer register this bit will become 0 when all all the data has been read from

10. RBR or FIFO. So we set the program in a manner so that it will fulfill the above
condition as below in our read file.
do
{
status=inb(LSR);
printk(KERN_INFO"status (in do while):%xn",status);
}
while((status & (0x01))!=0x01);
printk(KERN_INFO"status ( after do while):%xn",status);
*((char *)temp->data)=inb(BASE_ADDRESS+0);
ret=copy_to_user(rbuff,temp->data,1);
#ifdef DEBUG
printk(KERN_INFO"ret:%dn",ret);
printk(KERN_INFO"read data:%cn",*(char *)rbuff);
#endif
Table: 2

11. According to the given table we have to set the value in Line Status Register.
5.4 FIFO CONTROL REGISTER: This will come in use when we have to
send a string through serial port. As discussed above in case 2. The default bit
of this register is set to 0000 0000.
Bit 0: Writing a 1 to FCR0 enables both the XMIT and RCVR FIFOs. Resetting
FCR0 will clear all bytes in both FIFOs. When changing from the FIFO Mode
to the 16450 Mode and vice versa, data is automatically cleared from the FIFOs.
This bit must be a 1 when other FCR bits are written to or they will not be
programmed.
Bit 1: Writing a 1 to FCR1 clears all bytes in the RCVR FIFO and resets its
counter logic to 0. The shift register is not cleared. The 1 that is written to this
bit position is self-clearing.
Bit 2: Writing a 1 to FCR2 clears all bytes in the XMIT FIFO and resets its
counter logic to 0. The shift register is not cleared. The 1 that is written to this
bit position is self-clearing.
Bit 3: Setting FCR3 to a 1 will cause the RXRDY and TXRDY pins to change
from mode 0 to mode 1 if FCR0e1 (see description of RXRDY and TXRDY
pins).
Bit 4, 5: FCR4 to FCR5 are reserved for future use.
Bit 6, 7: FCR6 and FCR7 are used to set the trigger level for the RCVR FIFO
interrupt.
Table: 3

12. By activate FIFO Registers we transferred a string through the serial port
registers.