Universal Gates - Aneesa N Ali

1. ANEESA N ALI
PGT(COMPUTER SCIENCE)
KENDRIYA VIDYALAYA MALAPPURAM
UNIVERSAL GATES

2. Objectives
• What are gates?
• Fundamental gates.
• Universal gates - NAND and NOR.
• How to implement NOT, AND, and OR gates using NAND gates only.
• How to implement NOT, AND, and OR gates using NOR gates only.
• Equivalent gates.
• Two-level digital circuit implementations using universal gates only.
• Applications
4–2

3. What is a gate?
• Combination of transistors(circuit) that takes one or more
inputs and generates an output.
• So called because one logic state enables or “gates”
another logic state.
• For each gate, the symbol, the truth table, and the formula
are shown.

5. NOT Gate
• A NOT gate accepts one input value
and produces one output value

6. AND Gate
• An AND gate accepts two input signals
• If the two input values for an AND gate are
both 1, the output is 1; otherwise, the
output is 0

7. OR Gate
• If the two input values are both 0, the
output value is 0; otherwise, the output is 1

8. • A universal gate is a gate which can implement any Boolean function
without using any other gate type.
• The NAND and NOR gates are universal gates.
• In practice, this is advantageous since NAND and NOR gates are
economical and easier to fabricate and are the basic gates used in
all IC digital logic families.
• In fact, an AND gate is typically implemented as a NAND gate
followed by an inverter, not the other way around!!
• Likewise, an OR gate is typically implemented as a NOR gate
followed by an inverter, not the other way around!!

9. NAND and NOR Gates
• The NAND and NOR gates are essentially the
opposite of the AND and OR gates, respectively

10. How to use NAND gates to build a NOT gate?
Truth Table
Hint!
Link inputs B & C together (to a same source).
When A = 0, B = C = 0
When A = 1, B = C = 1
A Q
C
B A B C Q
0 0 0 1
1 1 1 0

11. How to use NAND gates to build an AND gate?
Truth Table
A
Q
B
A B C Q
0 0 1 0
0 1 1 0
1 0 1 0
1 1 0 1
C
Hint 1 : Use 2 NAND gates
Hint 2 : From a NAND gate, build a NOT gate
Hint 3 : Put this “NOT” gate after the NAND gate
NAND NOT

12. How to use NAND gates to build an OR gate?
Truth Table
A B C D Q
0 0 1 1 0
0 1 1 0 1
1 0 0 1 1
1 1 0 0 1
Hint 1 : Use 3 NAND gates
Hint 2 : Use 2 NAND gates to build 2 NOT gates
Hint 3 : Put the 3rd NAND gate
after the 2 “NOT” gates
A
B
C
D
Q

13. How to use NOR gate to build a NOT gate?
Truth Table
A B C Q
0 0 0 1
1 1 1 0
Hint!
Link inputs B & C together (to a same source).
A Q
B
C
When A = 0, B = C = 0
When A = 1, B = C = 1

14. How to use NOR gates to build an OR gate?
Truth Table
Hint 1 : Use 2 NOR gates
A
Q
B
C
Hint 2 : From a NOR gate, build a NOT gate
Hint 3 : Put this “NOT” gate after a NOR gate
D
E
A B C D E Q
0 0 1 1 1 0
0 1 0 0 0 1
1 0 0 0 0 1
1 1 0 0 0 1
NOR NOT

15. How to use NOR gates to build an AND gate?
Truth Table
Hint 1 : Use 3 NOR gates
Hint 2 : From 2 NOR gates, build 2 NOT gates
Hint 3 : Each “NOT” gate
is an input to the 3rd NOR gate
A B C D Q
0 0 1 1 0
0 1 1 0 0
1 0 0 1 0
1 1 0 0 1
A
B
C
D
Q

16. How to use NAND gates to build a NOR gate?
Truth Table
A B C D E Q
0 0 1 1 0 1
0 1 1 0 1 0
1 0 0 1 1 0
1 1 0 0 1 0
Hint 1 : Use 4 NAND gates
Hint 2 : Use 3 NAND gates to build an OR gate
Hint 3 : Use a NOR gate to build a NOT gate
A
B
C
D
Q
E
Hint 4 : Put the “NOT” gate after “OR” gate

17. How to use NOR gates to build a NAND gate?
Truth Table
Hint 2 : Use 3 NOR gates
to build a NAND gate
Hint 3 : Use the 4th NOR gate to build a NOT gate
Hint 4 : Insert “NOT” gate after “NAND” gate
Hint 1 : Use 4 NOR gates
A
B
C
D
Q
E
A B C D E Q
0 0 1 1 0 1
0 1 1 0 0 1
1 0 0 1 0 1
1 1 0 0 1 0

18. Equivalent Gates
• A NAND gate is equivalent to an inverted-input OR gate.
• A NOR gate is equivalent to an inverted-input AND gate.

19. Two-Level Implementations
• Boolean functions in either SOP or POS forms can be implemented
using 2-Level implementations.
• For SOP forms AND gates will be in the first level and a single OR
gate will be in the second level.
• For POS forms OR gates will be in the first level and a single AND
gate will be in the second level.
• Using inverters to complement input variables is not counted as a
level.
• SOP forms can be implemented using only NAND gates, while POS
forms can be implemented using only NOR gates.

20. Example 1: Implement the following SOP function
F = XZ + Y’Z + X’YZ

21. Example 2: Implement the following POS function
F = (X+Z) (Y’+Z) (X’+Y+Z)

22. • Applications:
Used in manufacturing logic circuits(devices such
as multiplexers, registers, ALUs.
Flash memory
4–22

23. Questions??
• Why are NAND and NOR called universal gates?
• How many NAND gates make an AND gate?
• How many NOR gates make an OR gate?
• An inverted input OR gate is a ……………... Gate.
• POS forms can be implemented using ………. Gates.
4–23

24. THANK YOU