SlideShare a Scribd company logo
1 of 16
NAND and NOR
As a universal gates
Prepared by: Kaushal Shah
Branch – 3rd Semester, Bio-medical engineering
What are a Universal Gate
And why NAND and NOR are
known as universal gates?
 A gate which can be use to create any Logic
gate is called Universal Gate
 NAND and NOR are called Universal Gates
because all the other gates can be created by
using these gates
Proof for NAND gates
 Any Boolean function
can be implemented using AND, OR and NOT
gates
 In the same way AND, OR and NOT gates can
be implemented using NAND gates only,
Implementation of NOT using
NAND
A NOT gate is made by joining the inputs of a NAND
gate together.
Input Output
0 1
1 0
Desired NOT Gate NAND Construction
Implementation of AND using
NAND
 A NAND gate is an inverted AND gate.
 An AND gate is made by following a NAND gate with
a NOT gate
NAND Construction
Input A Input B Output Q
0 0 0
0 1 0
1 0 0
1 1 1
Implementation of OR gate using
NAND
• If the truth table for a NAND gate is examined or by
applying De Morgan's Laws, it can be seen that if any of
the inputs are 0, then the output will be 1. To be an OR
gate,
Input A Input B Output Q
0 0 0
0 1 1
1 0 1
1 1 1NAND Construction
Implementation of NOR gate using
NAND
 A NOR gate is simply an inverted OR gate. Output is
high when neither input A nor input B is high:
Input A Input B Output Q
0 0 1
0 1 0
1 0 0
1 1 0
NAND Construction
Implementation of XOR gate using
NAND
 An XOR gate is constructed similarly to an OR
gate, except with an additional NAND
gate inserted such that if both inputs are high,
the inputs to the final NAND gate will also be
high,
Input A Input B Output Q
0 0 0
0 1 1
1 0 1
1 1 0NAND Construction
Implementation of XNOR gate using
NAND
• An XNOR gate is simply an XOR gate with an inverted
output:
Input A Input B Output Q
0 0 1
0 1 0
1 0 0
1 1 1
NAND Construction
Proof for NOR gates
 Like NAND gates, NOR gates are so-called "universal
gates" that can be combined to form any other kind
of logic gate. A NOR gate is logically an inverted OR
gate
Implementation of NOT gate
using NOR
 NOT made by joining the inputs
of a NOR gate.
Input Output
0 1
1 0
Implementation of OR gate using NOR
Input A Input B Output Q
0 0 0
0 1 1
1 0 1
1 1 1
• The OR gate is simply a NOR gate followed by another
NOR gate
Desired Gate
Implementation of AND gate
using NOR
Input A Input B Output Q
0 0 0
0 1 0
1 0 0
1 1 1
• an AND gate is made by inverting the inputs to a
NOR gate.
NOR Construction
Implementation of NAND gate
using NOR
NOR Construction
Implementation of XOR gate using
NOR
 An XOR gate is made by connecting the output of 3
NOR gates (connected as an AND gate) and the output
of a NOR gate to the respective inputs of a NOR gate.
Input A Input B Output Q
0 0 0
0 1 1
1 0 1
1 1 0NOR Construction
Implementation of XNOR gate using
NOR
 An XNOR gate can be constructed from four NOR gates
implementing the expression "(A NOR N) NOR (B NOR
N) where N = A NOR B". This construction has a
propagation delay three times that of a single NOR gate,
and uses more gates.
Input A Input B Output Q
0 0 1
0 1 0
1 0 0
1 1 1NOR Construction
The End!!
Thank you

More Related Content

What's hot

Half adder & full adder
Half adder & full adderHalf adder & full adder
Half adder & full adderGaditek
 
NAND and NOR implementation and Other two level implementation
NAND and NOR implementation and  Other two level implementationNAND and NOR implementation and  Other two level implementation
NAND and NOR implementation and Other two level implementationMuhammad Akhtar
 
Latches and flip flop
Latches and flip flopLatches and flip flop
Latches and flip flopShuaib Hotak
 
Decoder Full Presentation
Decoder Full Presentation Decoder Full Presentation
Decoder Full Presentation Adeel Rasheed
 
Decoders
DecodersDecoders
DecodersRe Man
 
Digital Logic & Design (DLD) presentation
Digital Logic & Design (DLD) presentationDigital Logic & Design (DLD) presentation
Digital Logic & Design (DLD) presentationfoyez ahammad
 
Digital logic gates and Boolean algebra
Digital logic gates and Boolean algebraDigital logic gates and Boolean algebra
Digital logic gates and Boolean algebraSARITHA REDDY
 
decoder and encoder
 decoder and encoder decoder and encoder
decoder and encoderUnsa Shakir
 
Combinational circuits
Combinational circuits Combinational circuits
Combinational circuits DrSonali Vyas
 
Universal logic gate
Universal logic gateUniversal logic gate
Universal logic gatesana younas
 
Logic gates ppt
Logic gates pptLogic gates ppt
Logic gates pptparassini
 

What's hot (20)

Half adder & full adder
Half adder & full adderHalf adder & full adder
Half adder & full adder
 
Digital Logic circuit
Digital Logic circuitDigital Logic circuit
Digital Logic circuit
 
NAND and NOR implementation and Other two level implementation
NAND and NOR implementation and  Other two level implementationNAND and NOR implementation and  Other two level implementation
NAND and NOR implementation and Other two level implementation
 
Latches and flip flop
Latches and flip flopLatches and flip flop
Latches and flip flop
 
Combinational circuits
Combinational circuitsCombinational circuits
Combinational circuits
 
Decoder Full Presentation
Decoder Full Presentation Decoder Full Presentation
Decoder Full Presentation
 
Flipflop
FlipflopFlipflop
Flipflop
 
Nand gate
Nand gateNand gate
Nand gate
 
Decoders
DecodersDecoders
Decoders
 
Digital Logic & Design (DLD) presentation
Digital Logic & Design (DLD) presentationDigital Logic & Design (DLD) presentation
Digital Logic & Design (DLD) presentation
 
Multiplexers & Demultiplexers
Multiplexers & DemultiplexersMultiplexers & Demultiplexers
Multiplexers & Demultiplexers
 
Digital logic gates and Boolean algebra
Digital logic gates and Boolean algebraDigital logic gates and Boolean algebra
Digital logic gates and Boolean algebra
 
Logic gates presentation
Logic gates presentationLogic gates presentation
Logic gates presentation
 
decoder and encoder
 decoder and encoder decoder and encoder
decoder and encoder
 
Subtractor
SubtractorSubtractor
Subtractor
 
Encoder
EncoderEncoder
Encoder
 
Combinational circuit
Combinational circuitCombinational circuit
Combinational circuit
 
Combinational circuits
Combinational circuits Combinational circuits
Combinational circuits
 
Universal logic gate
Universal logic gateUniversal logic gate
Universal logic gate
 
Logic gates ppt
Logic gates pptLogic gates ppt
Logic gates ppt
 

Similar to NAND NOR universal gates

Universal Gates - Aneesa N Ali
Universal Gates - Aneesa N AliUniversal Gates - Aneesa N Ali
Universal Gates - Aneesa N AliDipayan Sarkar
 
Dsd lab internal q.paper
Dsd lab internal q.paperDsd lab internal q.paper
Dsd lab internal q.paperArun Dasa
 
LOGICAL_GATES_priyansh_singhal.pdf
LOGICAL_GATES_priyansh_singhal.pdfLOGICAL_GATES_priyansh_singhal.pdf
LOGICAL_GATES_priyansh_singhal.pdfMeghaChauhan75
 
NAND AND NOR IMPLEMENTATION.pptx
NAND AND NOR IMPLEMENTATION.pptxNAND AND NOR IMPLEMENTATION.pptx
NAND AND NOR IMPLEMENTATION.pptxrecoveraccount1
 
introduction of logic gates
introduction of logic gates introduction of logic gates
introduction of logic gates HASNAINNAZIR1
 
UNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptxUNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptxGaganaP13
 
New microsoft office power point presentation
New microsoft office power point presentationNew microsoft office power point presentation
New microsoft office power point presentationarushi bhatnagar
 
LOGICAL GATES mayank chauhan.pdf
LOGICAL GATES mayank chauhan.pdfLOGICAL GATES mayank chauhan.pdf
LOGICAL GATES mayank chauhan.pdfMeghaChauhan75
 
Chapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdfChapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdfTamiratDejene1
 
Physics investigatory project { LOGIC GATES} CLASS XII
Physics investigatory project  { LOGIC GATES} CLASS XIIPhysics investigatory project  { LOGIC GATES} CLASS XII
Physics investigatory project { LOGIC GATES} CLASS XIIavneesh1234
 
ICT Basic Logic Gates Lessons.pptx
ICT Basic Logic Gates Lessons.pptxICT Basic Logic Gates Lessons.pptx
ICT Basic Logic Gates Lessons.pptxChristianVelchez2
 
Digital Electronics Logic gates
Digital Electronics Logic gatesDigital Electronics Logic gates
Digital Electronics Logic gatesMD Mahadi Hasan
 
11_Fundamentals_of_Digital_Electronics_L.pptx
11_Fundamentals_of_Digital_Electronics_L.pptx11_Fundamentals_of_Digital_Electronics_L.pptx
11_Fundamentals_of_Digital_Electronics_L.pptxElisée Ndjabu
 

Similar to NAND NOR universal gates (20)

Nand and nor
Nand and norNand and nor
Nand and nor
 
Universal Gates - Aneesa N Ali
Universal Gates - Aneesa N AliUniversal Gates - Aneesa N Ali
Universal Gates - Aneesa N Ali
 
Dsd lab internal q.paper
Dsd lab internal q.paperDsd lab internal q.paper
Dsd lab internal q.paper
 
LOGICAL_GATES_priyansh_singhal.pdf
LOGICAL_GATES_priyansh_singhal.pdfLOGICAL_GATES_priyansh_singhal.pdf
LOGICAL_GATES_priyansh_singhal.pdf
 
NAND AND NOR IMPLEMENTATION.pptx
NAND AND NOR IMPLEMENTATION.pptxNAND AND NOR IMPLEMENTATION.pptx
NAND AND NOR IMPLEMENTATION.pptx
 
Chap 3
Chap 3Chap 3
Chap 3
 
introduction of logic gates
introduction of logic gates introduction of logic gates
introduction of logic gates
 
UNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptxUNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptx
 
New microsoft office power point presentation
New microsoft office power point presentationNew microsoft office power point presentation
New microsoft office power point presentation
 
LOGICAL GATES mayank chauhan.pdf
LOGICAL GATES mayank chauhan.pdfLOGICAL GATES mayank chauhan.pdf
LOGICAL GATES mayank chauhan.pdf
 
Chapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdfChapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdf
 
ECAD lab manual
ECAD lab manualECAD lab manual
ECAD lab manual
 
Electronics: Logic Gates
Electronics: Logic GatesElectronics: Logic Gates
Electronics: Logic Gates
 
Physics investigatory project { LOGIC GATES} CLASS XII
Physics investigatory project  { LOGIC GATES} CLASS XIIPhysics investigatory project  { LOGIC GATES} CLASS XII
Physics investigatory project { LOGIC GATES} CLASS XII
 
Deld lab manual
Deld lab manualDeld lab manual
Deld lab manual
 
ICT Basic Logic Gates Lessons.pptx
ICT Basic Logic Gates Lessons.pptxICT Basic Logic Gates Lessons.pptx
ICT Basic Logic Gates Lessons.pptx
 
Digital Electronics Logic gates
Digital Electronics Logic gatesDigital Electronics Logic gates
Digital Electronics Logic gates
 
11_Fundamentals_of_Digital_Electronics_L.pptx
11_Fundamentals_of_Digital_Electronics_L.pptx11_Fundamentals_of_Digital_Electronics_L.pptx
11_Fundamentals_of_Digital_Electronics_L.pptx
 
e CAD lab manual
e CAD lab manuale CAD lab manual
e CAD lab manual
 
Logic gates
Logic gatesLogic gates
Logic gates
 

Recently uploaded

Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girlsssuser7cb4ff
 
Work Experience-Dalton Park.pptxfvvvvvvv
Work Experience-Dalton Park.pptxfvvvvvvvWork Experience-Dalton Park.pptxfvvvvvvv
Work Experience-Dalton Park.pptxfvvvvvvvLewisJB
 
Introduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptxIntroduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptxk795866
 
Application of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptxApplication of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptx959SahilShah
 
An experimental study in using natural admixture as an alternative for chemic...
An experimental study in using natural admixture as an alternative for chemic...An experimental study in using natural admixture as an alternative for chemic...
An experimental study in using natural admixture as an alternative for chemic...Chandu841456
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AIabhishek36461
 
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort serviceGurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort servicejennyeacort
 
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...srsj9000
 
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptxDecoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptxJoão Esperancinha
 
Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.eptoze12
 
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdfCCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdfAsst.prof M.Gokilavani
 
Introduction to Machine Learning Unit-3 for II MECH
Introduction to Machine Learning Unit-3 for II MECHIntroduction to Machine Learning Unit-3 for II MECH
Introduction to Machine Learning Unit-3 for II MECHC Sai Kiran
 
pipeline in computer architecture design
pipeline in computer architecture  designpipeline in computer architecture  design
pipeline in computer architecture designssuser87fa0c1
 
INFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETE
INFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETEINFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETE
INFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETEroselinkalist12
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidNikhilNagaraju
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxDeepakSakkari2
 
Risk Assessment For Installation of Drainage Pipes.pdf
Risk Assessment For Installation of Drainage Pipes.pdfRisk Assessment For Installation of Drainage Pipes.pdf
Risk Assessment For Installation of Drainage Pipes.pdfROCENODodongVILLACER
 
GDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSCAESB
 

Recently uploaded (20)

Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girls
 
Work Experience-Dalton Park.pptxfvvvvvvv
Work Experience-Dalton Park.pptxfvvvvvvvWork Experience-Dalton Park.pptxfvvvvvvv
Work Experience-Dalton Park.pptxfvvvvvvv
 
Introduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptxIntroduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptx
 
Application of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptxApplication of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptx
 
An experimental study in using natural admixture as an alternative for chemic...
An experimental study in using natural admixture as an alternative for chemic...An experimental study in using natural admixture as an alternative for chemic...
An experimental study in using natural admixture as an alternative for chemic...
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AI
 
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort serviceGurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
 
Design and analysis of solar grass cutter.pdf
Design and analysis of solar grass cutter.pdfDesign and analysis of solar grass cutter.pdf
Design and analysis of solar grass cutter.pdf
 
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
 
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptxDecoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
 
Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.
 
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdfCCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
 
Introduction to Machine Learning Unit-3 for II MECH
Introduction to Machine Learning Unit-3 for II MECHIntroduction to Machine Learning Unit-3 for II MECH
Introduction to Machine Learning Unit-3 for II MECH
 
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptxExploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
 
pipeline in computer architecture design
pipeline in computer architecture  designpipeline in computer architecture  design
pipeline in computer architecture design
 
INFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETE
INFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETEINFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETE
INFLUENCE OF NANOSILICA ON THE PROPERTIES OF CONCRETE
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfid
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptx
 
Risk Assessment For Installation of Drainage Pipes.pdf
Risk Assessment For Installation of Drainage Pipes.pdfRisk Assessment For Installation of Drainage Pipes.pdf
Risk Assessment For Installation of Drainage Pipes.pdf
 
GDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentation
 

NAND NOR universal gates

  • 1. NAND and NOR As a universal gates Prepared by: Kaushal Shah Branch – 3rd Semester, Bio-medical engineering
  • 2. What are a Universal Gate And why NAND and NOR are known as universal gates?  A gate which can be use to create any Logic gate is called Universal Gate  NAND and NOR are called Universal Gates because all the other gates can be created by using these gates
  • 3. Proof for NAND gates  Any Boolean function can be implemented using AND, OR and NOT gates  In the same way AND, OR and NOT gates can be implemented using NAND gates only,
  • 4. Implementation of NOT using NAND A NOT gate is made by joining the inputs of a NAND gate together. Input Output 0 1 1 0 Desired NOT Gate NAND Construction
  • 5. Implementation of AND using NAND  A NAND gate is an inverted AND gate.  An AND gate is made by following a NAND gate with a NOT gate NAND Construction Input A Input B Output Q 0 0 0 0 1 0 1 0 0 1 1 1
  • 6. Implementation of OR gate using NAND • If the truth table for a NAND gate is examined or by applying De Morgan's Laws, it can be seen that if any of the inputs are 0, then the output will be 1. To be an OR gate, Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 1NAND Construction
  • 7. Implementation of NOR gate using NAND  A NOR gate is simply an inverted OR gate. Output is high when neither input A nor input B is high: Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 0 NAND Construction
  • 8. Implementation of XOR gate using NAND  An XOR gate is constructed similarly to an OR gate, except with an additional NAND gate inserted such that if both inputs are high, the inputs to the final NAND gate will also be high, Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 0NAND Construction
  • 9. Implementation of XNOR gate using NAND • An XNOR gate is simply an XOR gate with an inverted output: Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 1 NAND Construction
  • 10. Proof for NOR gates  Like NAND gates, NOR gates are so-called "universal gates" that can be combined to form any other kind of logic gate. A NOR gate is logically an inverted OR gate Implementation of NOT gate using NOR  NOT made by joining the inputs of a NOR gate. Input Output 0 1 1 0
  • 11. Implementation of OR gate using NOR Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 1 • The OR gate is simply a NOR gate followed by another NOR gate Desired Gate
  • 12. Implementation of AND gate using NOR Input A Input B Output Q 0 0 0 0 1 0 1 0 0 1 1 1 • an AND gate is made by inverting the inputs to a NOR gate. NOR Construction
  • 13. Implementation of NAND gate using NOR NOR Construction
  • 14. Implementation of XOR gate using NOR  An XOR gate is made by connecting the output of 3 NOR gates (connected as an AND gate) and the output of a NOR gate to the respective inputs of a NOR gate. Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 0NOR Construction
  • 15. Implementation of XNOR gate using NOR  An XNOR gate can be constructed from four NOR gates implementing the expression "(A NOR N) NOR (B NOR N) where N = A NOR B". This construction has a propagation delay three times that of a single NOR gate, and uses more gates. Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 1NOR Construction