This document discusses the characteristics and circuitry of transistor-transistor logic (TTL) and emitter-coupled logic (ECL) families. It describes that TTL uses a totem-pole output configuration with NAND gates as the basic circuit. ECL is a non-saturated current mode logic with limited voltage swing and OR/NOR outputs. The document outlines advantages such as high speed and low output impedance for ECL, but also disadvantages like high cost and power consumption. Circuit diagrams and explanations of the OR/NOR gate operation in ECL are provided.

1. Mrs. P.Sivalakshmi
Assistant Professor/ECE
R.M.K College of Engineering & Technology
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
Unit 5
Session5

2. ➢ It can perform many digital function and have
achieved the most popularity.
➢ TTL IC are given the numerical designation as
5400 and 7400 series
➢ The basic circuit of TTL with totem pole output
stage is NAND gate

3. Circuit Diagram

4. Advantages of Totem-Pole Configuration
• Even though the circuit can work with Q4 and D removed and R4 connected directly
to the collector of Q3 with Q4 in the circuit there is no current through R4 in the
output LOW state. So, the inclusion of Q3 and D keeps the circuit power dissipation
low.
• In the output HIGH state, Q4 acts as an emitter follower with its associated low
output impedance. This low output impedance provides a small time constant for
charging up any capacitive load on the output. This action is commonly Referred to
as active pull-up and it provides very fast rise time waveforms at TTL output.

5. Disadvantages of Totem-Pole Configuration
1. During transition of the output from LOW to HIGH, Q3 turns off more slowly than Q4
turns on, and so, there is period of a few nanoseconds during which both Q3 and Q4
are conducting and, therefore, relatively large currents will be draw from the supply.
So, TTL circuits suffer from internally generated current transients or current spikes
because of the totem-pole connection.
2. Totem-pole outputs cannot ne wire ANDed, that is, the output of a number of gates
cannot be tied together to obtain AND operation of those outputs.

6. ➢ ECL is non saturated digital logic family.
➢ Also known as Current-mode logic, Current Steering logic
➢ Currents are kept high, and low output impedance is
maintained
➢ Limited voltage swing.
➢ The output of ECL provides OR and NOR function.
➢ Each input is connected to the base of transistor.

7. Disadvantages of ECL
➢ High cost.
➢ Low Noise Margin.
➢ Its negative supply voltage and logic levels are not
compatible with other logic levels.
➢ Problem of cooling.
➢ High power consumption

8. Advantages of ECL logic Family
➢ Current from Supply is always steady.
➢ Still used in super power computers
➢ Used in high-speed special purpose applications.
➢ It can be Wired ORed,
➢ No noise spikes are generated,
➢ Complementary Outputs are also available.

9. Important Characteristics of ECL logic Family
➢ Transistors never Saturate.
➢ Logic levels are negative. i.e.,
➢ -0.9V logic 1(High)
➢ -1.7Vlogic 0(Low)
➢ Noise Margin is less about 250mv(not reliable for heavy
industries)
➢ ECL circuits produce the output and its complement, and
therefore, eliminate the need for inverters.

10. ➢Fan-out is large because the output impedance is low. It is
about 25.
➢Power dissipation per gate is large, PD = 40 mW.
➢The total current flow in ECL is more or less constant.
So, no noise spikes will be internally generated.
Important Characteristics of ECL logic Family

11. Circuit Diagram
➢ -0.9V logic 1(High)
➢ -1.7Vlogic 0(Low)

12. ➢Case1: A=B=Low=-1.7v;
➢Q2 is more F.B than Q1A&Q1bOFF
➢R2 is chosen in such a way that current through the
collector of Q2 puts the voltage to about -0.9v.
➢Therefore the emitter of Q4 is at -0.9v-0.8v=-1.7v,so the
OR output is low.
➢Base current to Q3 is very small, which passes through R1.
Working of OR/NOR gate

13. ➢Case1: A=B=Low=-1.7v;
➢R1 is chosen in such a way that current through the
collector of Q1A&Q1B puts the voltage to about -0.1v.
➢Therefore the emitter of Q3 is at -0.1v-0.8v=-0.9v,so the
NOR output is High.
Working of OR/NOR gate

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