The document discusses different addressing modes in MIPS including immediate, register, base/displacement, PC-relative, and pseudo direct addressing. It provides examples of instructions that use each addressing mode and explains what they do. MIPS uses different instruction formats for jumps, branches, and other instructions. Branches require two operands and calculate the branch address relative to the program counter. Loops in MIPS code are also demonstrated with examples of how they would appear in assembly code.

1. A.S.PrabaharanAP/CSE
UNIT I MIPS Addressing

2. Addressing in Branches and Jumps
 The MIPS jump instructions have the simplest addressing.
 They use the final MIPS instruction format, called the J-type,
which consists of 6 bits for the operation field and the rest of the
bits for the address field.
 j 10000 # go to location 10000
 where the value of the jump opcode is 2 and the jump address is
10000.

3.  Unlike the jump instruction, the conditional branch instruction
must specify two operands in addition to the branch address.
 bne $s0,$s1,Exit # go to Exit if $s0 ≠ $s1
 branch instruction would calculate the following:
 Program counter Register Branch address
 PC-relative addressing

4.  Showing Branch Offset in Machine Language
 The while loop as compiled into this MIPS assembler code:
 Loop:sll $t1,$s3,2 #Temp reg $t1 = 4 * i
 add $t1,$t1,$s6 # $t1 = address of save[i]
 lw $t0,0($t1) #Temp reg $t0 = save[i]
 bne $t0,$s5, Exit # go to Exit if save[i] ≠ k
 addi $s3,$s3,1 # i = i + 1
 j Loop # go to Loop
 Exit:

5.  If we assume we place the loop starting at location 80000 in
memory, what is the MIPS machine code for this loop?
 The assembled instructions and their addresses are:

6. MIPS Addressing Mode
 Addressing mode One of several addressing regimes delimited by
their varied use of operands and/or addresses.
 1. Immediate addressing, where the operand is a constant within
the instruction itself
 2. Register addressing, where the operand is a register
 3. Base or displacement addressing, where the operand is at the
memory location whose address is the sum of a register and a
constant in the instruction
 4. PC-relative addressing, where the branch address is the sum of
the PC and a constant in the instruction
 5. Pseudo direct addressing, where the jump address is the 26
bits of the instruction concatenated with the upper bits of the PC

10. What is the Addressing Mode
 Add $s0,$s1,5
 A. Register addressing
 B. Immediate addressing
 C. Base addressing
 D. PC-relative addressing
 Ans:B

11. What is the Addressing Mode
 Add $s0,$s1,$s2
 A. Register addressing
 B. Immediate addressing
 C. Base addressing
 D. PC-relative addressing
 Ans:A

12. What is the Addressing Mode
 Lw $t0,32(s3)
 A. Register addressing
 B. Immediate addressing
 C. Base addressing
 D. PC-relative addressing
 Ans:C

13. What is the Addressing Mode
 beq $t0,$3,Label
 A. Register addressing
 B. Immediate addressing
 C. Base addressing
 D. PC-relative addressing
 Ans:D

14. What is the Addressing Mode
 J 2000
 A. Register addressing
 B. Immediate addressing
 C. Base addressing
 D. PC-relative addressing
 E. Pseudo direct Addressing
 Ans:E