Understanding PCB assembly using simulation with DOE approach To assess the feasibility of process flow logic and relative impact of changing line configurations It is aimed to identify constraints or bottlenecks and development of improvement strategies accordingly By using DOE, the factors that are affecting the system’s efficiency are identified Finally to improve the system’s overall performance

1. A Presentation on
PRINTED CIRCUIT BOARD
ASSEMBLY
KIRAN HANJAR
1

2. Aim of the Presentation
• Understanding PCB assembly using simulation with
DOE approach
• To assess the feasibility of process flow logic and
relative impact of changing line configurations
• It is aimed to identify constraints or bottlenecks and
development of improvement strategies accordingly
• By using DOE, the factors that are affecting the system’s
efficiency are identified
• Finally to improve the system’s overall performance
2

3. Introduction
Printed circuit board (PCB) assembly
•Printed circuit board (PCB) assembly lines fall under the general
category of serial production lines
•Common problems faced in these lines include designing
configuration of existing or future lines to meet target production
rates
•Simulation modeling can capture the complex behaviour and
interaction between various components of PCB assembly lines
•This is very much important to analyze and help to make better
decisions
3

4. Introduction
Printed Circuit Board Manufacturing
•PCB can be classified into two categories based on the type
of components placed on the board
– Surface Mount Technology (SMT)
– Insertion Mount Technology (IMT)
Six steps involved in SMT manufacturing are explained as
follows:
• Attachment Media Dispensing
•Component Placement
•Curing
•Soldering
•Cleaning
•Testing
4

5. General steps involved in SMT process for PCB
assembly
SOLDER
PASTE
APPLICATION
INVERT
BOARD
REFLOW
OVEN
COMPONENT
PLACEMENT
YES
OTHER
SIDE
NEEDED
SMC’s
NO
TEST
CLEAN
PASS?
NO
REPAIR
YES
SHIP
FINISHED
Source: (Hollomon,
BOARD
5
1989) and (Capillo,

6. With the help of Cause and Effect Diagram factors which are affecting
throughput are identified
PERSONNEL
MATERIALS
Paste Type
Handling
Rework
Components
Board
Setup
THROUGHPUT
In-Circuit Testing
TESTING
Board
Functional
Testing
Screen
Printing
Component
Placing
MACHINE
Cause and Effect Diagram for PCB assembly line
Generally in PCBA solder paste, Component placement, ICT, BFT ,
Rework creates variability in process time
6

7. DOE
• Systematic Plan of investigation using principles of statistics
wherein response or output value is obtained by varying factors/
levels or a combination of factor level
• 5 factors , 2 levels (high and low) are considered , 25 full factorial
design is made to anlayse the model
PARAMETERS
SOLDER PASTE
COMPONENT PLACING
ICT
BFT
REPAIR
FACTOR LEVEL
( LOW )
5
7
5
15
5
FACTOR LEVEL
(HIGH)
7
12
15
40
20
C.V for low level and high level are 0.1 and 0.4 respectively
7

8. Simulation Modeling and Analysis
The steps involved in a simulation
•Input analysis: involves collection and analysis of data, and
definition as well as validation of conceptual model
•Model development: involves simulation model development
followed by verification and validation of the simulation model
•Output analysis: where performance metrics of the system are
determined and analysed
Some of the advantages of simulation are:
•Simulation offers better control over experimental conditions
•Animation provided by simulation enables better understanding of
the system
•Alternative proposed system configurations can be compared
using simulation
8

9. Model Building
It involves six steps as shown in the figure
Collect i/p
data
Develop static
model
Validate
simulation
model
Run current
configuration
Yes
Analyse the
system
Potential
improvements
Modify
configuratio
n
No
Stop
Source :(Mukkamala, Smith & Valenzuela, 2003)
9

10. Step 1 : Collect input data
This data may be extracted from historical databases of the line
under consideration (if the manufacturing line already exists) or
a similar line (if line is non-existent, i.e. proposed).
•Machine Data
•Operator data
•Inspection and rework data
•Oven data
•Buffer data
•Conveyor data
•Traverser/shuttle data
For a PCB that has to get shipped it has to start from Solder paste
assembly then to component placement, Reflow oven, Pin through
holes, Wave soldering, In-circuit testing, Final mechanical assembly,
Board functional testing, Repair if any and finally to packing.
10

11. Reflow Oven
Cooling
Solder paste
Assembly
Component
placing
Yes
PTH
Wave Soldering
ICT
No
Final
Mechanical
assembly
Repair
Yes
BFT
Ship
No
Disassemble
The simulation model of Printed Board
Circuit Assembly
Rework
11

12. Process carried out in each Section
Solder Paste Assembly
•In PCBA the paste printing process accounts for the majority of
assembly defects
•Over sixty percent of all soldering defects are due to problems
associated with the screening process
•Parameters such as squeegee pressure, squeegee speed, stencil
separation speed, snap-off and stencil cleaning interval are the most
important factors in the process to achieve a better yield
•The set up time taken is around five to seven minutes, two minutes
is required to paste on stencil to get completed, Board printing
takes one minute and visual inspection takes around two minutes
and vary depending on the complexity of the board
• So the time taken for the entire process is around six minutes
12

13. Component Placing
• In the pick & place station, only one components is taken
from the component feeder by means of a vacuum pipette,
and is placed on the PCB
• Based on the complexity of the PCB the process time varies
between seven and twelve minutes
13

14. Reflow oven
• A reflow oven is a machine used primarily for reflow
soldering of surface mount electronic components to printed
circuit boards
• The oven contains multiple zones, which can be individually
controlled for temperature
• The PCB moves through the oven on a conveyor and is therefore
subjected to a controlled time-temperature profile
• Some ovens are designed to reflow PCBs in an oxygen-free
atmosphere. Nitrogen (N2) is a common gas used for this purpose.
This minimizes oxidation of the surfaces to be soldered
14

15. In-Circuit Test (ICT)
•
Here, checking for shorts, opens,
resistance, capacitance, and other
basic quantities which will show
whether the assembly was correctly
fabricated
• It may be performed with a bed of
nails type test fixture and specialist
test equipment
• Based on the design of the circuit
and complexity it takes around five
to fifteen minutes to undergo this
process
Industrial printed circuit board being tested with a
modern digital oscilloscope an oscilloscope
15

16. Board Functional Test (BFT)
• Functional test (FCT) is used as a final manufacturing step
providing a pass/fail determination on finished PCBs before they
are shipped
• To validate that product hardware is free of defects that could,
otherwise, adversely affect the product’s correct functioning in a
system application
• Requirements of a functional test, its development, and procedures
vary widely from PCB to PCB and system to system
• The most common form of functional test, known as “hot mock-up”
simply verifies that the PCB is functioning properly
• Generally time taken to undergo functional test is between fifteen
and forty minutes
16

17. Step 2 : Develop Static Model of the
Process Line
• Based on the input data collected, a static model is prepared for
the validation and benchmarking of the simulation model
• Static model is a spreadsheet based model developed using the
mean values of cycle times, utilization time and failure
• Then, the throughput which is the least among all the machines or
processes is identified as the throughput of the whole line
In doing so, these things are should be ignored:
• The inherent interdependence between the processes (induced by
the capacitated buffers).
• The variability (induced by the unpredictable breakdowns and
component part exhaustions)
17

18. Input Datasheet
Sl no
Process
Time distribution in min
1
Solder paste assembly
NORM (6. 1.2)
2
Component placement
BETA (12, 7)
3
Reflow oven
NORM ( 4, 0.1)
4
Cooling
NORM (1, .05)
5
Pin through hole
NORM ( 4 , 0.5)
6
Wave Soldering
NORM ( 3.5, 0.5)
7
ICT
BETA ( 15, 5)
8
Repair(ICT)
BETA ( 20, 5)
9
Final mechanical assembly
NORM ( 4, 0.5)
10
BFT
BETA ( 40, 15)
11
Disassemble
NORM ( 2, .05)
12
Rework (BFT)
BETA (20, 5)
By using Arena software PCB Assembly line is built and respected
inputs are tabulated at every section and Run simulation. From the
result obtained analysis is done
18

19. Run Current Configuration
Arriv e
Arrive 1
Serv er
Serv er
Serv er 1
Serv er
Server 2
Server 3
?
In s p ec t
Inspect 1
Serv er
Serv er
Serv er
Serv er 6
Server 5
Server 4
?
Serv er
In s p ec t
Server 8
Inspect 2
Dep a rt
Depart 1
Serv er
Serv er
Server 9
Server 7
Si m u la te
PCb assembly
500
It took 252 min to complete the assembly process for a batch of 10 PCB
Serv er
Serv er 10
19

20. Analysing the variability using DOE
• To understand the behaviour of the system to a next level the factors
(process) that are creating the variables are identified
• For the current model five factors are taken into account they are:
– Solder paste assembly
– Component Placing
– ICT
– BFT and
– Rework
• By taking low level and high level concentration 25 factorial design is
made
• To eliminate the bias randomization is done as shown in the following
table
• In the table below : A- Solder paste assembly process time, Bcomponent Placement process time, C – ICT Processing time, D- BFT
Processing time, E- time taken to repair, I- process time taken for ten
20
batches.

21. The simulation model is run accordingly to the random number assigned to the
order number and the obtained results are analysed using MINITAB software 21

22. Main Effects Plots
From the Main Effects plot for Time , Factor D i.e., Board
Functional Test is one which is causing delay in process time
than the other factors
22

23. Estimated Effects and Coefficients for
TIME(min) (coded units)
23

24. Analysis of Variance for TIME(min)
(coded units)
Source
Main Effects
2-Way Interactions
3-Way Interactions
4-Way Interactions
5-Way Interactions
Residual Error
Total
DF
5
10
10
5
1
0
31
Seq SS
688160
2496
746
187
55
*
691644
Adj SS
688160
2496
746
187
55
*
Adj MS
137632
250
75
37
55
*
F P
* *
* *
* *
* *
* *
• From the Main effects plots and ANOVA table it is found that BFT
plays a significant role in process. Simulation showed that the
Bottleneck created in this section and there were queue of PCB
that has to wait.
• In order to improve the system it is better to provide a one more
BFT section (parallel).
24

25. Conclusion
•
•
•
•
•
•
These topics help us to know the problem of simulation modeling and analysis of
PCB assembly lines
This is an important problem as line managers and decision makers of PCB
assembly lines often face situations like designing configuration of entire line for
new product etc, by using simulation concepts and software one can take a
quantitative decisions but it is left to the line managers ability and experience to
take the qualitative decisions
By the help of Simulation one can understand visualise some more things such as
buffer, bottleneck etc.
By using Design of experiments, the factors that are affecting the model flow and
also provide valid information whether to add a new line in the production to
meet the demand or remove the parallel lines if the demands are not so good,
without affecting the actual flow line.
As in this case it clearly stated there is need for adding another line for BFT
section in order to avoid blocking, bottlenecks etc.
Hence with help of quantitative results and qualitative aspects optimal solution for
any kind of problems can be found out
25

26. References
•
•
•
•
•
•
•
•
•
•
•
•
•
Law, A. M. and Kelton, D. W. (2000). Simulation Modeling and Analysis. McGraw-Hill Companies, Inc.
Papadopoulos, H.T. and Heavy, C. (1996). Queuing theory in manufacturing systems analysis and design: a
classification of models of production and transfer lines. European Journal of Operations Research,92, 1-27.
Heavy, C., Papadopoulos, H.T., and Browne, J. (1993). The throughput rate of multistation unreliable production
lines.European Journal of Operational Research68(1), 69-89.
Hollomon, James K. Jr. (1989). Surface mount technology for PC board design.Indianapolis: Howard W. Sams &
Company.
Goss, G.B. (2000). Measuring machine interference to evaluate an operator cross-training program. M.S. thesis.
Massachusetts, MA: Massachusetts Institute of Technology.
D’Souza, R.C. (2004) A throughput-based technique for identifying production system bottlenecks. M.S. thesis.
Mississippi, MI: Mississippi State University.
Capillo, C. (1990). Surface Mount Technology: materials, processes, and equipment. McGraw-Hill Publishing
Company.
Kamath, M. (1999). Recent development in modeling and performance analysis tools for manufacturing systems. In:
S. B. Joshi and J. S. Smith, Computer Control of Flexible Manufacturing Systems, (pp.231-263). Chapman and Hall.
Law, A.M. and McComas, M.G. (1997). Simulation of manufacturing systems. Proc. of 1997 Winter Simulation Conf.,
86-89
Kotcher, R.C. (2001). How “overstaffing” atbottleneck machines can unleash extra capacity. Proc. of the 2001 Winter
Simulation Conference, 1163-1169.
Conway, R., Maxwell, M., McClain, J.O., and Thomas, J.L. (1988). The role of work-in process inventory in serial
production lines. Operations Research,36(2), 229-241.
Simulation modeling and analysis of printed circuit board assembly lines: Pradip Dinkarrao Jadhav
Design and Analysis of Experiments. 5th edition, Douglas C.Montgomery, Wiley student edition .
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27. Thank you
Kiran Hanjar S
1MS12MIA03
II Sem, IE M.TECH
MSRIT
27