Personal Information
Organization / Workplace
Zagazig Egypt
Occupation
Physical Design Engineer
Industry
Electronics / Computer Hardware
Website
abdelazeem201.github.io/
About
Welcome to my home page
I am an extremely motivated Physical Design Engineer with interests in the field of Digital IC Design and Computer Architecture. I am regularly trusted to deliver on the toughest designs because I enjoy finding new approaches and I do not give up!
Besides the cutting-edge technology and tools I work with every day, I believe the best thing is the people! I enjoy learning from experienced Engineers. My objective is simple, work with my team to deliver continued success, and to keep learning Physical Design!, and I have done projects in both FPGA and ASIC, details can be found in the project section of this page or on my GitHub
Tags
pnr
vlsi
asic
asic design
fpga
physical design
synopsys
digital ic design
cadence
synthesis
ic
electronics
dft
digital implantation
integrated circuits
digital implementation
sta
cadenece
formality
dft compiler
dc
sdc
eco
routing
cts
innovus
design compiler
modelsim
vcs
vhdl
verilog
rtl
simulation
placement
signoff
timing analysis
floorplanning
vlsi design
soc design
powerplanning
chip design
ir
electromigration
emir
crosstalk
See more
Presentations
(17)Documents
(1)Personal Information
Organization / Workplace
Zagazig Egypt
Occupation
Physical Design Engineer
Industry
Electronics / Computer Hardware
Website
abdelazeem201.github.io/
About
Welcome to my home page
I am an extremely motivated Physical Design Engineer with interests in the field of Digital IC Design and Computer Architecture. I am regularly trusted to deliver on the toughest designs because I enjoy finding new approaches and I do not give up!
Besides the cutting-edge technology and tools I work with every day, I believe the best thing is the people! I enjoy learning from experienced Engineers. My objective is simple, work with my team to deliver continued success, and to keep learning Physical Design!, and I have done projects in both FPGA and ASIC, details can be found in the project section of this page or on my GitHub
Tags
pnr
vlsi
asic
asic design
fpga
physical design
synopsys
digital ic design
cadence
synthesis
ic
electronics
dft
digital implantation
integrated circuits
digital implementation
sta
cadenece
formality
dft compiler
dc
sdc
eco
routing
cts
innovus
design compiler
modelsim
vcs
vhdl
verilog
rtl
simulation
placement
signoff
timing analysis
floorplanning
vlsi design
soc design
powerplanning
chip design
ir
electromigration
emir
crosstalk
See more