1. High Speed Transaction-basedHW-SW Coverification Laureano Felipe Carrasco Costilla May 4, 2011

2. Traditional Emulator Deployment:In-Circuit Emulation (ICE) process(clk) Begin if rising_edge(clk) then Q <= not Q; end if; end process; The emulator, connected to a physical target system in place of a yet-to-be-built chip, either drives the target system or is driven by the target system The RTL design is compiled in a workstation into a binary object Emulator Cables PCIe Interface Target System The design binary is downloaded into the emulator

3. ICE: Pros and Cons

4. Traditional Emulator Deployment:Cycle-based coverification Cycle-Based Test Bench Communication Overhead Emulated DUT process(clk) Begin if rising_edge(clk) then Q <= not Q; end if; end process; Time The RTL design is compiled in a workstation into a binary object Emulator PCIe Interface The design binary is downloaded into the emulator The emulator is driven by the cycle-based Verilog/VHDL/C/C++ testbench

5. Cycle-based coverification pros/cons

7. Test bench and DUT can run in parallel and transactions can be queued

8. The speed improvement over cycle-based can be orders of magnitude faster reaching tens of MHzCycle-Based Test Bench Communication Overhead Emulated DUT Time Transaction-Based Test Bench Communication Overhead Emulated DUT Time

11. Not compute intensiveHDL Simulator Emulator PC Transactor HDL DUT HDL Testbench C++/SC/SV Testbench TX Back-end Verilog BFM Model Cycle-Level Communication Front-end C++/SC/SV Model RX Hi-level Commands Bit-level Protocol

12. DUT pixel_clk Video Processor C++ Testbench Frame Generator Video_In Transactor v_sync h_sync pixel Example: Video-in transactor Emulator Verilog Testbench Frame Generator Video Frame ONE FRAME pixel_clk v_sync h_sync pixel 1st row pixels 2nd row pixels Nth row pixels

13. Natural integration withVirtual Platforms System-on-Chip CPU(s) Peripheral InstructionSet Simulator Peripheral Memory Control Memory TLM Bus RTL Device SystemI/O SystemI/O Device Emulator ESL Virtual Platform Cycle/Bit Accurate RTL Transaction Level TLM 2.0 Transactor

15. Function-based interface (Limited subset of the SystemVerilog DPI)

16. SystemVerilog compatible, transactors can be simulated

17. Only functions are allowed (no import/export tasks), each function call is a transaction

18. Pipe-base interface (fixed functions)

19. Transactions go through unidirectional pipes

20. Data is not guaranteed to be available to the consumer immediately

21. User has to map data to messages and insure response

23. No DPI-based streaming or parallel communication

26. The virtual memory:Memory32.cc #include "Memory32.hh" #include <stdio.h> #include <string.h> Memory32::Memory32(unsigned int depth) { _memArray = new unsigned int [depth]; memset(_memArray, 0, depth*sizeof(unsigned int)); } Memory32::~Memory32() { delete [] _memArray; } unsigned int Memory32::read(constunsigned intaddr) { return _memArray[addr]; } void Memory32::write(constunsigned intaddr, constunsigned intdin) { _memArray[addr] = din; }

27. The transactor’s front-end: mem_xtor.cc #include <stdlib.h> #include <stdio.h> #include <mem_xtor.h> #include "Memory32.hh" extern "C" void readData(constsvBitVecValaddr[1], svBitVecValdout[1]) { svScope s = svGetScope(); Memory32 *mem = (Memory32 *)(svGetUserData(s, (void *)(readData))); dout[0] = mem->read(addr[0]); printf("# Read Data addr=%d, dout=%x", addr[0], dout[0]); } extern "C" void writeData(constsvBitVecValaddr[1], constsvBitVecVal din[1]) { printf("# Write Data addr=%d, din=%x", addr[0], din[0]); svScope s = svGetScope(); Memory32 *mem = (Memory32 *)(svGetUserData(s, (void *)(writeData))); mem->write(addr[0], din[0]); } … … extern "C" void initialize() { printf("# Initializing SW part of the transactor"); svScope s = svGetScope(); Memory32 *newMem = new Memory32(MEM_DEPTH); svPutUserData(s, (void *)(read), (void *)(newMem)); svPutUserData(s, (void *)(write), (void *)(newMem)); printf("# Init done"); }

28. The transactor’s back-end module mem_xtor(input clk, input [15:0] addr, input [31:0] din, input ce, input we, input re, output reg [31:0] dout) import "DPI-C" context function void readData(input bit [15:0] addr, output bit [31:0] dout); import "DPI-C" context function void writeData(input bit [15:0] addr, input bit [31:0] din); import "DPI-C" context function void initialize(); initial begin dout = 0; initialize(); end always @(posedgeclk) begin if (we) begin writeData(addr, din); if (re) dout = din; end else if (re) readData(addr, dout); end endmodule

29. Not all has to be written! Very rich and increasing portfolio of transactors and verification IP

30. Using a transactor …i2c_driver i2c_xtor(.sda(sda1),.scl(scl1),.sda_oe(sda_oe1),.scl_oe(scl_oe1));defparami2c_xtor1.cclock="i2c_clk";defparami2c_xtor1.debug = "yes";… Design Verification Environment Xtor Doc int main (intargc, char *argv[]) {Board* board = 0; I2c* i2c_interface = 0; ... try { board = Board::open(ZWORK);fflush(stdout);fflush(stderr); ... i2c_interface = new I2c; ...while(!i2c_interface->runBFM(RunUntilTrnSent));... Testbench.cc

31. Case study: ICE wireless platform Emulator @ few hundreds of kHz DUT DDR Memory Interface Flash Memory Interface NTSC TV Interface Frame Grabber ARM11 Core LCD Display Interface Frame Grabber Terminal Interface DSP Core Digital Still Camera Interface Frame Capture Logic Keypad Interface USB 2.0 Interface HW Bridge Memory Ethernet Ethernet10/100 Interface HW Bridge I2S Audio Interface HW CODEC JTAG Interface Lauterbach Pod

32. Case study: transaction-based EVE’s ZeBu emulator @ 5MHz PC – Software Test Environment Display Window Display Window RTB DUT DDR Memory Interface Synthesizable DDR Memory Flash Memory Interface Synthesizable Flash Memory NTSC XTOR NTSC TV Interface ARM11 Core LCD Display Interface LCD XTOR Terminal Interface Terminal XTOR DSP Core Image Files Digital Still Camera Interface DSC XTOR Logic Keypad Interface Keypad XTOR HDD C Model USB 2.0 Interface USB Function XTOR Memory Ethernet Ethernet 10/100 Interface Ethernet XTOR Bridge NIC Card I2S Audio Interface I2S XTOR SW CODEC JTAG Interface JTAG XTOR

33. SW Debug TV - Display Terminal - UART Main TSC2101 - SPI Battery Gauge - HDQ LCD - Display RTC – I2C GPIO GPIO Expander Keypad - GPIO Case study: PC sample display TCM8002MD – CCP Camera

34. Case study: results Able to boot Symbian OS in 45 seconds Allowed starting of early software development and HW/SW coverification

35. Transaction based coverification Verification IP, ZEMI-3 & ESL Tools

36. Thank you!