Systemc overview 2010


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SystemC Overview : Simple Example "Hello world" and something knowledge

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Systemc overview 2010

  1. 1. SystemC Overview 林敬倫, 蘇文鈺 成大資訊 2010
  2. 2. Architecture • C++ and STL – – – – – – – – SystemC Simulation Kernel Thread and Method TLM 2.0 Lib AMS (Not Stable yet) Event and Sensitivity Channel and Interface Modules Data Type • Predefined Channels: Mutex, FIFO and Signals – IP – User Lib
  3. 3. Environment • SystemC as a C++ class library, you need – SystemC Library: can be downloaded at: • – C++ Compiler: GNU C++, Sun C++,… – O.S.: Solaris, Linux, UNIX, Windows – Compiler command sequence, makefile, or others similar – GUI (Option available in tools like CoWare and OpenESL)
  4. 4. Simple Example: Hello world • Program規格如下 – 用SC_Method – Clock=10 ns – 每個clock印一下”Hello World”以及現在的時間 – 跑100 cycles – 可用一般command line的方式compile – 可用makefile – 執行的過程與結果
  5. 5. Hello World程式專案說明 • 其中包含三個檔案main.cpp, hello_module.h hello_module.cpp • 可將main.cpp視同電路板,我們可以在上面 做接線等等的動作。 • hello_module可以被視為是一個具有process 功能的硬體元件。
  6. 6. Main.cpp 將所需元件的.h檔和systemC.h引入 Sc_main是systemC程式的進入點 宣告一組clk的訊號 週期為10ns 宣告一組hello_module的元件 將clk接上module的clk訊號上 開始進行模擬 模擬1000ns內的硬體 運作
  7. 7. Hello_module.h 宣告一組元件定義hello_module 宣告hello_module的訊號線clk 宣告hello_module的運作函式 hello_module的建構子 整組元件具有process(method) process執行的函式Method_func Process會經由clk正緣觸發
  8. 8. Hello_module.cpp 運作函式本體 訊號有產生改變才執行 印出模擬時間 印出hello word!
  9. 9. 執行結果
  10. 10. Component • A HW system is usually divided into several separate components. • Normally, components work independently until communication is needed among components. • Components can work synchronously or asynchronously • In HW design, certain hierarchy built from components is required. • Similar development methodology can be found in CBSD (Component Based Software Development). • In SystemC, components are usually called modules.
  11. 11. Wikipedia says: • CBSD is a branch of software engineering, the priority of which is the separation of concerns in respect of the wide-ranging functionality available throughout a given software system. Components are considered to be part of the starting platform for service orientation throughout software engineering, for example Web Services, and more recently, Service-Oriented Architecture (SOA) - whereby a component is converted into a service and subsequently inherits further characteristics beyond that of an ordinary component. • With regards to system-wide co-ordination, components communicate with each other via interfaces. When a component offers services to the rest of the system, it adopts a provided interface which specifies the services that can be utilized by other components and how.
  12. 12. DataFlow • CBSD is often incorporated with dataflow model. • 顧名思義: 元件之間所需與所產出的資料是 用類似資料流的方式傳遞 • 而彼此之間也經常靠資料流在同步其動作
  13. 13. Wikipedia says: • Dataflow is a software architecture based on the idea that changing the value of a variable should automatically force recalculation of the values of other variables. • SO, how to use dataflow in programming? – Flow Based Programming.
  14. 14. Wikipedia says: • • • • flow-based programming (FBP) is a programming paradigm that defines applications as networks of "black box" processes, which exchange data across predefined connections by message passing. These black box processes can be reconnected endlessly to form different applications without having to be changed internally. FBP is thus naturally component-oriented. The FBP development approach views an application not as a single, sequential, process, which starts at a point in time, and then does one thing at a time until it is finished, but as a network of asynchronous processes communicating by means of streams of structured data chunks, called "information packets" (IPs). In this view, the focus is on the application data and the transformations applied to it to produce the desired outputs. The network is defined externally to the processes, as a list of connections which is interpreted by a piece of software, usually called the "scheduler". The processes communicate by means of fixed-capacity connections. A connection is attached to a process by means of a port, which has a name agreed upon between the process code and the network definition. More than one process can execute the same piece of code. At any point in time, a given IP can only be "owned" by a single process, or be in transit between two processes. Ports may either be simple, or array-type, as used e.g. for the input port of the Collate component described below. It is the combination of ports with asynchronous processes that allows many longrunning primitive functions of data processing, such as Sort, Merge, Summarize, etc., to be supported in the form of software black boxes. The network definition is usually diagrammatic, and is converted into a connection list in some lower-level language or notation. FBP is thus a visual programming language at this level. More complex network definitions have a hierarchical structure, being built up from subnets with "sticky" connections.
  15. 15. 字太多, 看圖說故事比較快
  16. 16. How components are implemented in SystemC? • SC_Module: registered in SystemC simulation kernel • Elaboration – Thread: SC_THREAD or SC_CTHREAD(now seldom used, but may be useful for synthesizable SystemC syntax) – Method: SC_Method
  17. 17. SC_METHOD • A simple member function of SC_MODULE class. • No arguments and no return values • During simulation, SystemC simulation kernel calls it repeatedly. • It is also concurrently executed (in concept or in user’s point of view).
  18. 18. SC_THREAD • It can suspend itself. So, it allows time to pass by. • Hence, when SC_THREAD is executed one time, SC_METHOD may have been executed several times. • Conceptually, it is like a software thread, but not exactly because of the nature of the current simulation kernel. We will touch this later when we introduce the mechanism of this simulation kernel. • SC_CTHREAD is a SC_THREAD requiring the sensitivity with respect to a clock signal. That is why it may be considered as synthesizable syntax.
  19. 19. Concurrency and Synchronization Mechanisms • Since all modules have to be executed concurrently in user’s point of view, mechanisms have to be built to maintain the consistency of concurrent execution. • Events and Notification are applied. • Event is implemented by sc_event class. notify, which is a member function of sc_event, can be used. • A module is invoked through the sensitivity to certain events. For example, sensitive to a clock event or a bus event. • In SystemC, Static and Dynamic of event sensitivity implementations are available.
  20. 20. Communication • Like all dataflow or CB programming models, communication among modules is important. • Unlike Verilog, SystemC separates the implementation mechanisms of computation and communication. That is, modules are mainly for computation. Communication is done through provided interface and channel. • Channel is used to interconnect modules. • Port is used to connect channel to module. • Interface can be used when implementing channels.
  21. 21. System Component Modules Channels Ports Interface Only Port plus Interface Events Threads&Methods Ports
  22. 22. Hierarchical Structure • A component may contain several modules and the component is itself a module. • A component contains intra-communication mechanisms such as ports interfaces, and channels. • A component also contains ports for intercommunication, which will be connected to some channels. • Events are contained for synchronization and execution. • Computation part is realized in internal modules.
  23. 23. Spec. of Example program • 規格: – 系統有兩個modules, 每一個module 又包含兩個 modules, 利用clock來做event – 主要的兩個modules的工作只是互相交換資料, 簡單 運算後再傳回給對方 – 主要模組中的內部兩個模組又分成運算與存檔的工 作. – 主要的兩個modules用簡單的bus連接,內部兩個模 組用簡單的channel連接 – 用SC_METHOD與SC_THREAD來實現之, 也就是一個 module用SC_METHOD, 另外一個module用 SC_THREAD
  24. 24. Example Program Abstract • Thread module內有兩組sub module為save module及alu module – save module 用於將thread module現存的費氏數列 兩個數字存入檔案中 – alu module 利用已存費氏數列數字計算下兩組數字 • 兩組thread module 透過bus連接將計算好的下 兩位數字透過bus傳給另一組thread module使 整份檔案輸出一組完整的費氏數列並標註寫入 檔案的module
  25. 25. Data(1,1) save process alu Thread module0 Write port Write port BUS Write port Write port CLK save process alu Thread module
  26. 26. Data(1,1) save process Data(2,3) alu Thread module0 Write port Write port BUS Write port Write port CLK save process alu Thread module
  27. 27. save process alu Thread module0 Write port Write port Data(2,3) BUS Write port Write port CLK save process alu Thread module
  28. 28. save process alu Thread module0 Write port Write port BUS Write port CLK save Data(2,3) process Write port alu Thread module
  29. 29. save process alu Thread module0 Write port Write port BUS Write port Write port CLK save Data(2,3) process alu Thread module
  30. 30. save process alu Thread module0 Write port Write port BUS Write port Write port CLK save process Data(2,3) alu Data(5,8) Thread module
  31. 31. save process alu Thread module0 Write port Write port BUS Write port Write port Data(5,8) CLK save process alu Thread module
  32. 32. save process alu Thread module0 Write port Write port Data(5,8) BUS Write port Write port CLK save process alu Thread module
  33. 33. Data(5,8) save process alu Thread module0 Write port Write port BUS Write port Write port CLK save process alu Thread module
  34. 34. Main.cpp
  35. 35. Bus_if.h
  36. 36. Alu.h
  37. 37. Alu.cpp
  38. 38. Bus.h
  39. 39. Bus.cpp
  40. 40. Save.h
  41. 41. Save.cpp
  42. 42. Thread.h
  43. 43. Thread.h
  44. 44. Thread.cpp