A stepper motor is an electro mechanical device that can convert electrical pulses to the axis of movement. The finding problem in the movement of a stepper motor is cannot respond to the clock signal directly because the motor windings require a clock (sequence) in the correct order. If the control signal given is not correct, the motor is not moving according to the specified precision. To answer these problems, it is necessary to move the stepper motor with a clock signal that works in real time. The research method is done by designing and testing the stepper motor movement in full step and half step with the direction of Clock Wise (CW) and Counter Clock Wise (CCW) movement. These are simulated by using FPGA Isim and implementation using a stepper motor. The results of several experiments have been carried out the stepper motor movement degree according to the input value entered, responding timely movement, and the direction of movement stepper motor.
This document provides an overview of ladder logic fundamentals for a PLC controls and instrumentation course. It discusses the anatomy of a ladder program including input and output instructions, rungs, and power rails. It also covers logic functions like AND, OR, and XOR. Additionally, it explains logical continuity versus electrical continuity and examines input instructions like examine on and examine off. The document concludes with a discussion of I/O mapping and how input and output field devices connect to instructions in the PLC program.
The document discusses the basics of programmable logic controller (PLC) programming including PLC architecture, memory organization, programming languages, ladder logic instructions, addressing schemes, and programming techniques. Specifically, it covers the processor memory being divided into program and data memory, the ladder logic programming language using relay-type instructions like examine if closed and examine if open, addressing I/O locations by module and bit, and programming concepts such as parallel and nested rungs, internal control relays, and adjustments for different scan patterns.
This document provides an overview of microcontroller programming using C language for ATMEL and PIC microcontrollers. It discusses microcontroller architecture, including the central processing unit, memory, timers/counters, and interrupts. It then introduces the ATMEL 89C2051 microcontroller, describing its pin configuration, special purpose I/O, memory, and other features. The document outlines the structure of microcontroller C programming and provides sample programs to blink an LED. It also discusses configuring the hardware and software environment, compiling and burning programs to the microcontroller, and writing interrupt subroutines.
This document describes the AT89C51 microcontroller. It includes a pinout diagram and descriptions of the pins including power, ground, ports 0-3, reset, ALE/PROG, PSEN, EA/VPP, oscillator pins, and alternate functions of port 3 pins. It provides a block diagram of the architecture and describes features like 4K bytes of flash memory, 128 bytes of RAM, timers, interrupts, serial port, and power saving idle and power down modes.
Programmable Logic Controller and ladder logic programmingseema Vishwakarma
This document provides an introduction to programmable logic controllers (PLCs) and ladder logic programming. It defines a PLC as a small computer used to automate industrial processes by monitoring inputs and making decisions to control outputs based on a stored program. The document outlines the basic components of a PLC including input and output modules and the central processing unit. It then introduces ladder logic as the most common programming language for PLCs, describing the basic symbols of ladder diagrams including contacts, coils, and rungs. Finally, it provides examples of ladder logic programs for AND, OR, and NOT logic operations as well as timers and counters.
Intel 8080 8085 assembly language programming 1977 intelOmar Alkinani
The document describes what an assembler is and what it does, including translating assembly language source code into executable object code, and generating listings of the source code, object code, and symbol table. It also provides an overview of the 8080/8085 microprocessors and their memory, registers, instruction set, and addressing modes to help programmers understand the processors they are writing code for.
Design of FPGA based 8-bit RISC Controller IP core using VHDLAneesh Raveendran
This paper describes the design, development and
implementation of an 8-bit RISC controller IP core. The
controller has been designed using Very high speed integrated circuit Hardware Description Language (VHDL). The design constraints are speed, power and area. This controller is efficient for specific applications and suitable for small applications. This non-pipelined controller has four units: - Fetch, Decode, Execute and a stage control unit. It has an in built program and data memory. Also it has four ports for communicating with other I/O devices. A hierarchical approach has been used so that basic units can be modeled using behavioral programming. The basic
units are combined using structural programming. The design
has been implemented using ALTERA STRATIX II FPGA
This document provides an overview of ladder logic fundamentals for a PLC controls and instrumentation course. It discusses the anatomy of a ladder program including input and output instructions, rungs, and power rails. It also covers logic functions like AND, OR, and XOR. Additionally, it explains logical continuity versus electrical continuity and examines input instructions like examine on and examine off. The document concludes with a discussion of I/O mapping and how input and output field devices connect to instructions in the PLC program.
The document discusses the basics of programmable logic controller (PLC) programming including PLC architecture, memory organization, programming languages, ladder logic instructions, addressing schemes, and programming techniques. Specifically, it covers the processor memory being divided into program and data memory, the ladder logic programming language using relay-type instructions like examine if closed and examine if open, addressing I/O locations by module and bit, and programming concepts such as parallel and nested rungs, internal control relays, and adjustments for different scan patterns.
This document provides an overview of microcontroller programming using C language for ATMEL and PIC microcontrollers. It discusses microcontroller architecture, including the central processing unit, memory, timers/counters, and interrupts. It then introduces the ATMEL 89C2051 microcontroller, describing its pin configuration, special purpose I/O, memory, and other features. The document outlines the structure of microcontroller C programming and provides sample programs to blink an LED. It also discusses configuring the hardware and software environment, compiling and burning programs to the microcontroller, and writing interrupt subroutines.
This document describes the AT89C51 microcontroller. It includes a pinout diagram and descriptions of the pins including power, ground, ports 0-3, reset, ALE/PROG, PSEN, EA/VPP, oscillator pins, and alternate functions of port 3 pins. It provides a block diagram of the architecture and describes features like 4K bytes of flash memory, 128 bytes of RAM, timers, interrupts, serial port, and power saving idle and power down modes.
Programmable Logic Controller and ladder logic programmingseema Vishwakarma
This document provides an introduction to programmable logic controllers (PLCs) and ladder logic programming. It defines a PLC as a small computer used to automate industrial processes by monitoring inputs and making decisions to control outputs based on a stored program. The document outlines the basic components of a PLC including input and output modules and the central processing unit. It then introduces ladder logic as the most common programming language for PLCs, describing the basic symbols of ladder diagrams including contacts, coils, and rungs. Finally, it provides examples of ladder logic programs for AND, OR, and NOT logic operations as well as timers and counters.
Intel 8080 8085 assembly language programming 1977 intelOmar Alkinani
The document describes what an assembler is and what it does, including translating assembly language source code into executable object code, and generating listings of the source code, object code, and symbol table. It also provides an overview of the 8080/8085 microprocessors and their memory, registers, instruction set, and addressing modes to help programmers understand the processors they are writing code for.
Design of FPGA based 8-bit RISC Controller IP core using VHDLAneesh Raveendran
This paper describes the design, development and
implementation of an 8-bit RISC controller IP core. The
controller has been designed using Very high speed integrated circuit Hardware Description Language (VHDL). The design constraints are speed, power and area. This controller is efficient for specific applications and suitable for small applications. This non-pipelined controller has four units: - Fetch, Decode, Execute and a stage control unit. It has an in built program and data memory. Also it has four ports for communicating with other I/O devices. A hierarchical approach has been used so that basic units can be modeled using behavioral programming. The basic
units are combined using structural programming. The design
has been implemented using ALTERA STRATIX II FPGA
Design and Implementation of Pipelined 8-Bit RISC Processor using Verilog HDL...IRJET Journal
This document describes the design and implementation of an 8-bit pipelined RISC processor using Verilog HDL on an FPGA. The key aspects are:
1. The processor uses a Harvard architecture with separate instruction and data memories.
2. Pipelining is used to improve performance such that one instruction can be executed per clock cycle.
3. The processor has a 24-instruction set and includes registers, an ALU, I/O ports, and prioritized interrupts.
4. The processor code was synthesized on a Spartan 3E FPGA starter board for testing.
The document discusses the 8051 microcontroller. It describes the basic components of the 8051 including 4K bytes of internal ROM, 128 bytes of internal RAM, four 8-bit I/O ports, two 16-bit timers/counters, and one serial interface. It provides a block diagram of the 8051 and discusses important pins such as the I/O ports, PSEN, ALE, EA, RXD, TXD, and XTAL1 and XTAL2. It also gives examples of how the 8051 is used in embedded systems and describes methods for connecting an external clock source to the 8051.
The document provides an overview of programmable logic controllers (PLCs). It defines PLCs as digital electronic devices that use programmable memory to implement logic functions like sequencing and timing to control machines and processes. The document discusses the basic structure of PLCs including the CPU, memory, input/output interfaces, and power supply. It also covers programming methods like ladder logic and instruction lists. Additional topics include input/output addressing, timers, counters, and techniques like latching, internal relays, and sequencing using timers.
This document outlines the objectives and content of a course on microprocessors and their applications. The course aims to introduce students to the architecture, programming, and interfacing of 8085 and 8086 microprocessors as well as 8051 microcontrollers. The five units cover the 8085 CPU and peripheral interfacing, 8086 CPU, 8051 microcontroller hardware and programming, and 8051 applications. Students will learn about microprocessor components, assembly language programming, timing diagrams, interrupts, memory interfacing, and interfacing with devices like serial ports, parallel ports, keyboards, displays, and sensors. Reference textbooks are provided for each topic.
The document discusses the history and features of the 8051 microcontroller family. It specifically focuses on the AT89S52 microcontroller, which was introduced by Atmel in the 1980s. Key points include:
- The AT89S52 has 8K bytes of Flash memory, 256 bytes of RAM, 32 I/O lines, timers, serial port, and interrupts. It is compatible with the 8051 instruction set.
- It operates from 0-33MHz and has various power saving modes. It has features like watchdog timer, dual data pointers, and ISP programming.
- The document discusses the advantages of using a microcontroller over a microprocessor for embedded applications in terms of cost, size
This document describes the architectural features and peripheral functions of the PIC16F873 microcontroller. It discusses the microcontroller core, which uses a Harvard architecture with separate program and data memory. It then describes the peripheral features including timers, I/O ports, serial communication interfaces, and analog-to-digital converter. Diagrams are included showing the memory map, pin configuration, and block diagrams of timers and serial communication modules. The document provides a detailed overview of the capabilities and operation of the PIC16F873 microcontroller.
This document outlines a training course on programmable logic controllers (PLCs) using the Siemens S7-1200 PLC and TIA Portal software. The course consists of 9 modules that cover topics such as PLC hardware components, programming basics, function blocks, timers and counters, math operations, diagnostics, closed-loop control, networking, and human-machine interfaces. The introduction module describes the major PLC components, relay ladder logic, and provides an overview of the S7-1200 PLC and TIA Portal software. The course objectives are to teach students how to program and configure the S7-1200 PLC to automate various industrial processes and systems.
A microcontroller is a computer system on a single chip that contains a processor core, memory, and programmable input/output peripherals. Microcontrollers are commonly used to control objects, processes, or events. They are often embedded in devices to control their functions. A microcontroller contains a CPU, RAM, ROM, flash memory, I/O ports, an ADC, and timers. Common microcontrollers include the Intel 8051, Atmel ATmega 16, and PIC microcontrollers. The microcontroller reads programmed instructions from flash memory and executes them via the CPU to control its I/O pins based on inputs.
The document discusses industrial robot applications and programming. It describes how robots are used for material handling, assembly, processing and inspection operations that are hazardous, repetitive or difficult for humans. It then covers various types of material handling applications including pick and place, palletizing, machine loading/unloading and stacking operations. The document also discusses robot programming methods, languages, accuracy, repeatability and resolution.
This document discusses jump instructions in PLC ladder logic. Jump instructions allow a PLC program to break its normal sequential execution and move to another part of the program. The key points covered are:
- Jump instructions work with label instructions to redirect program flow. The jump instruction moves execution to the rung with a matching label number.
- Jumps can move execution forward or backward within a program. Multiple jumps can target the same label. Jumps can also be nested within other jumps.
- Advantages of jumps include allowing a PLC to run multiple programs, jumping sections during faults to reduce downtime, and improving scan time performance.
- An example is provided demonstrating a parking lot control system
Three-phase ac motors have been the workhorse of industry since the earliest days of electrical engineering. They are reliable, efficient, cost-effective and need little or no maintenance. In addition, ac motors such as induction and reluctance motors need no electrical connection to the rotor, so can easily be made flameproof for use in hazardous environments such as in mines.
In order to provide proper speed control of an ac motor, it is necessary to supply the motor with a three phase supply of which both the voltage and the frequency can be varied. Such a supply will create a variable speed rotating field in the stator that will allow the rotor to rotate at the required speed with low slip. This ac motor drive can efficiently provide full torque from zero speed to full speed, can overspeed if necessary, and can, by changing phase rotation, easily provide bi-directional operation of the motor. A drive with these characteristics is known as a PWM (Pulse Width Modulated) motor drive.
Drives and motors are an integral part of industrial equipment from packaging,robotics, computer numerical control (CNC), machine tools, industrial pumps,and fans. Designing next-generation drive systems to lower operating costs requires complex control algorithms at very low latencies as well as a flexibleplatform to support changing needs and the ability to design multiple-axis systems.
Traditional drive systems based on ASICs, digital signal processors (DSPs), and microcontroller units lack the performance and flexibility to address these needs. Altera’s family of FPGAs provides a scalable platform that can be used to offload control algorithm elements in hardware. You may also integrate the whole drive system with industry-proven processor architectures while supporting multipletypes of encoders and industrial Ethernet protocols. This “drive on a chip” system reduces cost and simplifies development.
The document describes the internal architecture of the 89C52 microcontroller. It has the following on-chip facilities: 4k ROM, 128 byte RAM, one USRT, 32 I/O port lines, two 16-bit timers/counters, six interrupt sources, and an on-chip clock oscillator. Other family members have variations like 8k ROM, 256 byte RAM, and an extra timer/counter. The 89C52 architecture includes ports, memory, a CPU, and peripherals that allow it to interface with external devices.
The document describes a student thesis project to design and build a Programmable Logic Controller (PLC) using an FPGA and microcontroller. The project involves designing electrical circuits based on these components, creating a printed circuit board layout, and testing the functionality of the completed PLC board. The PLC contains a main board with an FPGA and microcontroller to run the core logic, and a separate power board to handle input/output functions and connect to external devices and systems. Schematics and circuit designs are provided for the various components and subsystems that make up the PLC.
The microcontroller is a one-chip solution that integrates CPU, RAM, ROM, and I/O ports onto a single chip. It is optimized for embedded applications where cost and space are critical compared to general-purpose microprocessors. The 8051 microcontroller contains 4 I/O ports, 128 bytes of RAM, 4k bytes of ROM, timers, and serial communication. It uses a quartz crystal oscillator or external TTL oscillator as its clock source and has pins for reset, external memory access, and address latching.
The document provides information on the 8051 microcontroller, including its architecture and key components. It discusses that the 8051 is an 8-bit microcontroller with 4KB of program memory, 128 bytes of RAM, two timers, five interrupt sources, and 32 I/O lines across four ports. The block diagram shows the 8051 has an 8-bit ALU, registers, program counter, stack pointer, and interfaces to memory and I/O. Key components include the accumulator, B register, R registers, program counter, and stack/stack pointer.
The 8051 microcontroller is a Harvard architecture microcontroller developed by Intel in 1980 for use in embedded systems. It has separate program and data memories, 4 I/O ports, two 16-bit timers, a serial port, and can address up to 64KB of external memory. The 8051 has become widely used due to its low cost and availability of development tools from multiple manufacturers. It has a simple but powerful instruction set that can be easily learned, making it well suited for embedded applications.
An embedded system is a special-purpose computer system designed to perform one or a few dedicated functions, often with real-time computing constraints. Embedded systems are present in many devices such as household appliances, vehicles, medical equipment, smartphones, and more. They typically use microcontrollers or microprocessors to monitor and control embedded hardware components. Key components of embedded systems include a CPU, memory, I/O ports, and timers/counters. Microcontrollers integrate most of these components onto a single chip, while microprocessors require external components. Embedded systems use various addressing modes and have inputs like interrupts and timers that allow them to interact with the external environment. Common applications areas of embedded systems include consumer electronics, industrial automation, automotive systems,
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K
bytes of in-system programmable Flash memory. The device is manufactured using
Atmel’s high-density nonvolatile memory technology and is compatible with the industry-
standard 80C51 instruction set and pinout. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.
By combining a versatile 8-bit CPU with in-system programmable Flash on
a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a
highly-flexible and cost-effective solution to many embedded control applications.
The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes
of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a
six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,
and clock circuitry. In addition, the AT89S52 is designed with static logic for operation
down to zero frequency and supports two software selectable power saving modes.
The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning. The Power-down mode saves the RAM contents
but freezes the oscillator, disabling all other chip functions until the next interrupt
or hardware reset
FPGA based synchronous multi-channel PWM generator for humanoid robot IJECEIAES
In this paper, synchronous multi-channel pulse width modulation (PWM) generator for driving servo motors of humanoid robot was proposed. In an application, the humanoid robot requires smooth and beautiful movement, therefore the PWM signal for each servo motor must be synchronized. Since microcontroller (slave) has no enough channels to generate synchronous PWMs for 32 servo motors, field programmable gate array (FPGA) was used as slave for the humanoid robot. The FPGA was controlled by microcontroller (master) using serial communication. Simulation results show the system can perform serial communication, synchronize, and convert data well. The system can also generate PWM simultaneously with accurate duty cycle and fix period of 20ms.
IRJET- To Design 16 bit Synchronous Microprocessor using VHDL on FPGAIRJET Journal
This document describes the design of a 16-bit synchronous microprocessor using VHDL and its implementation on an FPGA. It discusses the design of key components like the ALU, registers, control unit, memory etc. in VHDL. The individual components are simulated and tested separately before integrating them to build the full microprocessor design. Finally, the functionality of the integrated microprocessor design is validated through simulation using a VHDL simulator.
Design and Implementation of Pipelined 8-Bit RISC Processor using Verilog HDL...IRJET Journal
This document describes the design and implementation of an 8-bit pipelined RISC processor using Verilog HDL on an FPGA. The key aspects are:
1. The processor uses a Harvard architecture with separate instruction and data memories.
2. Pipelining is used to improve performance such that one instruction can be executed per clock cycle.
3. The processor has a 24-instruction set and includes registers, an ALU, I/O ports, and prioritized interrupts.
4. The processor code was synthesized on a Spartan 3E FPGA starter board for testing.
The document discusses the 8051 microcontroller. It describes the basic components of the 8051 including 4K bytes of internal ROM, 128 bytes of internal RAM, four 8-bit I/O ports, two 16-bit timers/counters, and one serial interface. It provides a block diagram of the 8051 and discusses important pins such as the I/O ports, PSEN, ALE, EA, RXD, TXD, and XTAL1 and XTAL2. It also gives examples of how the 8051 is used in embedded systems and describes methods for connecting an external clock source to the 8051.
The document provides an overview of programmable logic controllers (PLCs). It defines PLCs as digital electronic devices that use programmable memory to implement logic functions like sequencing and timing to control machines and processes. The document discusses the basic structure of PLCs including the CPU, memory, input/output interfaces, and power supply. It also covers programming methods like ladder logic and instruction lists. Additional topics include input/output addressing, timers, counters, and techniques like latching, internal relays, and sequencing using timers.
This document outlines the objectives and content of a course on microprocessors and their applications. The course aims to introduce students to the architecture, programming, and interfacing of 8085 and 8086 microprocessors as well as 8051 microcontrollers. The five units cover the 8085 CPU and peripheral interfacing, 8086 CPU, 8051 microcontroller hardware and programming, and 8051 applications. Students will learn about microprocessor components, assembly language programming, timing diagrams, interrupts, memory interfacing, and interfacing with devices like serial ports, parallel ports, keyboards, displays, and sensors. Reference textbooks are provided for each topic.
The document discusses the history and features of the 8051 microcontroller family. It specifically focuses on the AT89S52 microcontroller, which was introduced by Atmel in the 1980s. Key points include:
- The AT89S52 has 8K bytes of Flash memory, 256 bytes of RAM, 32 I/O lines, timers, serial port, and interrupts. It is compatible with the 8051 instruction set.
- It operates from 0-33MHz and has various power saving modes. It has features like watchdog timer, dual data pointers, and ISP programming.
- The document discusses the advantages of using a microcontroller over a microprocessor for embedded applications in terms of cost, size
This document describes the architectural features and peripheral functions of the PIC16F873 microcontroller. It discusses the microcontroller core, which uses a Harvard architecture with separate program and data memory. It then describes the peripheral features including timers, I/O ports, serial communication interfaces, and analog-to-digital converter. Diagrams are included showing the memory map, pin configuration, and block diagrams of timers and serial communication modules. The document provides a detailed overview of the capabilities and operation of the PIC16F873 microcontroller.
This document outlines a training course on programmable logic controllers (PLCs) using the Siemens S7-1200 PLC and TIA Portal software. The course consists of 9 modules that cover topics such as PLC hardware components, programming basics, function blocks, timers and counters, math operations, diagnostics, closed-loop control, networking, and human-machine interfaces. The introduction module describes the major PLC components, relay ladder logic, and provides an overview of the S7-1200 PLC and TIA Portal software. The course objectives are to teach students how to program and configure the S7-1200 PLC to automate various industrial processes and systems.
A microcontroller is a computer system on a single chip that contains a processor core, memory, and programmable input/output peripherals. Microcontrollers are commonly used to control objects, processes, or events. They are often embedded in devices to control their functions. A microcontroller contains a CPU, RAM, ROM, flash memory, I/O ports, an ADC, and timers. Common microcontrollers include the Intel 8051, Atmel ATmega 16, and PIC microcontrollers. The microcontroller reads programmed instructions from flash memory and executes them via the CPU to control its I/O pins based on inputs.
The document discusses industrial robot applications and programming. It describes how robots are used for material handling, assembly, processing and inspection operations that are hazardous, repetitive or difficult for humans. It then covers various types of material handling applications including pick and place, palletizing, machine loading/unloading and stacking operations. The document also discusses robot programming methods, languages, accuracy, repeatability and resolution.
This document discusses jump instructions in PLC ladder logic. Jump instructions allow a PLC program to break its normal sequential execution and move to another part of the program. The key points covered are:
- Jump instructions work with label instructions to redirect program flow. The jump instruction moves execution to the rung with a matching label number.
- Jumps can move execution forward or backward within a program. Multiple jumps can target the same label. Jumps can also be nested within other jumps.
- Advantages of jumps include allowing a PLC to run multiple programs, jumping sections during faults to reduce downtime, and improving scan time performance.
- An example is provided demonstrating a parking lot control system
Three-phase ac motors have been the workhorse of industry since the earliest days of electrical engineering. They are reliable, efficient, cost-effective and need little or no maintenance. In addition, ac motors such as induction and reluctance motors need no electrical connection to the rotor, so can easily be made flameproof for use in hazardous environments such as in mines.
In order to provide proper speed control of an ac motor, it is necessary to supply the motor with a three phase supply of which both the voltage and the frequency can be varied. Such a supply will create a variable speed rotating field in the stator that will allow the rotor to rotate at the required speed with low slip. This ac motor drive can efficiently provide full torque from zero speed to full speed, can overspeed if necessary, and can, by changing phase rotation, easily provide bi-directional operation of the motor. A drive with these characteristics is known as a PWM (Pulse Width Modulated) motor drive.
Drives and motors are an integral part of industrial equipment from packaging,robotics, computer numerical control (CNC), machine tools, industrial pumps,and fans. Designing next-generation drive systems to lower operating costs requires complex control algorithms at very low latencies as well as a flexibleplatform to support changing needs and the ability to design multiple-axis systems.
Traditional drive systems based on ASICs, digital signal processors (DSPs), and microcontroller units lack the performance and flexibility to address these needs. Altera’s family of FPGAs provides a scalable platform that can be used to offload control algorithm elements in hardware. You may also integrate the whole drive system with industry-proven processor architectures while supporting multipletypes of encoders and industrial Ethernet protocols. This “drive on a chip” system reduces cost and simplifies development.
The document describes the internal architecture of the 89C52 microcontroller. It has the following on-chip facilities: 4k ROM, 128 byte RAM, one USRT, 32 I/O port lines, two 16-bit timers/counters, six interrupt sources, and an on-chip clock oscillator. Other family members have variations like 8k ROM, 256 byte RAM, and an extra timer/counter. The 89C52 architecture includes ports, memory, a CPU, and peripherals that allow it to interface with external devices.
The document describes a student thesis project to design and build a Programmable Logic Controller (PLC) using an FPGA and microcontroller. The project involves designing electrical circuits based on these components, creating a printed circuit board layout, and testing the functionality of the completed PLC board. The PLC contains a main board with an FPGA and microcontroller to run the core logic, and a separate power board to handle input/output functions and connect to external devices and systems. Schematics and circuit designs are provided for the various components and subsystems that make up the PLC.
The microcontroller is a one-chip solution that integrates CPU, RAM, ROM, and I/O ports onto a single chip. It is optimized for embedded applications where cost and space are critical compared to general-purpose microprocessors. The 8051 microcontroller contains 4 I/O ports, 128 bytes of RAM, 4k bytes of ROM, timers, and serial communication. It uses a quartz crystal oscillator or external TTL oscillator as its clock source and has pins for reset, external memory access, and address latching.
The document provides information on the 8051 microcontroller, including its architecture and key components. It discusses that the 8051 is an 8-bit microcontroller with 4KB of program memory, 128 bytes of RAM, two timers, five interrupt sources, and 32 I/O lines across four ports. The block diagram shows the 8051 has an 8-bit ALU, registers, program counter, stack pointer, and interfaces to memory and I/O. Key components include the accumulator, B register, R registers, program counter, and stack/stack pointer.
The 8051 microcontroller is a Harvard architecture microcontroller developed by Intel in 1980 for use in embedded systems. It has separate program and data memories, 4 I/O ports, two 16-bit timers, a serial port, and can address up to 64KB of external memory. The 8051 has become widely used due to its low cost and availability of development tools from multiple manufacturers. It has a simple but powerful instruction set that can be easily learned, making it well suited for embedded applications.
An embedded system is a special-purpose computer system designed to perform one or a few dedicated functions, often with real-time computing constraints. Embedded systems are present in many devices such as household appliances, vehicles, medical equipment, smartphones, and more. They typically use microcontrollers or microprocessors to monitor and control embedded hardware components. Key components of embedded systems include a CPU, memory, I/O ports, and timers/counters. Microcontrollers integrate most of these components onto a single chip, while microprocessors require external components. Embedded systems use various addressing modes and have inputs like interrupts and timers that allow them to interact with the external environment. Common applications areas of embedded systems include consumer electronics, industrial automation, automotive systems,
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K
bytes of in-system programmable Flash memory. The device is manufactured using
Atmel’s high-density nonvolatile memory technology and is compatible with the industry-
standard 80C51 instruction set and pinout. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.
By combining a versatile 8-bit CPU with in-system programmable Flash on
a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a
highly-flexible and cost-effective solution to many embedded control applications.
The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes
of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a
six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,
and clock circuitry. In addition, the AT89S52 is designed with static logic for operation
down to zero frequency and supports two software selectable power saving modes.
The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning. The Power-down mode saves the RAM contents
but freezes the oscillator, disabling all other chip functions until the next interrupt
or hardware reset
FPGA based synchronous multi-channel PWM generator for humanoid robot IJECEIAES
In this paper, synchronous multi-channel pulse width modulation (PWM) generator for driving servo motors of humanoid robot was proposed. In an application, the humanoid robot requires smooth and beautiful movement, therefore the PWM signal for each servo motor must be synchronized. Since microcontroller (slave) has no enough channels to generate synchronous PWMs for 32 servo motors, field programmable gate array (FPGA) was used as slave for the humanoid robot. The FPGA was controlled by microcontroller (master) using serial communication. Simulation results show the system can perform serial communication, synchronize, and convert data well. The system can also generate PWM simultaneously with accurate duty cycle and fix period of 20ms.
IRJET- To Design 16 bit Synchronous Microprocessor using VHDL on FPGAIRJET Journal
This document describes the design of a 16-bit synchronous microprocessor using VHDL and its implementation on an FPGA. It discusses the design of key components like the ALU, registers, control unit, memory etc. in VHDL. The individual components are simulated and tested separately before integrating them to build the full microprocessor design. Finally, the functionality of the integrated microprocessor design is validated through simulation using a VHDL simulator.
IRJET- Control Strategy of Induction Motor Drive by using Universal Controlle...IRJET Journal
This document discusses controlling the speed of an induction motor using a universal controller and pulse width modulation inverter. It describes using an Arduino Mega 2560 microcontroller to generate PWM signals that control MOSFETs in an inverter. The inverter converts DC power to a variable frequency AC output to drive the induction motor at variable speeds. Simulation results in MATLAB showed the system could successfully control motor speed from zero to nominal speed by varying the inverter output frequency. The system was also implemented in hardware with an Arduino, MOSFET inverter and induction motor, demonstrating effective speed control under varying load conditions.
This document summarizes a research paper on using fuzzy logic to control the speed of a DC motor. It begins by describing the objectives of designing a high-current driver circuit for the motor and using an efficient fuzzy logic algorithm to accurately track motor velocity. It then provides mathematical analysis of the separately excited DC motor and describes implementing a fuzzy logic controller using FPGA. Membership functions, rule inference, and defuzzification are implemented in VHDL. Feedback is provided by an optical encoder to measure motor speed. Simulation results show the fuzzy controller can accurately control motor speed. In conclusion, the fuzzy logic approach provides an efficient and accurate method for DC motor speed control that does not require an accurate mathematical model of the motor.
IRJET- FPGA based Controller Design for Mobile RobotsIRJET Journal
This document describes the design of an FPGA-based controller for a mobile robot. It discusses using an FPGA to control different modules like sensors, motors, and communication in a robot. An infrared distance sensor is used to measure obstacles and control motor speed accordingly. The FPGA implementation includes programming in VHDL, simulation, synthesis to convert to hardware, and programming the FPGA board. A motor driver IC called L293D is used to control DC motors from the FPGA outputs.
1) The document describes an internship project involving the development of a control strategy for torque control of a five-phase synchronous electric machine without using pulse-width modulation.
2) A variable width block commutation control algorithm was developed, modeled in Simulink, and tested to operate the machine from 0 to high RPM while limiting starting currents.
3) The control algorithm and power converter model were implemented on a dSPACE rapid prototyping system, and hardware components were integrated and tested on a laboratory test bench. The drive system was successfully operated to control the synchronous electric machine.
Design and development of matlab gui based fuzzy logic controllers for ac motorIAEME Publication
This document summarizes the design and development of MATLAB-GUI based fuzzy logic controllers for AC motor speed control. It describes the hardware and software components of the speed control system, including an AC motor, tacho-generator, frequency to voltage converter, AD-DA board, ramp generator, comparator, and opto-isolator/triac. MATLAB is used to design the GUI and implement PID, fuzzy logic, and integrated fuzzy logic controllers. The performance of the controllers is compared for a step input of 7500 RPM. It is found that the integrated fuzzy logic controller has better performance in terms of rise time, settling time, and steady state error.
This document provides a technique for improving real-time control of an internal indexer bipolar stepper motor driver like the DRV8811/18/21/24/25. It details how to implement programmable acceleration and deceleration profiles, speed control, and position control using a microcontroller like the MSP430. The technique uses the microcontroller to send control signals to the motor driver over an I2C interface to control the stepper motor's speed, position, acceleration, and deceleration in a precise manner.
This work presents a fast response and stable computer based a brushed DC motor speed controller. The controller configured of gate drive circuits for H-Bridge accompanied with data acquisition unit DAQ-6211. These gate drive circuits include, phase comparator, current booster and wave forms cleaning circuits. An optical encoder is used for motor speed to frequency conversion. The CD4046 PLL chip compares phases of the encoder output frequency (motor speed) with a reference frequency (desired speed). The obtained phase difference (error) is used to allocate the suitable PWM duty cycles. An H-Bridge BJT switches driven by PWM is interfaced with the motor. The system hardware is provided with a simple and accurate data acquisition unit DAQ-6211 to be interfaced with the LabVIEW software Package. This allows monitoring and storing the different measured data of this platform. The system relative stability is determined and examined based on the Bode plot analysis and design. Then the relative stability criterion (Phase Margin) is measured the closed-loop stability of the system. This system considers the fast feedback response with indication of its stability state as well as the stable wide dynamic range. It compensates the changes in system parameters due to the environmental effects and other disturbances.
Micro PLC_Manal for new comer plc learnerssuser6cedd3
This chapter provides an overview of the Micro PLC system. It describes the Micro PLC components, connectivity options to expansion modules and programming devices. Ordering information is also included to help with hardware selection. Specifically:
1. It describes the Micro PLC nomenclature and specifications.
2. It explains how to connect expansion modules, programming devices and MMIs to the Micro PLC.
3. It provides ordering information to assist with selecting the appropriate Micro PLC model and accessories.
The aim of this paper is to prove that fuzzy logic algorithm is a suitable control technique for fast processes such as electrical machines. This theory has been experimented on different kinds of electrical machines such as stepping motors, dc motors and induction machines (with 6 phases) and the experimental results show that the proposed fuzzy logic algorithm is the most suitable control technique for electrical machines since this algorithm is not time consuming and it is also robust between plant parameters variations.
The Principle Of Ultrasound Imaging SystemMelissa Luster
The document describes a project to design an audio amplifier system that incorporates digital delay effects, where the system uses an FPGA platform to implement the design and includes components like sensors, ADCs, and DACs to acquire analog audio signals, convert them to digital, process them with digital delay effects using the FPGA, and convert them back to analog for output. The goal is to add effects like reverb and echo to the audio in real-time using programmable digital logic on the FPGA rather than traditional analog circuitry for such effects.
For years, LabVIEW has enabled engineers and scientists to develop sophisticated autonomous systems. At its core, Lab VIEW is widely used for sensor and actuator connectivity and currently offers more than 8000 drivers for measurement devices. Furthermore, with new libraries for autonomy and an entirely new suite of robotics-specific sensor and actuator drivers, LabVIEW provides all of the necessary tools for robotics development. The DC Motor is an attractive piece of equipment in many industrial applications requiring variable speed and load characteristics due to its ease of controllability. Speed of a DC motor varies proportional to the input voltage. With a fixed supply voltage the speed of the motor can be changed. This paper focuses on controlling the speed and direction of a Robot using PWM technique (varying duty cycle of a square wave) and Arduino. The four different keys are assigned for the forward, backward, left and right movement and it is controlled by using LabVIEW interface Arduino (LIFA).
The Objective of this Paper is to optimize the area of (Serial peripheral interface) SPI module. SPI is a inter and intra communication protocol used for communication and testing’s like BST. Its occupies space in Embedded industry for communication of devices like Microcontrollers, peripheral’s for example ADC’s, DAC’s, Memories etc. ll these devices have a SPI module on it which acts as a master or Slave. This module is consuming more Area, here we made a approach in order to reduce Area, which reduces Cost as well. Protocol is implemented in Structural Code Verilog, Simulated and Synthesized Using Xilinx9.1 on various families of FPGA. Finally whole design is mapped onto Vertex 5 FPGA.
An external plunge grinding machine with control panel automation techniqueIAEME Publication
This document describes an external plunge grinding machine automated with a control panel using a Mitsubishi PLC system. It discusses how programmable logic controllers have improved manufacturing productivity by providing flexible, reliable control. The PLC controls inputs like push buttons and outputs like motors and lights. Ladder logic programming is used to automate the machine's grinding and loading/unloading sequences. Servo and induction motors precisely position the grinding wheel. A human-machine interface allows users to input part programs. Communication between the PLC and computer allows storing and monitoring machine data. Overall, automating the machine's control panel with a PLC improves productivity and efficiency compared to traditional control techniques.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
This document describes a temperature controlled fan project. It contains a block diagram showing the main components: an 8051 microcontroller, temperature sensor, ADC, motor driver, fan motor, and 7-segment displays. It also provides details on the working, which involves measuring temperature, displaying it on the 7-segment displays, and varying the fan speed based on the temperature using PWM. Simulation results and hardware implementation snapshots are included. The project aims to automatically control fan speed based on sensed temperature.
Speed control of dc motor using relay feedback tuned piAlexander Decker
This document discusses speed control of a DC motor using different controller types, including a relay feedback tuned PI controller, fuzzy PI controller (FPIC), and self-tuned fuzzy PI controller (STFPIC). The FPIC and STFPIC are developed using fuzzy logic to overcome limitations of conventional PID controllers for nonlinear systems without an accurate mathematical model. An experimental setup is used to test the controllers' performance on a DC motor. Results show the model-independent STFPIC and FPIC controllers improve speed control performance compared to the relay-tuned PI controller.
This document describes experiments with analog to digital converters (ADCs) using an 8-bit and 10-bit converter to read voltage input and display the results on a 7-segment LED display. It provides algorithms and code for initializing the ADC, taking samples, and performing conversions to extract the digital values for display. Procedures are outlined for 8-bit and 10-bit conversions using interrupts or polling and arithmetic operations to handle the 10-bit values.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
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Redefining brain tumor segmentation: a cutting-edge convolutional neural netw...IJECEIAES
Medical image analysis has witnessed significant advancements with deep learning techniques. In the domain of brain tumor segmentation, the ability to
precisely delineate tumor boundaries from magnetic resonance imaging (MRI)
scans holds profound implications for diagnosis. This study presents an ensemble convolutional neural network (CNN) with transfer learning, integrating
the state-of-the-art Deeplabv3+ architecture with the ResNet18 backbone. The
model is rigorously trained and evaluated, exhibiting remarkable performance
metrics, including an impressive global accuracy of 99.286%, a high-class accuracy of 82.191%, a mean intersection over union (IoU) of 79.900%, a weighted
IoU of 98.620%, and a Boundary F1 (BF) score of 83.303%. Notably, a detailed comparative analysis with existing methods showcases the superiority of
our proposed model. These findings underscore the model’s competence in precise brain tumor localization, underscoring its potential to revolutionize medical
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for future exploration and optimization of advanced CNN models in medical
imaging, emphasizing addressing false positives and resource efficiency.
Embedded machine learning-based road conditions and driving behavior monitoringIJECEIAES
Car accident rates have increased in recent years, resulting in losses in human lives, properties, and other financial costs. An embedded machine learning-based system is developed to address this critical issue. The system can monitor road conditions, detect driving patterns, and identify aggressive driving behaviors. The system is based on neural networks trained on a comprehensive dataset of driving events, driving styles, and road conditions. The system effectively detects potential risks and helps mitigate the frequency and impact of accidents. The primary goal is to ensure the safety of drivers and vehicles. Collecting data involved gathering information on three key road events: normal street and normal drive, speed bumps, circular yellow speed bumps, and three aggressive driving actions: sudden start, sudden stop, and sudden entry. The gathered data is processed and analyzed using a machine learning system designed for limited power and memory devices. The developed system resulted in 91.9% accuracy, 93.6% precision, and 92% recall. The achieved inference time on an Arduino Nano 33 BLE Sense with a 32-bit CPU running at 64 MHz is 34 ms and requires 2.6 kB peak RAM and 139.9 kB program flash memory, making it suitable for resource-constrained embedded systems.
Advanced control scheme of doubly fed induction generator for wind turbine us...IJECEIAES
This paper describes a speed control device for generating electrical energy on an electricity network based on the doubly fed induction generator (DFIG) used for wind power conversion systems. At first, a double-fed induction generator model was constructed. A control law is formulated to govern the flow of energy between the stator of a DFIG and the energy network using three types of controllers: proportional integral (PI), sliding mode controller (SMC) and second order sliding mode controller (SOSMC). Their different results in terms of power reference tracking, reaction to unexpected speed fluctuations, sensitivity to perturbations, and resilience against machine parameter alterations are compared. MATLAB/Simulink was used to conduct the simulations for the preceding study. Multiple simulations have shown very satisfying results, and the investigations demonstrate the efficacy and power-enhancing capabilities of the suggested control system.
Neural network optimizer of proportional-integral-differential controller par...IJECEIAES
Wide application of proportional-integral-differential (PID)-regulator in industry requires constant improvement of methods of its parameters adjustment. The paper deals with the issues of optimization of PID-regulator parameters with the use of neural network technology methods. A methodology for choosing the architecture (structure) of neural network optimizer is proposed, which consists in determining the number of layers, the number of neurons in each layer, as well as the form and type of activation function. Algorithms of neural network training based on the application of the method of minimizing the mismatch between the regulated value and the target value are developed. The method of back propagation of gradients is proposed to select the optimal training rate of neurons of the neural network. The neural network optimizer, which is a superstructure of the linear PID controller, allows increasing the regulation accuracy from 0.23 to 0.09, thus reducing the power consumption from 65% to 53%. The results of the conducted experiments allow us to conclude that the created neural superstructure may well become a prototype of an automatic voltage regulator (AVR)-type industrial controller for tuning the parameters of the PID controller.
An improved modulation technique suitable for a three level flying capacitor ...IJECEIAES
This research paper introduces an innovative modulation technique for controlling a 3-level flying capacitor multilevel inverter (FCMLI), aiming to streamline the modulation process in contrast to conventional methods. The proposed
simplified modulation technique paves the way for more straightforward and
efficient control of multilevel inverters, enabling their widespread adoption and
integration into modern power electronic systems. Through the amalgamation of
sinusoidal pulse width modulation (SPWM) with a high-frequency square wave
pulse, this controlling technique attains energy equilibrium across the coupling
capacitor. The modulation scheme incorporates a simplified switching pattern
and a decreased count of voltage references, thereby simplifying the control
algorithm.
A review on features and methods of potential fishing zoneIJECEIAES
This review focuses on the importance of identifying potential fishing zones in seawater for sustainable fishing practices. It explores features like sea surface temperature (SST) and sea surface height (SSH), along with classification methods such as classifiers. The features like SST, SSH, and different classifiers used to classify the data, have been figured out in this review study. This study underscores the importance of examining potential fishing zones using advanced analytical techniques. It thoroughly explores the methodologies employed by researchers, covering both past and current approaches. The examination centers on data characteristics and the application of classification algorithms for classification of potential fishing zones. Furthermore, the prediction of potential fishing zones relies significantly on the effectiveness of classification algorithms. Previous research has assessed the performance of models like support vector machines, naïve Bayes, and artificial neural networks (ANN). In the previous result, the results of support vector machine (SVM) were 97.6% more accurate than naive Bayes's 94.2% to classify test data for fisheries classification. By considering the recent works in this area, several recommendations for future works are presented to further improve the performance of the potential fishing zone models, which is important to the fisheries community.
Electrical signal interference minimization using appropriate core material f...IJECEIAES
As demand for smaller, quicker, and more powerful devices rises, Moore's law is strictly followed. The industry has worked hard to make little devices that boost productivity. The goal is to optimize device density. Scientists are reducing connection delays to improve circuit performance. This helped them understand three-dimensional integrated circuit (3D IC) concepts, which stack active devices and create vertical connections to diminish latency and lower interconnects. Electrical involvement is a big worry with 3D integrates circuits. Researchers have developed and tested through silicon via (TSV) and substrates to decrease electrical wave involvement. This study illustrates a novel noise coupling reduction method using several electrical involvement models. A 22% drop in electrical involvement from wave-carrying to victim TSVs introduces this new paradigm and improves system performance even at higher THz frequencies.
Electric vehicle and photovoltaic advanced roles in enhancing the financial p...IJECEIAES
Climate change's impact on the planet forced the United Nations and governments to promote green energies and electric transportation. The deployments of photovoltaic (PV) and electric vehicle (EV) systems gained stronger momentum due to their numerous advantages over fossil fuel types. The advantages go beyond sustainability to reach financial support and stability. The work in this paper introduces the hybrid system between PV and EV to support industrial and commercial plants. This paper covers the theoretical framework of the proposed hybrid system including the required equation to complete the cost analysis when PV and EV are present. In addition, the proposed design diagram which sets the priorities and requirements of the system is presented. The proposed approach allows setup to advance their power stability, especially during power outages. The presented information supports researchers and plant owners to complete the necessary analysis while promoting the deployment of clean energy. The result of a case study that represents a dairy milk farmer supports the theoretical works and highlights its advanced benefits to existing plants. The short return on investment of the proposed approach supports the paper's novelty approach for the sustainable electrical system. In addition, the proposed system allows for an isolated power setup without the need for a transmission line which enhances the safety of the electrical network
Bibliometric analysis highlighting the role of women in addressing climate ch...IJECEIAES
Fossil fuel consumption increased quickly, contributing to climate change
that is evident in unusual flooding and draughts, and global warming. Over
the past ten years, women's involvement in society has grown dramatically,
and they succeeded in playing a noticeable role in reducing climate change.
A bibliometric analysis of data from the last ten years has been carried out to
examine the role of women in addressing the climate change. The analysis's
findings discussed the relevant to the sustainable development goals (SDGs),
particularly SDG 7 and SDG 13. The results considered contributions made
by women in the various sectors while taking geographic dispersion into
account. The bibliometric analysis delves into topics including women's
leadership in environmental groups, their involvement in policymaking, their
contributions to sustainable development projects, and the influence of
gender diversity on attempts to mitigate climate change. This study's results
highlight how women have influenced policies and actions related to climate
change, point out areas of research deficiency and recommendations on how
to increase role of the women in addressing the climate change and
achieving sustainability. To achieve more successful results, this initiative
aims to highlight the significance of gender equality and encourage
inclusivity in climate change decision-making processes.
Voltage and frequency control of microgrid in presence of micro-turbine inter...IJECEIAES
The active and reactive load changes have a significant impact on voltage
and frequency. In this paper, in order to stabilize the microgrid (MG) against
load variations in islanding mode, the active and reactive power of all
distributed generators (DGs), including energy storage (battery), diesel
generator, and micro-turbine, are controlled. The micro-turbine generator is
connected to MG through a three-phase to three-phase matrix converter, and
the droop control method is applied for controlling the voltage and
frequency of MG. In addition, a method is introduced for voltage and
frequency control of micro-turbines in the transition state from gridconnected mode to islanding mode. A novel switching strategy of the matrix
converter is used for converting the high-frequency output voltage of the
micro-turbine to the grid-side frequency of the utility system. Moreover,
using the switching strategy, the low-order harmonics in the output current
and voltage are not produced, and consequently, the size of the output filter
would be reduced. In fact, the suggested control strategy is load-independent
and has no frequency conversion restrictions. The proposed approach for
voltage and frequency regulation demonstrates exceptional performance and
favorable response across various load alteration scenarios. The suggested
strategy is examined in several scenarios in the MG test systems, and the
simulation results are addressed.
Enhancing battery system identification: nonlinear autoregressive modeling fo...IJECEIAES
Precisely characterizing Li-ion batteries is essential for optimizing their
performance, enhancing safety, and prolonging their lifespan across various
applications, such as electric vehicles and renewable energy systems. This
article introduces an innovative nonlinear methodology for system
identification of a Li-ion battery, employing a nonlinear autoregressive with
exogenous inputs (NARX) model. The proposed approach integrates the
benefits of nonlinear modeling with the adaptability of the NARX structure,
facilitating a more comprehensive representation of the intricate
electrochemical processes within the battery. Experimental data collected
from a Li-ion battery operating under diverse scenarios are employed to
validate the effectiveness of the proposed methodology. The identified
NARX model exhibits superior accuracy in predicting the battery's behavior
compared to traditional linear models. This study underscores the
importance of accounting for nonlinearities in battery modeling, providing
insights into the intricate relationships between state-of-charge, voltage, and
current under dynamic conditions.
Smart grid deployment: from a bibliometric analysis to a surveyIJECEIAES
Smart grids are one of the last decades' innovations in electrical energy.
They bring relevant advantages compared to the traditional grid and
significant interest from the research community. Assessing the field's
evolution is essential to propose guidelines for facing new and future smart
grid challenges. In addition, knowing the main technologies involved in the
deployment of smart grids (SGs) is important to highlight possible
shortcomings that can be mitigated by developing new tools. This paper
contributes to the research trends mentioned above by focusing on two
objectives. First, a bibliometric analysis is presented to give an overview of
the current research level about smart grid deployment. Second, a survey of
the main technological approaches used for smart grid implementation and
their contributions are highlighted. To that effect, we searched the Web of
Science (WoS), and the Scopus databases. We obtained 5,663 documents
from WoS and 7,215 from Scopus on smart grid implementation or
deployment. With the extraction limitation in the Scopus database, 5,872 of
the 7,215 documents were extracted using a multi-step process. These two
datasets have been analyzed using a bibliometric tool called bibliometrix.
The main outputs are presented with some recommendations for future
research.
Use of analytical hierarchy process for selecting and prioritizing islanding ...IJECEIAES
One of the problems that are associated to power systems is islanding
condition, which must be rapidly and properly detected to prevent any
negative consequences on the system's protection, stability, and security.
This paper offers a thorough overview of several islanding detection
strategies, which are divided into two categories: classic approaches,
including local and remote approaches, and modern techniques, including
techniques based on signal processing and computational intelligence.
Additionally, each approach is compared and assessed based on several
factors, including implementation costs, non-detected zones, declining
power quality, and response times using the analytical hierarchy process
(AHP). The multi-criteria decision-making analysis shows that the overall
weight of passive methods (24.7%), active methods (7.8%), hybrid methods
(5.6%), remote methods (14.5%), signal processing-based methods (26.6%),
and computational intelligent-based methods (20.8%) based on the
comparison of all criteria together. Thus, it can be seen from the total weight
that hybrid approaches are the least suitable to be chosen, while signal
processing-based methods are the most appropriate islanding detection
method to be selected and implemented in power system with respect to the
aforementioned factors. Using Expert Choice software, the proposed
hierarchy model is studied and examined.
Enhancing of single-stage grid-connected photovoltaic system using fuzzy logi...IJECEIAES
The power generated by photovoltaic (PV) systems is influenced by
environmental factors. This variability hampers the control and utilization of
solar cells' peak output. In this study, a single-stage grid-connected PV
system is designed to enhance power quality. Our approach employs fuzzy
logic in the direct power control (DPC) of a three-phase voltage source
inverter (VSI), enabling seamless integration of the PV connected to the
grid. Additionally, a fuzzy logic-based maximum power point tracking
(MPPT) controller is adopted, which outperforms traditional methods like
incremental conductance (INC) in enhancing solar cell efficiency and
minimizing the response time. Moreover, the inverter's real-time active and
reactive power is directly managed to achieve a unity power factor (UPF).
The system's performance is assessed through MATLAB/Simulink
implementation, showing marked improvement over conventional methods,
particularly in steady-state and varying weather conditions. For solar
irradiances of 500 and 1,000 W/m2
, the results show that the proposed
method reduces the total harmonic distortion (THD) of the injected current
to the grid by approximately 46% and 38% compared to conventional
methods, respectively. Furthermore, we compare the simulation results with
IEEE standards to evaluate the system's grid compatibility.
Enhancing photovoltaic system maximum power point tracking with fuzzy logic-b...IJECEIAES
Photovoltaic systems have emerged as a promising energy resource that
caters to the future needs of society, owing to their renewable, inexhaustible,
and cost-free nature. The power output of these systems relies on solar cell
radiation and temperature. In order to mitigate the dependence on
atmospheric conditions and enhance power tracking, a conventional
approach has been improved by integrating various methods. To optimize
the generation of electricity from solar systems, the maximum power point
tracking (MPPT) technique is employed. To overcome limitations such as
steady-state voltage oscillations and improve transient response, two
traditional MPPT methods, namely fuzzy logic controller (FLC) and perturb
and observe (P&O), have been modified. This research paper aims to
simulate and validate the step size of the proposed modified P&O and FLC
techniques within the MPPT algorithm using MATLAB/Simulink for
efficient power tracking in photovoltaic systems.
Adaptive synchronous sliding control for a robot manipulator based on neural ...IJECEIAES
Robot manipulators have become important equipment in production lines, medical fields, and transportation. Improving the quality of trajectory tracking for
robot hands is always an attractive topic in the research community. This is a
challenging problem because robot manipulators are complex nonlinear systems
and are often subject to fluctuations in loads and external disturbances. This
article proposes an adaptive synchronous sliding control scheme to improve trajectory tracking performance for a robot manipulator. The proposed controller
ensures that the positions of the joints track the desired trajectory, synchronize
the errors, and significantly reduces chattering. First, the synchronous tracking
errors and synchronous sliding surfaces are presented. Second, the synchronous
tracking error dynamics are determined. Third, a robust adaptive control law is
designed,the unknown components of the model are estimated online by the neural network, and the parameters of the switching elements are selected by fuzzy
logic. The built algorithm ensures that the tracking and approximation errors
are ultimately uniformly bounded (UUB). Finally, the effectiveness of the constructed algorithm is demonstrated through simulation and experimental results.
Simulation and experimental results show that the proposed controller is effective with small synchronous tracking errors, and the chattering phenomenon is
significantly reduced.
Remote field-programmable gate array laboratory for signal acquisition and de...IJECEIAES
A remote laboratory utilizing field-programmable gate array (FPGA) technologies enhances students’ learning experience anywhere and anytime in embedded system design. Existing remote laboratories prioritize hardware access and visual feedback for observing board behavior after programming, neglecting comprehensive debugging tools to resolve errors that require internal signal acquisition. This paper proposes a novel remote embeddedsystem design approach targeting FPGA technologies that are fully interactive via a web-based platform. Our solution provides FPGA board access and debugging capabilities beyond the visual feedback provided by existing remote laboratories. We implemented a lab module that allows users to seamlessly incorporate into their FPGA design. The module minimizes hardware resource utilization while enabling the acquisition of a large number of data samples from the signal during the experiments by adaptively compressing the signal prior to data transmission. The results demonstrate an average compression ratio of 2.90 across three benchmark signals, indicating efficient signal acquisition and effective debugging and analysis. This method allows users to acquire more data samples than conventional methods. The proposed lab allows students to remotely test and debug their designs, bridging the gap between theory and practice in embedded system design.
Detecting and resolving feature envy through automated machine learning and m...IJECEIAES
Efficiently identifying and resolving code smells enhances software project quality. This paper presents a novel solution, utilizing automated machine learning (AutoML) techniques, to detect code smells and apply move method refactoring. By evaluating code metrics before and after refactoring, we assessed its impact on coupling, complexity, and cohesion. Key contributions of this research include a unique dataset for code smell classification and the development of models using AutoGluon for optimal performance. Furthermore, the study identifies the top 20 influential features in classifying feature envy, a well-known code smell, stemming from excessive reliance on external classes. We also explored how move method refactoring addresses feature envy, revealing reduced coupling and complexity, and improved cohesion, ultimately enhancing code quality. In summary, this research offers an empirical, data-driven approach, integrating AutoML and move method refactoring to optimize software project quality. Insights gained shed light on the benefits of refactoring on code quality and the significance of specific features in detecting feature envy. Future research can expand to explore additional refactoring techniques and a broader range of code metrics, advancing software engineering practices and standards.
Smart monitoring technique for solar cell systems using internet of things ba...IJECEIAES
Rapidly and remotely monitoring and receiving the solar cell systems status parameters, solar irradiance, temperature, and humidity, are critical issues in enhancement their efficiency. Hence, in the present article an improved smart prototype of internet of things (IoT) technique based on embedded system through NodeMCU ESP8266 (ESP-12E) was carried out experimentally. Three different regions at Egypt; Luxor, Cairo, and El-Beheira cities were chosen to study their solar irradiance profile, temperature, and humidity by the proposed IoT system. The monitoring data of solar irradiance, temperature, and humidity were live visualized directly by Ubidots through hypertext transfer protocol (HTTP) protocol. The measured solar power radiation in Luxor, Cairo, and El-Beheira ranged between 216-1000, 245-958, and 187-692 W/m 2 respectively during the solar day. The accuracy and rapidity of obtaining monitoring results using the proposed IoT system made it a strong candidate for application in monitoring solar cell systems. On the other hand, the obtained solar power radiation results of the three considered regions strongly candidate Luxor and Cairo as suitable places to build up a solar cells system station rather than El-Beheira.
An efficient security framework for intrusion detection and prevention in int...IJECEIAES
Over the past few years, the internet of things (IoT) has advanced to connect billions of smart devices to improve quality of life. However, anomalies or malicious intrusions pose several security loopholes, leading to performance degradation and threat to data security in IoT operations. Thereby, IoT security systems must keep an eye on and restrict unwanted events from occurring in the IoT network. Recently, various technical solutions based on machine learning (ML) models have been derived towards identifying and restricting unwanted events in IoT. However, most ML-based approaches are prone to miss-classification due to inappropriate feature selection. Additionally, most ML approaches applied to intrusion detection and prevention consider supervised learning, which requires a large amount of labeled data to be trained. Consequently, such complex datasets are impossible to source in a large network like IoT. To address this problem, this proposed study introduces an efficient learning mechanism to strengthen the IoT security aspects. The proposed algorithm incorporates supervised and unsupervised approaches to improve the learning models for intrusion detection and mitigation. Compared with the related works, the experimental outcome shows that the model performs well in a benchmark dataset. It accomplishes an improved detection accuracy of approximately 99.21%.
Software Engineering and Project Management - Introduction, Modeling Concepts...Prakhyath Rai
Introduction, Modeling Concepts and Class Modeling: What is Object orientation? What is OO development? OO Themes; Evidence for usefulness of OO development; OO modeling history. Modeling
as Design technique: Modeling, abstraction, The Three models. Class Modeling: Object and Class Concept, Link and associations concepts, Generalization and Inheritance, A sample class model, Navigation of class models, and UML diagrams
Building the Analysis Models: Requirement Analysis, Analysis Model Approaches, Data modeling Concepts, Object Oriented Analysis, Scenario-Based Modeling, Flow-Oriented Modeling, class Based Modeling, Creating a Behavioral Model.
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Gas agency management system project report.pdfKamal Acharya
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and is free to be implemented in various algorithms [8-10]. FPGA have higher processing speed, offer fast
time to market, low design/manufacturing cost and risk, extremely high processing performance and
programmability [11-15]. Xilinx Ise 14.5 in this research is used to create a program with VHDL (Very high
speed integrated Hard Language Description Language) type and FPGA Isim is used to test and simulate
the coded program that has been prepared [16-20]. The hardware description language(HDL) is used in
FPGA to communicate with hardware which is very easily interfaced with them, Logic gates are used in
FPGA as a memory blocks, these logic gates are interconnected with each other due to these feature it
performs complex functions and compute fast response [21-25]. The trial is the first step in the process of
producing the right motor movement and real time. Therefore, the researcher simulation and test the
movement of stepper motor used simulinkIsim FPGA and application of stepper motor circuit.
2. RESEARCH METHOD
2.1. Stepper motor design movement
The basic concept before doing the program design (coding) and testing motor movements first
determine the path systematically. The following are the software simulation stages. Figure 1 is a block
diagram of the program implementation process that has been determined, the process of running
the program in the process of synthesizing XST to check program errors, then looking at the RTL,
implementing the design, producing a programming file, Configuring the Target Device, then running
the program.
Figure 1. Block diagram before simulation and testing
2.2. UCF motor movement design stepper
The design of the stepper motor UCF program aims to declare input variables and output variables
tailored to the LOC of the buttons and pins used on the Spartan 3E FPGA device. Here's a picture Figure 2
program listing. Figure 2 is a configuration of the use of pins and buttons between the Spartan 3E FPGA with
stepper motor driver. Code net is used to define variables in the VHDL and code LOC programs to describe
the input output pins on Spartan 3E FPGA device.
Figure 2. UCF motor stepper program design
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2.3. Method
The device generally consists of several blocks: the input block, the process block, and the output
block, the overall system block diagram can be shown in Figure 3. Figure 3 consists of several blocks:
the input block, the process block, and the output block. The input block consists of several variables:
FS (Full Step), HS (Half Step), CW (Clock Wise), CCW (Counter Clock Wise), Step_En (Step Enable),
and Rst (Reset). The function of the variable to determine the input value to be sent on the process block.
The interface block is a process block consisting of program encoding algorithm and for simulation using
Isim FPGA to generate digit bit value then configure target device which function to flash program into
FPGA. To block the output (output) is obtained from the stepper motor driver where the input value is
received from the FPGA output. The output variables in stepper motors are D, C, B, and A.
Figure 3. Block movement simulation results stepper
2.4. Synthesize –XST
The synthesize process aims to translate sequences of programs from the VHDL language into
an IC-shaped schematic. Synthesize process is complete then View RTL Synthesize can be displayed,
as shown below Figure 4. Figure 4 is composed of several schematic block form ICs equipped with the name
of each pin. The blocks are translated from behavioral program blocks which consist of Clk, CW_CCW,
FS_HS (Full Step / Half Step), Rst (Reset), and Step_En (Step Enable) input pins, while the output pins are
O1, O2, O3, and O4. Step Enable serves to allow the driver to accept commands to move the motor. Clock
functions to generate a pulse signal from input and output. Here is the schematic block stepper compiler.
Figure 4. Results process synthesize program
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3. RESULTS AND ANALYSIS
3.1. Implementation phase
The purpose of translation implemantation is to check, and translate the program into series in
the form of IC. Figure 5 is a sequence of design composers simulating the movement of stepper motors with
the direction of CW (Clock Wise) and CCW (Counter Clock Wise), composed of several logic gates and
flip-flop circuit. The digital logic gates that make up the digital IC stepper are the AND logic gate, the logic
gate of OR logic, the NOR logic gate, and the D Flip-flop. Flip-flop serves to store information as well as
calculate the beat and synchronize variable time signal input for some of the time signal that is referenced.
Arrangement of digital logic circuit ie 21 slot flip-flop gate, number 4 input LUTs 17, Occupied Slice 17,
total 4 input LUTs counted 33, number BOBs IOBs as much as 9, number of BUFGUMXs 1.
Figure 5. Block of stepper motor simulator composer
3.2. Test movement motor stepper status full1
Testing at this stage is a simulation where the value of Full1 (0111) serve as the input value to move
the stepper motor and the result as shown in Figure 6. Figure 6 shows that the value used as input is the value
of full1 0111. If the value fs_hs = 1 and cw_ccw = 0 the motor moves half step with the clockwise direction.
The values at the output are o1 = 0, o2 = 0, o3 = 1, and o4 = 1.
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Figure 6. Movement simulation of half1 stepper motion
3.3. Test movement motor stepper status half1
Testing at this stage is a simulation where the value of Half1 (0011) serves as the input value to
move the stepper motor and the result as shown in Figure 7 below. Figure 7 shows that the value used as
input is the value of half1 is 0011. If the value of fs_hs = 0 and cw_ccw = 0 the motor moves full step with
the clockwise direction.
Figure 7. Movement simulation movement stepper full2
3.4. Test movement motor stepper status reset
Stepper motor step testing starts from the input reset status where the value of input = 0, if reset = 0
the motor is not moving and LED status off, as in Figure 8 below. Figure 8 shows that the motor can not
move and all led A, B, C, and D status of when the reset state = 0.
Figure 8. Status LED Off
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3.5. Test movement motor stepper status full1
Next test stepper motor movement with the input case value is full1 = 0111 and the result as shown
Figure 9. Figure 9 is a simulation result of movement of stepper motor with case full1. The result of
movement is half step with the output value 0011 and led live is DC while BA status is off. The degree of
producing movement is 450
with the clockwise direction.
Figure 9. Status LED D and C On
3.6. Test movement motor stepper status half1
Next test stepper motor movement with the input case value is half1 = 0011 and the result as shown
Figure 10. Figure 10 is a simulation result of movement of stepper motor with case half1. Result of
movement resulted is Full step with value of output 1011 and led C is alive while ABD status is off.
The degree of producing movement is 1800
with the clockwise direction.
Figure 10. Status of LED C On
3.7. Test movement motor stepper status full4
The next step is the movement of the stepper motor with a case input value of Full4 = 1110 and
the results as shown in Figure 11. Figure 11 is the simulation results of the stepper motor movement with
the Full4 case. The result of movement is half step with the output value 0110 and led that live, namely AD
while BC status off. The degree of producing movement is 3600
in a clockwise direction. Furthermore,
if the direction of motor movement is anticlockwise, the motion of the stepper motor becomes full1 with
the output value of 0111 with LED D status on, as shown in Figure 12.
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Figure 11. Status of LED A and B On
Figure 12. Status of LED D on
3.8. Summary of motion step motion simulation
Having obtained the results of simulation testing can be made summary of values and direction as
the Table 1. Based on Table 1 is summary of the degree values and the direction of movement of the stepper
motor is obtained begin from 0 degrees until to 360 degrees moving in accordance with a predetermined
degree and moving in accordance with the direction specified. Overall the movement of the stepper motor
works in real time.
Table 1. Summary of stepper motor movement simulation value
Case EN
Motion Direction Input Value Output Value
Level
FS HS CW CCW In1 In2 In3 In4 O1 O2 O3 O4
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0°
Full1 1 0 - - 1 0 1 1 1 0 1 1 1 90°
Half1 1 0 - 0 - 0 0 1 1 1 0 1 1 180°
Half1 1 0 - - 1 0 0 1 1 0 1 1 1 90°
Full2 1 - 1 0 - 1 0 1 1 1 0 0 1 135°
Full2 1 0 - - 1 1 0 1 1 1 1 0 1 270°
Half2 1 0 - 0 - 1 0 0 1 1 1 0 1 270°
Half2 1 0 - - 1 1 0 0 1 0 1 1 1 90°
Full3 1 - 1 0 - 1 1 0 1 1 1 0 0 225°
Full3 1 0 - - 1 1 1 0 1 1 1 1 0 360°
Half3 1 0 - 0 - 1 1 0 0 1 1 1 0 360°
Half3 1 0 - - 1 1 1 0 0 1 1 0 1 270°
Full4 1 - 0 0 - 1 1 1 0 0 1 1 0 315°
Full4 1 0 - - 1 1 1 1 0 0 1 1 1 90°
Half4 1 0 - 0 - 0 1 1 0 0 1 1 1 90°
Half4 1 0 0 - 1 0 1 1 0 1 1 1 0 360°
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4. CONCLUSION
Provide a statement that what is expected, as stated in the "Introduction" chapter can ultimately
Based on the results of program design and simulation testing obtained at the time of research, it can be
concluded as follows:
a. From the results of this study obtained the arrangement of digital logic circuit that are slips flip-flop 21
gates, number 4 input LUTs as much 17, Occupied Slice as much as 17, total 4 input LUTs as much 33,
number BOBs IOBs as much as 9, and number of BUFGUMXs 1.
b. Simulation results of motor movement testing is that if the value at the input reset = 0 then the stepper
motors can not move in accordance with the predetermined degree. If the input value is given 0111, fs_hs
= 1, and cw_ccw = 0 the motor moves half step clockwise. The values at the output are o1 = 0, o2 = 0, o3
= 1, and o4 = 1. If input variable fs_hs gave the value = 0, the motor move full stepp. If the input value is
0011, fs_hs = 0, and cw_ccw = 0 the motor moves full step clockwise. The value at the output is o1 = 1,
o2 = 0, o3 = 1, and o4 = 1. If the input value is 1011, fs_hs = 1, and cw_ccw = 0 the motor moves half
step clockwise. The value at the output is o1 = 1, o2 = 0, o3 = 0, and o4 = 1. If the input value is 1001,
fs_hs = 0, and cw_ccw = 0 the motor moves full step clockwise. The value at the output is o1 = 1, o2 = 1,
o3 = 0, and o4 = 1. If the input value is 1101, fs_hs = 1, and cw_ccw = 0 the motor moves half step
clockwise. The value at the output is o1 = 1, o2 = 1, o3 = 0, and o4 = 0. If the input value is 1100, fs_hs =
0, and cw_ccw = 0 the motor moves full step clockwise. The value at the output is o1 = 1, o2 = 1, o3 = 1,
and o4 = 0. If the input value is 1110, fs_hs = 1, and cw_ccw = 0 the motor moves half step clockwise.
The value at the output is o1 = 0, o2 = 1, o3 = 1, and o4 = 0. If the input value is 0110, fs_hs = 0,
and cw_ccw = 0 the motor moves full step clockwise. The value at the output is o1 = 0, o2 = 1, o3 = 1,
and o4 = 1.
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BIOGRAPHIES OF AUTHORS
Freddy Artadima Silaban received his Master of Engineering (MT) degree in Electrical
Engineering, Information Technology Specialization, Gunadarma University, Depok, 2016.
He currently teaches at Universitas Mercu Buana, Jakarta (Indonesia).
Setiyo Budiyanto received his Ph.D in Electrical Engineering, University of Indonesia (2016).
Currently he is Research Reviewer - with Certification Uses Standardized Methods of Ministry
of Research, Technology and Higher Education (Indonesia) Regulation No. 69 - 2016;
He is Associate Professor in Department of Electrical Engineering - Universitas Mercu Buana,
Jakarta (Indonesia).
Wahyu Kusuma Raharja Head of Postgraduate Department of Electrical Engineering
Gunadarma University's until now. He is currently teaches and research in Gunadarma
University, Depok (Indonesia).