Microchip's PIC Micro Controller - Presentation Covers- Embedded system,Application, Harvard and Von Newman Architecture, PIC Microcontroller Instruction Set, PIC assembly language programming, PIC Basic circuit design and its programming etc.
Difference Between Microprocessors and Microcontrollerselprocus
A microprocessor is an electronic computer component crafted from miniature sized transistors & some other circuitry elements on a solitary semi-conductor IC (integrated circuit) or micro chip. Microcontroller is a computer on‐a‐chip optimized to manage electric gadgets. It is intended particularly for precise tasks like controlling a particular system.
It is a presentation for the Embedded System Basics. It will be very useful for the engineering students who need to know the basics of Embedded System.
This presentation discusses the internal architecture of Intel 8051. It discusses basic families of 8051, the programmer view, register sets and memory organiszation of 8051
This presentation gives an overview of the PIC micro-controllers. Additionally, it describes the advantages, disadvantages and applications of these micro-controllers. It also explains real-world projects that are possible using the PIC micro-controllers.
ARM (Advance RISC Machine) is one of the most licensed and thus widespread processor cores in the world.Used especially in portable devices due to low power consumption and reasonable performance.Several interesting extension available like THUMB instruction set and Jazelle Java Machine.
PIC-MICROCONTROLLER TUTORIALS FOR BEGINNERSVISHNU KP
PIC microcontroller programming based on micro c IDE.Those who really want to build a base in microcontroller programming,just keep going through this. ;) :)
Difference Between Microprocessors and Microcontrollerselprocus
A microprocessor is an electronic computer component crafted from miniature sized transistors & some other circuitry elements on a solitary semi-conductor IC (integrated circuit) or micro chip. Microcontroller is a computer on‐a‐chip optimized to manage electric gadgets. It is intended particularly for precise tasks like controlling a particular system.
It is a presentation for the Embedded System Basics. It will be very useful for the engineering students who need to know the basics of Embedded System.
This presentation discusses the internal architecture of Intel 8051. It discusses basic families of 8051, the programmer view, register sets and memory organiszation of 8051
This presentation gives an overview of the PIC micro-controllers. Additionally, it describes the advantages, disadvantages and applications of these micro-controllers. It also explains real-world projects that are possible using the PIC micro-controllers.
ARM (Advance RISC Machine) is one of the most licensed and thus widespread processor cores in the world.Used especially in portable devices due to low power consumption and reasonable performance.Several interesting extension available like THUMB instruction set and Jazelle Java Machine.
PIC-MICROCONTROLLER TUTORIALS FOR BEGINNERSVISHNU KP
PIC microcontroller programming based on micro c IDE.Those who really want to build a base in microcontroller programming,just keep going through this. ;) :)
This book guides the beginner to start up with Embedded C programming using MP LAB . This Book covers all interfacing examples with pic micro controller and guides beginners to develop projects on PIC micro controller
Design of FPGA based 8-bit RISC Controller IP core using VHDLAneesh Raveendran
This paper describes the design, development and
implementation of an 8-bit RISC controller IP core. The
controller has been designed using Very high speed integrated circuit Hardware Description Language (VHDL). The design constraints are speed, power and area. This controller is efficient for specific applications and suitable for small applications. This non-pipelined controller has four units: - Fetch, Decode, Execute and a stage control unit. It has an in built program and data memory. Also it has four ports for communicating with other I/O devices. A hierarchical approach has been used so that basic units can be modeled using behavioral programming. The basic
units are combined using structural programming. The design
has been implemented using ALTERA STRATIX II FPGA
Various processor architectures are described in this presentation. It could be useful for people working for h/w selection and processor identification.
What is Microcontroller, Microcontroller vs Microprocessor, Development/Classication of microcontrollers, Harvard vs. Princeton Architecture, RISC AND CISC CONTROLLERS
Features of RISC, Microcontroller for Embedded Systems
10 x86 PC Embedded Applications, Choosing a Microcontroller
Criteria for Choosing a Microcontroller, Mechatronics, and Microcontrollers, A brief history of the PIC microcontroller, PIC Microcontrollers, Feature: PIC16F877, Simplied Features.
GraphSummit Singapore | The Future of Agility: Supercharging Digital Transfor...Neo4j
Leonard Jayamohan, Partner & Generative AI Lead, Deloitte
This keynote will reveal how Deloitte leverages Neo4j’s graph power for groundbreaking digital twin solutions, achieving a staggering 100x performance boost. Discover the essential role knowledge graphs play in successful generative AI implementations. Plus, get an exclusive look at an innovative Neo4j + Generative AI solution Deloitte is developing in-house.
zkStudyClub - Reef: Fast Succinct Non-Interactive Zero-Knowledge Regex ProofsAlex Pruden
This paper presents Reef, a system for generating publicly verifiable succinct non-interactive zero-knowledge proofs that a committed document matches or does not match a regular expression. We describe applications such as proving the strength of passwords, the provenance of email despite redactions, the validity of oblivious DNS queries, and the existence of mutations in DNA. Reef supports the Perl Compatible Regular Expression syntax, including wildcards, alternation, ranges, capture groups, Kleene star, negations, and lookarounds. Reef introduces a new type of automata, Skipping Alternating Finite Automata (SAFA), that skips irrelevant parts of a document when producing proofs without undermining soundness, and instantiates SAFA with a lookup argument. Our experimental evaluation confirms that Reef can generate proofs for documents with 32M characters; the proofs are small and cheap to verify (under a second).
Paper: https://eprint.iacr.org/2023/1886
Why You Should Replace Windows 11 with Nitrux Linux 3.5.0 for enhanced perfor...SOFTTECHHUB
The choice of an operating system plays a pivotal role in shaping our computing experience. For decades, Microsoft's Windows has dominated the market, offering a familiar and widely adopted platform for personal and professional use. However, as technological advancements continue to push the boundaries of innovation, alternative operating systems have emerged, challenging the status quo and offering users a fresh perspective on computing.
One such alternative that has garnered significant attention and acclaim is Nitrux Linux 3.5.0, a sleek, powerful, and user-friendly Linux distribution that promises to redefine the way we interact with our devices. With its focus on performance, security, and customization, Nitrux Linux presents a compelling case for those seeking to break free from the constraints of proprietary software and embrace the freedom and flexibility of open-source computing.
How to Get CNIC Information System with Paksim Ga.pptxdanishmna97
Pakdata Cf is a groundbreaking system designed to streamline and facilitate access to CNIC information. This innovative platform leverages advanced technology to provide users with efficient and secure access to their CNIC details.
Dr. Sean Tan, Head of Data Science, Changi Airport Group
Discover how Changi Airport Group (CAG) leverages graph technologies and generative AI to revolutionize their search capabilities. This session delves into the unique search needs of CAG’s diverse passengers and customers, showcasing how graph data structures enhance the accuracy and relevance of AI-generated search results, mitigating the risk of “hallucinations” and improving the overall customer journey.
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
LF Energy Webinar: Electrical Grid Modelling and Simulation Through PowSyBl -...DanBrown980551
Do you want to learn how to model and simulate an electrical network from scratch in under an hour?
Then welcome to this PowSyBl workshop, hosted by Rte, the French Transmission System Operator (TSO)!
During the webinar, you will discover the PowSyBl ecosystem as well as handle and study an electrical network through an interactive Python notebook.
PowSyBl is an open source project hosted by LF Energy, which offers a comprehensive set of features for electrical grid modelling and simulation. Among other advanced features, PowSyBl provides:
- A fully editable and extendable library for grid component modelling;
- Visualization tools to display your network;
- Grid simulation tools, such as power flows, security analyses (with or without remedial actions) and sensitivity analyses;
The framework is mostly written in Java, with a Python binding so that Python developers can access PowSyBl functionalities as well.
What you will learn during the webinar:
- For beginners: discover PowSyBl's functionalities through a quick general presentation and the notebook, without needing any expert coding skills;
- For advanced developers: master the skills to efficiently apply PowSyBl functionalities to your real-world scenarios.
Sudheer Mechineni, Head of Application Frameworks, Standard Chartered Bank
Discover how Standard Chartered Bank harnessed the power of Neo4j to transform complex data access challenges into a dynamic, scalable graph database solution. This keynote will cover their journey from initial adoption to deploying a fully automated, enterprise-grade causal cluster, highlighting key strategies for modelling organisational changes and ensuring robust disaster recovery. Learn how these innovations have not only enhanced Standard Chartered Bank’s data infrastructure but also positioned them as pioneers in the banking sector’s adoption of graph technology.
Securing your Kubernetes cluster_ a step-by-step guide to success !KatiaHIMEUR1
Today, after several years of existence, an extremely active community and an ultra-dynamic ecosystem, Kubernetes has established itself as the de facto standard in container orchestration. Thanks to a wide range of managed services, it has never been so easy to set up a ready-to-use Kubernetes cluster.
However, this ease of use means that the subject of security in Kubernetes is often left for later, or even neglected. This exposes companies to significant risks.
In this talk, I'll show you step-by-step how to secure your Kubernetes cluster for greater peace of mind and reliability.
UiPath Test Automation using UiPath Test Suite series, part 6DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 6. In this session, we will cover Test Automation with generative AI and Open AI.
UiPath Test Automation with generative AI and Open AI webinar offers an in-depth exploration of leveraging cutting-edge technologies for test automation within the UiPath platform. Attendees will delve into the integration of generative AI, a test automation solution, with Open AI advanced natural language processing capabilities.
Throughout the session, participants will discover how this synergy empowers testers to automate repetitive tasks, enhance testing accuracy, and expedite the software testing life cycle. Topics covered include the seamless integration process, practical use cases, and the benefits of harnessing AI-driven automation for UiPath testing initiatives. By attending this webinar, testers, and automation professionals can gain valuable insights into harnessing the power of AI to optimize their test automation workflows within the UiPath ecosystem, ultimately driving efficiency and quality in software development processes.
What will you get from this session?
1. Insights into integrating generative AI.
2. Understanding how this integration enhances test automation within the UiPath platform
3. Practical demonstrations
4. Exploration of real-world use cases illustrating the benefits of AI-driven test automation for UiPath
Topics covered:
What is generative AI
Test Automation with generative AI and Open AI.
UiPath integration with generative AI
Speaker:
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
Essentials of Automations: The Art of Triggers and Actions in FMESafe Software
In this second installment of our Essentials of Automations webinar series, we’ll explore the landscape of triggers and actions, guiding you through the nuances of authoring and adapting workspaces for seamless automations. Gain an understanding of the full spectrum of triggers and actions available in FME, empowering you to enhance your workspaces for efficient automation.
We’ll kick things off by showcasing the most commonly used event-based triggers, introducing you to various automation workflows like manual triggers, schedules, directory watchers, and more. Plus, see how these elements play out in real scenarios.
Whether you’re tweaking your current setup or building from the ground up, this session will arm you with the tools and insights needed to transform your FME usage into a powerhouse of productivity. Join us to discover effective strategies that simplify complex processes, enhancing your productivity and transforming your data management practices with FME. Let’s turn complexity into clarity and make your workspaces work wonders!
GridMate - End to end testing is a critical piece to ensure quality and avoid...ThomasParaiso2
End to end testing is a critical piece to ensure quality and avoid regressions. In this session, we share our journey building an E2E testing pipeline for GridMate components (LWC and Aura) using Cypress, JSForce, FakerJS…
Communications Mining Series - Zero to Hero - Session 1DianaGray10
This session provides introduction to UiPath Communication Mining, importance and platform overview. You will acquire a good understand of the phases in Communication Mining as we go over the platform with you. Topics covered:
• Communication Mining Overview
• Why is it important?
• How can it help today’s business and the benefits
• Phases in Communication Mining
• Demo on Platform overview
• Q/A
Pushing the limits of ePRTC: 100ns holdover for 100 daysAdtran
At WSTS 2024, Alon Stern explored the topic of parametric holdover and explained how recent research findings can be implemented in real-world PNT networks to achieve 100 nanoseconds of accuracy for up to 100 days.
Climate Impact of Software Testing at Nordic Testing DaysKari Kakkonen
My slides at Nordic Testing Days 6.6.2024
Climate impact / sustainability of software testing discussed on the talk. ICT and testing must carry their part of global responsibility to help with the climat warming. We can minimize the carbon footprint but we can also have a carbon handprint, a positive impact on the climate. Quality characteristics can be added with sustainability, and then measured continuously. Test environments can be used less, and in smaller scale and on demand. Test techniques can be used in optimizing or minimizing number of tests. Test automation can be used to speed up testing.
2. Embedded Systems
What is Embedded System?
Embedded System is a combination of
software and hardware designed to perform a
specific task.
E.g. Washing Machine
Traffic Signal
Microwave Oven etc…
3. Application Areas Of Embedded
System
• Electronics Applications and Consumer Devices.
• Industrial Automation and Process Control.
• Access Control Systems.
• Security Systems.
• Robotics.
• Communications Applications.
• Automotive and Avionics Systems.
• Military and Aerospace Applications.
• Bio Medical Applications etc….
4. Processing Parts Of Embedded
System
1: Microprocessor (μp)
• Microprocessor is the Central Processing Unit.
• Microprocessor is, just simply, the processor .
• To make it to work it will need lots of external parts called
peripherals. I.e. Microprocessor don’t have inbuilt peripherals.
• Micro processor needs many external circuits to make it work. So
Microprocessor based system is called System On Board (SOB )
5. Processing Parts Of Embedded
System cont…
2: Microcontroller (μc )
• Microcontroller is the processing part in which all the essential
peripherals are integrated in a single chip
• Microcontroller = Microprocessor + Peripherals
• It can process as well as control.
• It includes all the necessary parts in one IC. So microcontroller
based system is called System On Chip (SOC)
7. Microchip’s PIC
• The name PIC referred to
"Peripheral Interface Controller"
• PIC is a family of Harvard Architecture microcontrollers
made by Microchip Technology.
Microchip Technology is an American manufacturer
of microcontroller, memory and analog semiconductors. The company
was founded in 1987.
For more details log on to www.microchip.com
• PICs are popular with developers and hobbyists alike.
8. Why PIC
• All the Peripherals are Integrated in a Single Chip
• Wide Range Available
• Cost Effective
• Easily Available
• High Speed
• High Performance RISC CPU
• Instruction Set Simplicity
• Wide Operating Voltage Range: 2.5 – 6 V
• Programmable Code Protection Mode
• Power Saving Sleep Mode
9. Device Structure - PIC
• Core
The essential part of the system.
• Peripherals
Peripherals are the features that add a differentiation from
microprocessors. This is the interfacing units to external world.
• Special features
Major purpose of special features are
► Decrease system cost.
► Increase system reliability.
► Increase design flexibility.
10. The PIC Family
• Based on Instruction Word Length PIC can be
classified into three.
Instruction Word Length = OPCODE+OPERAND
• Base Line (12 bit with 33 Instructions)
• Mid Range (14 bit with 35 Instructions)
• High End (16 bit with 58 / 77 Instructions)
11. Architectures …
1:Von Neumann Architecture
CPUCPU
Program Memory
&
Data Memory
• Used in: 80X86, 8051 etc…
• Only one bus between CPU and memory.
• Data memory and Program memory share the same bus
and the same memory, and so must have the same bit
width.
• Time of execution high.
8
12. Architectures …
2:Harvard Architecture
PICs use the Harvard Architecture
CPU
12
14
16
Data
Memory 8
Program
Memory
Used mostly in RISC CPUs.
Separate program bus and data bus: can be different widths.
Instructions can execute in a single cycle.
Time of execution is low.
13. Name the PIC
• Microchips Microcontroller name always Starts with PIC
• Then a Number which denotes the Type/Range of that PIC
• 12 : Base Line (12 bit Instruction Word)
• 16 : Mid Range (14 bit Instruction Word)
• 17/18 : High End (16 bit Instruction Word)
• Next is an Alphabet which denotes How We Can Program the PIC
• CR : PROM (OTP)
• C : PROM / EPROM
• F : FLASH
• Last is another Number varies from PIC to PIC which denotes the
internal memory, pin numbers, peripherals etc …
• 73 : 28 pin IC, 8 bit ADC, 4K PM etc…
• 873 : 28 pin IC, 10 bit ADC, 4K PM etc…
• 877 : 40pin IC, 10 bit ADC , 8K PM etc…
• 877 A : 40pin IC, 10 bit ADC , 8K PM, New Batch IC etc…
15. Instruction Set - PIC
• Only 35 instructions.
• RISC instruction architecture.
• In PIC, Accumulator is named as Working Register (w).
This is the base register of all operations.
• All operations are possible only through ‘w’
• Register to register transfer is not possible.
• The instruction set is highly orthogonal and is grouped
into three basic categories:
• Byte oriented instructions (18 nos).
• Bit oriented instructions (4 nos).
• Literal and control instructions (13 nos).
16. Instruction Set - PIC
1. Byte oriented instructions: (18 nos)
• CLRW - Clear working register.
• CLRF - Clear file register
• MOVFW - Move the contents of file register to working register.
• MOVWF - Move the contents of working register to file register.
• ADDWF - Add the contents of file register to working register.
• SUBWF - Subtract working register from the file register.
• ANDWF - Bit wise multiplication of working register with the file register.
• IORWF - Bit wise adding of working register with the file register.
• XORWF - Exclusive OR the contents of working register with the file reg:
• RLF - Rotate left with carry.
• RRF - Rotate right with carry.
• DECF - Decrement the file registers contents.
• DECFSZ - Decrement the contents of file register and skip the next
instruction if zero.
• INCF - Increment the file registers contents.
• INCFSZ - Increment the contents of file register and skip the next
instruction if zero.
• COMF - 1’s complement.
• SWAPF - Interchange the nibbles.
• NOP - No operation.
17. Instruction Set - PIC
2. Bit Oriented instructions: (4 nos)
• BCF - Bit clear flag.
• BSF - Bit set flag.
• BTFSC - Bit test file register and skip if clear.
• BTFSS - Bit test file register and skip if set.
18. Instruction Set - PIC
3. Literal and control instructions: (13 nos)
• MOVLW - Direct loading of working register.
• ADDLW - Direct adding of working register with a constant value.
• SUBLW - Direct subtraction of working register with a constant value.
• ANDLW - Bit wise multiplication of working register with a constant
value.
• IORLW - Bit wise addition of working register with a constant value.
• XORLW - Exclusive OR of working register with a constant value.
• CALL XX - Call subroutine XX.
• RETURN - Back to main program from the subroutine.
• GOTO XX - Go to xx.
• RETFIE - Return from interrupts.
• RETLW - Return with literal value.
• CLRWDT - Clear watchdog timer.
• SLEEP - Low power consumption mode.
19. Program Format
LIST P=PIC16F73 ;Listing the microcontroller
#INCLUDE“P16F73.INC” ;INC file
CBLOCK 0X20 ;GPR address starts from 0X20
•
• ;GPR Initialization
•
ENDC
ORG 0 ;Reset Vector
•
•
program
•
•
•
END ;Program End
20. Our First Program …
• Add the contents of two registers (R1 & R2) and store the result in
R3
LIST P=PIC16F73
#INCLUDE“P16F73.INC”
CBLOCK 0X20
R1
R2
R3
END C
ORG 0
MOVLW 0X02
MOVWF R1
MOVLW 0X03
MOVWF R2
ADDWF R1,0
MOVWF R3
END
21. Do it yourself …
• Subtract the contents of M1 from M2 and store
the result in Y1
• Multiply the contents of X1 with X2 and store
the result in X3.
23. MPLAB IDE …An Introduction
• MPLAB IDE is a software program that runs on a PC, to
develop applications for Microchip microcontrollers. It is
called an Integrated Development Environment, or IDE,
because it provides a single integrated “environment” to
develop code for PIC microcontrollers.
• You can download this software free of cost from
Microchip’s website. (www.microchip.com)
24. Most Commonly Used SFR s …
• STATUS
• OPTION_REG
• PORTA,B,C…. & TRIS A,B,C…
• ADCON0,ADCON1,ADRES
• TXSTA,RCSTA,TXREG,RCREG,SPBRG
• INTCON etc………..
25. That’s all with the software….
Lets have some Circuit Thoughts
29. Basic Circuit Requirements of PIC
2: Connect Oscillator (XTAL 4 or 20 MHz) to CLKI and
CLKO pins
Also connect two 22/33 pf capacitors with the crystal as
shown below for crystal stabilization.
35. Brief Project Lifecycle
• Requirement Study
• Initial Planning
• Prototype development
May again go to Requirement study
• Final Project Planning
Deadlines, Team/Recourses, Methods, Budget
• Development
Hardware and Software
• Testing and Debugging
May again go to Development
• Documentation
• Project Delivery
38. We can't solve problems by using the same kind of
thinking we used when we created them. So Think
Different (Albert Einstein)
I wish you all a very successful future….Take care
svmidhu@gmail.com