This document provides an introduction to PIC microcontrollers. It discusses the architecture of PIC microcontrollers, including the 16C6x and 16C7x architectures. It describes the registers, memory, and instruction set of PIC microcontrollers. Some key points covered include the Harvard architecture, pipelining, addressing modes, arithmetic, logical, and conditional instructions. Peripherals like timers and interrupts are also mentioned.

1. EE6008 MICROCONTROLLER BASED
SYSTEM DESIGN
MR.G.SIVAKUMAR AP/ECE
RAMCO INSTITUTE OF TECHNOLOGY
RAJAPALAYAM.

2. Introduction to PIC
Microcontroller

3. Introduction to PIC Microcontroller
• Introduction to PIC Microcontroller
• PIC 16C6x Architecture
• PIC16C7x Architecture
• PIC16Cxx–Pipelining
• Program Memory considerations
• Register File Structure
• Addressing modes
• Instruction Set
• Simple Operations

4. Why PIC has become popular ???
• Low cost
• Wide availability
• Large user base
• Easy of availability of its supporting hardware
and software tools like assemblers, debuggers
and simulators
• Re-programming with flash memory capability
• Easy to interface with other peripherals

5. PIC - Introduction
PIC- Peripheral Interface Controller
• Harvard architecture
• RISC Architecture
• Low end Architecture and Mid-range
Architecture
• Speed (20 Mhz) (0.2 microseconds)
• Watch dog timer
• Brown-out protection

6. PIC - Introduction
• Power on Reset
• ROM/OTP/EPROM/ROM/Flash
• 8 level stack
• Powerful output pin control
• Up to 12 independent interrupt sources
• Direct and Indirect addressing modes
• Timers
• Serial Programming

8. PIC 16C6x Architecture
• High performance RISC CPU
• 8 bit microcontroller
• Low cost, High performance, CMOS, fully static
microcontroller
• Only 35 single word instructions
• Interrupt capability
• Eight level deep hardware stack
• Direct and Indirect addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT)
• Oscillator Start-up Timer (OST)

9. PIC 16C6x Architecture
• Watchdog Timer (WDT)
• Programmable code-protection
• Power saving SLEEP mode
• Selectable oscillator options
• Low-power, high-speed CMOS EPROM/ROM
technology
• Fully static design
• Wide operating voltage range: 2.5V to 6.0V
• Commercial, Industrial, and Extended
temperature ranges
• Low-power consumption

10. PIC 16C6x Peripheral Features
• Three timers: Timer0, Timer1, Timer2
– Timer0 : 8-bit timer/counter with 8-bit prescaler
– Timer1 : 16-bit timer/counter with prescaler, can
be incremented during sleep via external
crystal/clock
– Timer2 : 8-bit timer/counter with 8-bit period
register, prescaler and postscaler
• Capture/Compare/PWM (CCP) module(s)
– Capture is 16-bit, max resolution is 12.5 ns
– Compare is 16-bit, max resolution is 200 ns
– PWM max resolution is 10-bit

11. PIC 16C6x Peripheral Features
• Synchronous Serial Port (SSP) with SPI and I2C
• Universal Synchronous Asynchronous Receiver
Transmitter (USART/SCI)
• Parallel Slave Port (PSP) 8-bits wide, with
external RD, WR and CS controls
• Brown-out detection circuitry for Brown-out
Reset (BOR)

12. Harvard Architecture and Pipelining
PIC 16C6x/7x family of microcontrollers use
Hardware architecture to achieve an fast
execution speed for a given clock.

13. BLOCK Diagram of PIC16C67

14. Block diagram of PIC 16C77 Microcontroller

15. PIC Registers
• W - Reg
• Status Register
• FSR – File Select Register
• INDF
• Program Counter
• PCL
• PCLATCH
• Eight Level Stack

16. PIC Registers
• Working Register:(W - Register)
– Working Register is a 8-bit register used by many
instructions as the source of an operand.
– It also serves as the destination for the result of
instruction execution and it is similar to
accumulator in other Microcontrollers and
Microprocessors.
– It is a 8-bit regarding.
ADDWF f, d

17. PIC Registers
• Status Register:
– It contains the arithmetic status of the ALU, the
RESET status and the bank select bits for the data
memory.

18. PIC Registers
• Status Register:
– C: Carry/borrow bit
– DC: Digit carry/borrow bit
– Z: Zero bit
– NOT_PD: Reset Status bit (Power-down mode bit)
– NOT_TO: Reset Status bit (tme- out bit)
– RPO: Register bank Select
– The bits 7 and 6 of Status Register are unused by
16c6x/7x.

19. PIC Registers
• The ‘C’ bit is set when two 8-bit operands are added
together and a 9-bit result occurs. This 9-bit is placed in
the carry bit.
• The DC or Digit carry bit indicates that a carry from the
lower 4 bits occurred during an 8-bit addition.
Example:
0011 1000
0011 1000
----------------
0111 0000
---------------
Here DC=1 as a result of the carry from the bit 3 to the
bit 4 position.

20. PIC Registers
• The Z or zero bits is affected by the execution
of arithmetic or logic instructions.
• The reset status bits NOT_TO and NOT_PD are
used in conjunction with PIC’s sleep mode.
The micro controller can put itself to sleep
mode to save power during intervals when it
has nothing to do. Upon reset the CPU can
check these two reset status bits to determine
which kind of event resettled it and then
respond accordingly.

21. PIC Registers
• The Register bank select bit RPO is used to
select either bank .
When RPO=0, select Bank 0,
RPO=1, select Bank 1.
• Example:
bcf STATUS, RPO //Select bank 0
bsf STATUS, RPO //Select bank 1.

22. PIC Registers
• FSR – (File Select Register):
– It is the pointer used for indirect addressing.
– In the indirect addressing mode the 8-bit register
file address is first written into FSR.
– It is a special purpose register that serves as an
address pointer to any address through out the
entire register file.
• INDF – (Indirect File):
– It is not a physical register addressing, this INDF
will cause indirect addressing.
– Any instruction using the INDF register actually
access the register pointed to by the FSR.

23. PIC Registers
• PCL:
– PCL is actually the lower 8-bits of the 13-bit program
counter.
– It can be read like any other register.
• PCLATH (Program Counter Latch):
– Upper bits of are not readable but are indirectly
writable .
– The upper 3-bits of PCLATH remains zero and serves no
purpose.
Progarm Counter :

24. Watch Dog Timer (WDT):
A Watch dog timer is a simple timer circuit
that performs a specific operation after a certain
period of time if something goes wrong.

25. Pipelining
• Overlapped movement of instruction to the processor is
called pipelining.

26. Pipelining

28. Program Memory Considerations
Program memory access for PIC parts having 2K of
program memory.
• PIC family uses 13-bit program counter allowing the
controllers to an 8k- program memory without changing the
CPU structure.

29. Program Memory Considerations
Program memory access for PIC parts having 4K of
program memory.

30. Program memory and Stack memory

31. Two addresses in the program memory address space are treated
in a special way by the CPU.
• When the CPU starts up from its reset state, its program
counter is automatically cleared to zero. with the content of
address H'000’being a go to Mainline instruction.
• The second special address H'004', is automatically loaded
into the program counter when an interrupt occurs.

32. Program Memory
Addressing Used by Subroutine calls :

33. Data Memory
The data memory of PIC 16F8XX is partitioned into multiple
banks which contain
• General purpose registers
• Special function Registers.(SFRs).
The bits RP1 and RP0 bits of the status register are used
to select these banks

35. Data Memory Considerations
PIC 16C63
PIC 16C65 A
PIC 16C73 A
PIC 16 C74 A
General Purpose
Register
BANK 0 BANK 1

36. Addressing Mode

37. Direct Addressing Mode
ADDWF FSR,0

38. Indirect Addressing Mode
ADDWF INDF

39. INSTRUCTION SET OF PIC

40. INSTRUCTION SET OF PIC
• Instruction set of PIC are divided into three
basic categories,
• Byte Oriented Instruction
• Bit Oriented Instruction
• Literal and Control Instruction

41. Byte Oriented Instruction (18 inst)
f: File Register (or RAM)
d: Destination
d=0: Destination  W
d=1: Destination  File
Register

42. Bit Oriented Instruction (4 Inst)
• f: Register File where the Bit is located
• b: Bit Field

43. Literal and Control Instruction (13 Inst)
• K: 8-bit constant

44. Classification of Instruction
• Instruction set of PIC are classified into
• Arithmetic Instruction
• Logical Instruction
• Increment/Decrement Instruction
• Data Transfer Instruction
• Clear Instruction
• Rotate Instruction
• Branch Instruction
• Miscellaneous Instructions

45. Arithmetic Instruction
 ADDWF
 ADDLW
 SUBWF
 SUBLW

46. ADDWF

47. ADDWF

48. ADDLW

49. ADDLW

50. SUBWF

51. SUBWF

52. SUBLW

53. SUBLW

54. Logical Instruction
 ANDWF
 ANDLW
 IORWF
 IORLW
 XORWF
 XORLW
 COMF

55. ANDWF

56. ANDWF

57. ANDLW

58. ANDLW

59. IORWF

60. IORWF

61. IORLW

62. IORLW

63. XORWF

64. XORWF

65. XORLW

66. XORLW

67. COMF

68. COMF

69. Increment/ Decrement Instruction
 INCF
 DECF

70. INCF

71. INCF

72. DECF

73. DECF

74. Data Transfer Instruction
 MOVF
 MOVWF
 MOVLW

75. MOVF

76. MOVF

77. MOVWF

78. MOVWF

79. MOVLW

80. MOVLW

81. Clear Instruction
 CLRF
 CLR W
 BCF
 BSF

82. CLRF

83. CLRF

84. CLR W

85. CLR W

86. BCF

87. BCF

88. BSF

89. BSF

90. Rotate Instruction
 RLF
 RRF
 SWAPF

91. RLF

92. RLF

93. RRF

94. RRF

95. SWAPF

96. SWAPF

97. Branch Instruction
 Branch Instructions are classified into
 Conditional Branch
 Unconditional Branch

98. Conditional Instruction
 BTFSC
 BTFSS
 DECFSZ
 INCFSZ

99. BTFSC

100. BTFSC

101. BTFSS

102. BTFSS

103. DECFSZ

104. DECFSZ

105. INCFSZ

106. INCFSZ

107. Unconditional Instruction
 CALL
 GOTO
 RETURN
 REETLW
 RETFIE

108. CALL

109. CALL

110. GOTO

111. RETURN

112. RETLW

113. REETLW

114. RETFIE

115. Miscellaneous Instruction
 SLEEP
 CLRWDT
 NOP

116. SLEEP
• Stop clock
• Reduce Power
• Wait for watchdog timer or external signal

117. CLRWDT
• If watchdog timer is enabled, this instruction
will reset it (before it resets the CPU)

118. NOP

119. NOP

120. Reference :
• Peatman,J.B., “Design with PIC Micro
Controllers”PearsonEducation,3rdEdition, 2004.
• Mazidi, M.A.,“PIC Microcontroller” Rollin Mckinlay,
Danny causey Printice Hall of India, 2007.