The document discusses different logic families used in integrated circuits. It describes the 7 main logic families: RTL, DTL, IIL, TTL, ECL, MOS, and CMOS. RTL and DTL are no longer used in new designs. TTL is a modified form of DTL using transistors instead of diodes. IIL, MOS are used in large scale integration. ECL is used for high speed operations. CMOS is used where low power is required. The document provides information on characteristics like fan-out, power dissipation, propagation delay, and noise margin for each logic family.

1. INTRODUCTION TO LOGIC FAMILIES What is a logic Family It is the way to describe the internal circuitry of the I.C. Types of logic Families We have 7 Basic Logic Families 1) RTL – Resistor Transistor Logic 2) DTL – Diode Transistor Logic 3) IIL – Integrated injection Logic 4) TTL – Transistor – Transistor Logic (Ex 7400 & 5400 Series) 5) ECL – Emitter Coupled Logic (Ex 10000 series) 6) MOS – Metal Oxide Semiconductor 7) CMOS – Complementary Metal Oxide Semiconductor (Ex. 4000 Series) Presentation By Anant Shrivastava (E.I. Fourth Sem)

2. RTL & DTL – Not used in new design But act as a useful starting point RTL was the first Commercial Family DTL is now Completely replaced by TTL TTL – It is a modified form of DTL it is formed by replacing each diode with a transistor Basic Gate is NAND IIL,MOS – Used in Large Scale Integration ECL – Used in High Speed Operations Basic Gate is NOR CMOS – Where power requirement is low Basic Gate is inverter Some Information on each Logic Family Presentation By Anant Shrivastava (E.I. Fourth Sem)

3. Characteristics Fan-out – Maximum number of standard load a gate can drive without disparity Power Dissipation – Power Required to operate the gate Expressed in mW. Propagation Delay – Time taken by the signal to propagate from input to output when a signal change occur Noise Margin – Maximum Noise voltage that can be added to circuit without unwanted effect on output (Two Types : - AC & DC Noise) Represented in V and represent max level Presentation By Anant Shrivastava (E.I. Fourth Sem)

4. Common Logic Levels Characteristic Table Presentation By Anant Shrivastava (E.I. Fourth Sem) 0 0 - 0.5 V DD V DD V DD = 3 – 10 CMOS -1.8 -1.9 – -1.6 -0.8 -0.95 – -0.7 V EE = -5.2 ECL 0.2 0 - 0.4 3.5 2.4 – 5 V cc = 5 TTL Typical Range Typical Range Low Level Voltage High Level Voltage Voltage Supply Family Type 3 25 0.1 50 CMOS 0.2 2 25 25 ECL 0.4 10 2 20 Low power Schottky TTL 0.4 3 22 10 Schottky TTL 0.4 10 10 10 TTL Noise Margin Propagation delay aPower Dissipation Fan-out Family