Types of memory in digital system

1. Siju George
Electrical & Electronics
LNCT, Bhopal

2.  A memory is just like a human brain. It is used to store
data and instruction. Computer memory is the storage
space in computer where data is to be processed and
instructions required for processing are stored.
 The memory is divided into large number of small
parts. Each part is called a cell. Each location or cell
has a unique address which varies from zero to
memory size minus one.
 For example if computer has 64k words, then this
memory unit has 64 * 1024 = 65536 memory location.
The address of these locations varies from 0 to 65535.
 Memory is the most essential element of a computing
system because without it computer can’t perform
simple tasks.

3. Memory is primarily of two types
 Internal Memory − cache memory and
primary/main memory
 External Memory − magnetic disk / optical disk etc.
or secondary memory

4. Memory Hierarchy

5. Characteristics of Memory Hierarchy are following when
we go from top to bottom.
 Capacity in terms of storage increases.
 Cost per bit of storage decreases.
 Frequency of access of the memory by the CPU
decreases.
 Access time by the CPU increases.

6. Primary memory is divided into two
 RAM
 ROM

7.  A RAM constitutes the internal memory of the CPU for
storing data, program and program result. It is read/write
memory. It is called random access memory (RAM).
 Since access time in RAM is independent of the address to
the word that is, each storage location inside the memory is
as easy to reach as other location & takes the same amount
of time. We can reach into the memory at random &
extremely fast but can also be quite expensive.
 RAM is volatile, i.e. data stored in it is lost when we switch
off the computer or if there is a power failure. Hence, a
backup uninterruptible power system (UPS) is often used
with computers. RAM is small, both in terms of its physical
size and in the amount of data it can hold.

8. RAM is of two types
 Static RAM (SRAM)
 Dynamic RAM (DRAM)

9. Static RAM(SRAM)
 The word static indicates that the memory retains its
contents as long as power remains applied. However, data
is lost when the power gets down due to volatile nature.
SRAM chips use a matrix of 6-transistors and no capacitors.
Transistors do not require power to prevent leakage, so
SRAM need not have to be refreshed on a regular basis.
 Because of the extra space in the matrix, SRAM uses more
chips than DRAM for the same amount of storage space,
thus making the manufacturing costs higher.
 Static RAM is used as cache memory needs to be very fast
and small.

10. Dynamic RAM(DRAM)
 DRAM, unlike SRAM, must be continually refreshed
in order for it to maintain the data. This is done by
placing the memory on a refresh circuit that rewrites
the data several hundred times per second. DRAM is
used for most system memory because it is cheap and
small. All DRAMs are made up of memory cells. These
cells are composed of one capacitor and one transistor.

11. Difference between DRAM and SRAM

12. Read-Only Memory(ROM)
 The memory from which we can only read but cannot
write on it. This type of memory is non-volatile. The
information is stored permanently in such memories
during manufacture.
 A ROM, stores such instruction as are required to start
computer when electricity is first turned on, this
operation is referred to as bootstrap. ROM chip are not
only used in the computer but also in other electronic
items like washing machine and microwave oven.

13. Types of ROM
MROM (Masked ROM)
 The very first ROMs were hard-wired devices that
contained a pre-programmed set of data or instructions.
These kind of ROMs are known as masked ROMs. It is
inexpensive ROM.
PROM (Programmable Read Only Memory)
 PROM is read-only memory that can be modified only once
by a user. The user buys a blank PROM and enters the
desired contents using a PROM programmer. Inside the
PROM chip there are small fuses which are burnt open
during programming. It can be programmed only once and
is not erasable.

14. EPROM (Erasable and Programmable Read Only Memory)
 The EPROM can be erased by exposing it to ultra-violet light for
a duration of upto 40 minutes. Usually, an EPROM eraser
achieves this function. During programming an electrical charge
is trapped in an insulated gate region. The charge is retained for
more than ten years because the charge has no leakage path. For
erasing this charge, ultra-violet light is passed through a quartz
crystal window (lid). This exposure to ultra-violet light dissipates
the charge. During normal use the quartz lid is sealed with a
sticker.
EEPROM (Electrically Erasable and Programmable Read Only
Memory)
 The EEPROM is programmed and erased electrically. It can be
erased and reprogrammed about ten thousand times. Both
erasing and programming take about 4 to 10 ms (millisecond). In
EEPROM, any location can be selectively erased and
programmed. EEPROMs can be erased one byte at a time, rather
than erasing the entire chip. Hence, the process of re-
programming is flexible but slow.

15. Classification on the basis of access
 Serial Access Memory
 Direct Access Memory
 Cache Memory

16.  Serial Access Memory
Sequential access means the system must search the storage
device from the beginning of the memory address until it finds
the required piece of data. Memory device which supports such
access is called a Sequential Access Memory or Serial Access
Memory. Magnetic tape is an example of serial access memory.
 Direct Access Memory
Direct access memory or Random Access Memory, refers to
conditions in which a system can go directly to the information
that the user wants. Memory device which supports such access
is called a Direct Access Memory. Magnetic disks, optical disks
are examples of direct access memory.
 Cache Memory
Cache memory is a very high speed semiconductor memory
which can speed up CPU. It acts as a buffer between the CPU and
main memory. It is used to hold those parts of data and program
which are most frequently used by CPU. The parts of data and
programs, are transferred from disk to cache memory by
operating system, from where CPU can access them.

17. Programmable Logic Device
Programmable Logic Devices PLDs are the integrated
circuits. They contain an array of AND gates & another
array of OR gates. There are three kinds of PLDs based
on the type of arrays, which has programmable feature.
 Programmable Read Only Memory
 Programmable Array Logic
 Programmable Logic Array
The process of entering the information into these devices is
known as programming. Basically, users can program these
devices or ICs electrically in order to implement the Boolean
functions based on the requirement. Here, the term
programming refers to hardware programming but not
software programming.

18. Programmable Read Only Memory
PROM
 Read Only Memory ROM is a memory device, which
stores the binary information permanently. That
means, we can’t change that stored information by any
means later. If the ROM has programmable feature,
then it is called as Programmable ROM PROM. The
user has the flexibility to program the binary
information electrically once by using PROM
programmer.
 PROM is a programmable logic device that has fixed
AND array & Programmable OR array.

19. The block diagram of PROM is shown in the following
figure.

20.  Here, the inputs of AND gates are not of programmable
type. So, we have to generate 2n product terms by using 2n
AND gates having n inputs each. We can implement these
product terms by using nx2n decoder. So, this decoder
generates ‘n’ min terms.
 Here, the inputs of OR gates are programmable. That
means, we can program any number of required product
terms, since all the outputs of AND gates are applied as
inputs to each OR gate. Therefore, the outputs of PROM
will be in the form of sum of min terms.
Example
 Let us implement the following Boolean functions using
PROM.
A(X,Y,Z)=∑m(5,6,7)
B(X,Y,Z)=∑m(3,5,6,7)

21.  The given two functions are in sum of min terms form and each
function is having three variables X, Y & Z. So, we require a 3 to 8
decoder and two programmable OR gates for producing these
two functions. The corresponding PROM is shown in the
following figure.

22.  Here, 3 to 8 decoder generates eight min terms. The
two programmable OR gates have the access of all
these min terms. But, only the required min terms are
programmed in order to produce the respective
Boolean functions by each OR gate. The symbol ‘X’ is
used for programmable connections.

23. Programmable Array Logic PAL
 PAL is a programmable logic device that has
Programmable AND array & fixed OR array. The
advantage of PAL is that we can generate only the
required product terms of Boolean function instead of
generating all the min terms by using programmable
AND gates.
Block Diagram of PAL

24.  Here, the inputs of AND gates are programmable. That
means each AND gate has both normal and complemented
inputs of variables. So, based on the requirement, we can
program any of those inputs. So, we can generate only the
required product terms by using these AND gates.
 Here, the inputs of OR gates are not of programmable type.
So, the number of inputs to each OR gate will be of fixed
type. Hence, apply those required product terms to each
OR gate as inputs. Therefore, the outputs of PAL will be in
the form of sum of products form.
Example
 Let us implement the following Boolean functions using
PAL.
A=XY+XZ′
B=XY′+YZ′

25.  The given two functions are in sum of products form. There are
two product terms present in each Boolean function. So, we
require four programmable AND gates & two fixed OR gates for
producing those two functions. The corresponding PAL is shown
in the following figure.

26.  The programmable AND gates have the access of
both normal and complemented inputs of variables. In
the above figure, the inputs X, X′, Y, Y′, Z & Z′, are
available at the inputs of each AND gate. So, program
only the required literals in order to generate one
product term by each AND gate. The symbol ‘X’ is
used for programmable connections.
 Here, the inputs of OR gates are of fixed type. So, the
necessary product terms are connected to inputs of
each OR gate. So that the OR gates produce the
respective Boolean functions. The symbol ‘.’ is used for
fixed connections.

27. Programmable Logic Array PLA
PLA is a programmable logic device that has both
Programmable AND array & Programmable OR array.
Hence, it is the most flexible PLD
Block Diagram of PLA

28.  Here, the inputs of AND gates are programmable. That
means each AND gate has both normal and complemented
inputs of variables. So, based on the requirement, we can
program any of those inputs. So, we can generate only the
required product terms by using these AND gates.
 Here, the inputs of OR gates are also programmable. So, we
can program any number of required product terms, since
all the outputs of AND gates are applied as inputs to each
OR gate. Therefore, the outputs of PAL will be in the form
of sum of products form.
Example
 Let us implement the following Boolean functions using
PLA.
A=XY+XZ′
B=XY′+YZ+XZ′

29.  The given two functions are in sum of products form.
The number of product terms present in the given
Boolean functions A & B are two and three
respectively. One product term, Z′X is common in each
function.
 So, we require four programmable AND gates & two
programmable OR gates for producing those two
functions. The corresponding PLA is shown in the
following figure.
contu…..

30. PLA logic diagram

31.  The programmable AND gates have the access of
both normal and complemented inputs of variables. In
the above figure, the inputs X, X′, Y, Y′, Z & Z′, are
available at the inputs of each AND gate. So, program
only the required literals in order to generate one
product term by each AND gate.
 All these product terms are available at the inputs of
each programmable OR gate. But, only program the
required product terms in order to produce the
respective Boolean functions by each OR gate. The
symbol ‘X’ is used for programmable connections.

32. FPGA(Field Programmable Gate
Array)
 The Field Programmable Gate Array, or FPGA is a
programmable logic device that can have its internal
configuration set by software or as it is termed,
“firmware.” This enables the FPGA functionality to be
updated or even totally changed as required, because
the FPGA firmware is updated when it is in circuit.
 The FPGA programmable logic components, or logic
blocks as they are known, may consist of anything
from logic gates, through to memory elements or
blocks of memories, or almost any element. This
provides a considerable degree of flexibility.

33.  The great advantage of the FPGA is that the chip is
completely programmable and can be re-programmed.
In this way it becomes a large logic circuit that can be
configured according to a design, but if changes are
required it can be re-programmed with an update.
 Thus if circuit card or board is manufactured and
contains an FPGA as part of the circuit, this is
programmed during the manufacturing process, but
can later be re-programmed to reflect any changes.
Thus it is programmable in the field, and in fact this
gives rise to its name.

34.  It contains ten thousand to more than a million logic gates
with programmable interconnection. Programmable
interconnections are available for users or designers to
perform given functions easily. A typical model FPGA chip
is shown in the given figure. There are I/O blocks, which
are designed and numbered according to function. For
each module of logic level composition, there are CLB’s
(Configurable Logic Blocks).
 CLB performs the logic operation given to the module. The
inter connection between CLB and I/O blocks are made
with the help of horizontal routing channels, vertical
routing channels and PSM (Programmable Multiplexers).
 The number of CLB it contains only decides the complexity
of FPGA. The functionality of CLB’s and PSM are designed
by VHDL or any other hardware descriptive language. After
programming, CLB and PSM are placed on chip and
connected with each other with routing channels.

35. Typical FPGA chip model