Floating Point Addition.pptx
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This document describes the floating point addition algorithm and provides two examples of performing floating point addition in binary. The algorithm involves 4 steps: 1) Convert the numbers to normalized binary, 2) Compare the exponents and match the larger one, 3) Add the significant bits, and 4) Normalize and round the sum if needed. The examples show applying this algorithm to add 0.5 and 0.4375, yielding 0.9375, and to add 10.01101 x 21 and 0.00101101 x 22, yielding 1.01100001 x 22.
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The document discusses the data path and control unit for different types of instructions in a CPU. It describes three main types of instructions - memory reference using load and store instructions like lw and sw, arithmetic/logical instructions like add and sub, and branch instructions like beq. It then provides examples of each type of instruction and illustrates the simple data path used to process R-type, load/store, and branch instructions respectively.
1. Introduction to Datapath Design.pptx
The document discusses the processor unit and its components. It describes the different types of instructions like memory reference, arithmetic logical, and branch/jump. The key components of a datapath include a program counter, instruction memory, adder, register file, ALU, data memory, and multiplexers. Memory reference instructions use the adder, arithmetic instructions use the ALU, and branch instructions use a subtractor to evaluate the branch condition. A branch datapath also includes a separate adder to compute the branch target.
Floating Point Represenataion.pptx
The document discusses binary floating point representation in IEEE 754 format. It explains the components of a floating point number, including the sign bit, mantissa/fraction, and exponent. It provides examples of single and double precision representations. Finally, it briefly introduces the IEEE 754 half precision format which uses 16 bits with a 5 bit exponent and 10 bit mantissa.
Refined Version of Division.pptx
This document describes an improved version of the division algorithm for unsigned binary division. It presents the steps to divide 7 by 3 as an example, showing the divisor, remainder, and operations at each step. The improved algorithm shifts and restores the remainder at each step rather than just subtracting the divisor. In the end, it correctly calculates a quotient of 2 and remainder of 1, matching 7 divided by 3.
Version 1 Division.pptx
The document describes version 1 of a binary division algorithm. It provides an example of using the algorithm to calculate the quotient and remainder of 7 divided by 3 in binary. The algorithm works by repeatedly subtracting the divisor from the remainder, shifting the quotient left by 1 bit and shifting the divisor right by 1 bit until the remainder is smaller than the divisor. For the example calculation, the quotient is calculated to be 2 and the remainder is 1.
BOOTH’s ALGORITHM Part 1.pptx
Booth's algorithm is a method for multiplying two binary numbers, including positive and negative numbers, by recoding the multiplier into {-1, 0, +1} and then multiplying the multiplicand by the recoded bits. For example, to multiply the positive numbers +13 and +7 in binary, the document shows recoding +7 as 0+1-1, multiplying +13 by each recoded bit, and adding the results to get the product of 91. The algorithm was created by Andrew Booth to speed up multiplication on early calculators.
2. Addition and Subtraction.pptx
The document discusses addition and subtraction operations in MIPS and overflow. It provides examples of addition and subtraction for both unsigned and signed integers. For unsigned integers, overflow occurs when the result is larger than the maximum value that can be represented. For signed integers in sign-magnitude format, overflow occurs when subtraction results in a number outside the range of the available bits. The document contains examples of calculations and determines whether overflow, underflow, or neither occurs.
1. Introduction to Arithmetic.pptx
The document discusses different numeric representation formats including fixed point, floating point, signed magnitude, one's complement, and two's complement. It provides examples of how fixed point and floating point numbers are represented and describes the process for converting positive and negative numbers to their one's and two's complement representations. Two's complement representation allows positive and negative numbers to be treated together and uses a single representation for zero.
6.Performance.pptx
This document discusses performance metrics for computing systems including response time, throughput, relative performance, CPU execution time, CPU time, and power dissipation. It defines CPU time as the sum of user CPU time and system CPU time. It also provides an equation for dynamic power dissipation that is proportional to the capacitance, voltage squared, and frequency of a computing system.
5. Addressing Modes.pptx
The document discusses different addressing modes in MIPS architecture including immediate, register, base/displacement, PC-relative, and pseudo direct addressing modes. It provides examples of instructions that use each addressing mode and describes how the effective address is calculated for each mode. The document also includes an example MIPS program and its hexadecimal object code.
3. Instruction Set.pptx
The document provides instructions on MIPS architecture and assembly language programming, including details about registers, instruction types such as arithmetic, data transfer, logical and branch instructions, and examples of how to write MIPS assembly code to perform operations like addition, subtraction, loading/storing data, and conditional branching. It also describes common instruction formats and how different instructions are used to implement an example program that performs an arithmetic calculation and stores the result conditionally based on two values being equal or not.
2. Eight Great Ideas.pptx
The document outlines eight great ideas of computer architecture: 1) Design for Moore's Law to continuously double transistors every two years, 2) Use abstraction to simplify designs, 3) Make common cases fast, 4) Achieve performance via parallelism, 5) Use pipelining for performance, 6) Leverage prediction for performance, 7) Implement a memory hierarchy, and 8) Ensure dependability through redundancy.
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TIME DIVISION MULTIPLEXING TECHNIQUE FOR COMMUNICATION SYSTEM
Time Division Multiplexing (TDM) is a method of transmitting multiple signals over a single communication channel by dividing the signal into many segments, each having a very short duration of time. These time slots are then allocated to different data streams, allowing multiple signals to share the same transmission medium efficiently. TDM is widely used in telecommunications and data communication systems.
### How TDM Works
1. **Time Slots Allocation**: The core principle of TDM is to assign distinct time slots to each signal. During each time slot, the respective signal is transmitted, and then the process repeats cyclically. For example, if there are four signals to be transmitted, the TDM cycle will divide time into four slots, each assigned to one signal.
2. **Synchronization**: Synchronization is crucial in TDM systems to ensure that the signals are correctly aligned with their respective time slots. Both the transmitter and receiver must be synchronized to avoid any overlap or loss of data. This synchronization is typically maintained by a clock signal that ensures time slots are accurately aligned.
3. **Frame Structure**: TDM data is organized into frames, where each frame consists of a set of time slots. Each frame is repeated at regular intervals, ensuring continuous transmission of data streams. The frame structure helps in managing the data streams and maintaining the synchronization between the transmitter and receiver.
4. **Multiplexer and Demultiplexer**: At the transmitting end, a multiplexer combines multiple input signals into a single composite signal by assigning each signal to a specific time slot. At the receiving end, a demultiplexer separates the composite signal back into individual signals based on their respective time slots.
### Types of TDM
1. **Synchronous TDM**: In synchronous TDM, time slots are pre-assigned to each signal, regardless of whether the signal has data to transmit or not. This can lead to inefficiencies if some time slots remain empty due to the absence of data.
2. **Asynchronous TDM (or Statistical TDM)**: Asynchronous TDM addresses the inefficiencies of synchronous TDM by allocating time slots dynamically based on the presence of data. Time slots are assigned only when there is data to transmit, which optimizes the use of the communication channel.
### Applications of TDM
- **Telecommunications**: TDM is extensively used in telecommunication systems, such as in T1 and E1 lines, where multiple telephone calls are transmitted over a single line by assigning each call to a specific time slot.
- **Digital Audio and Video Broadcasting**: TDM is used in broadcasting systems to transmit multiple audio or video streams over a single channel, ensuring efficient use of bandwidth.
- **Computer Networks**: TDM is used in network protocols and systems to manage the transmission of data from multiple sources over a single network medium.
### Advantages of TDM
- **Efficient Use of Bandwidth**: TDM all
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Floating Point Addition.pptx
- 1. FLOATING POINT ADDITION Mr. C.KARTHIKEYAN, ASSISTANT PROFESSOR, ECE , RMKCET
- 2. FLOATING POINT ADDITION ALGORITHM Step 0: Convert the numbers in Normalized Binary Step 1: Compare the exponents and match it with the larger exponent Step 2: Add the significant bits Step 3: Normalize the sum Step 4: Round the significant bits if there is no overflow
- 3. EXAMPLE 1 Perform addition of the numbers 0.5ten and 0.4375ten in binary using the floating point addition algorithm Step 0: Convert to Normalized Binary Binary Representation 0.5 x 2 = 1.0 1 0.75 x 2 = 1.50 1 0.50 x 2 = 1.00 1 0.875 x 2 = 1.75 1 0.4375 x 2 = 0.875 0 Binary Representation 0.510 = 0.12 0.437510 = 0.01112 1.000 x 2-1 1.110 x 2-2
- 4. EXAMPLE 1 Perform addition of the numbers 0.5ten and 0.4375ten in binary using the floating point addition algorithm Step 1: Exponent Comparison 1.000 x 2-1 1.110 x 2-2 1.000 x 2-1 1.110 x 2-2 1.000 x 2-1 0.111 x 2-1
- 5. EXAMPLE 1 Perform addition of the numbers 0.5ten and 0.4375ten in binary using the floating point addition algorithm Step 2: Addition 1.000 x 2-1 0.111 x 2-1 1.000 0.111 (+) 1.111 1.111 x 2-1
- 6. EXAMPLE 1 Perform addition of the numbers 0.5ten and 0.4375ten in binary using the floating point addition algorithm Step 3: Normalization 1.111 x 2-1 1.111 x 2-1 (-1)S x 1.F x 2E
- 7. EXAMPLE 1 Perform addition of the numbers 0.5ten and 0.4375ten in binary using the floating point addition algorithm Step 4: Rounding 1.111 x 2-1 G R S Rounding Action 0 0 0 Truncate 0 0 1 Truncate 0 1 0 Truncate 0 1 1 Truncate 1 0 0 Round to Even 1 0 1 Round Up 1 1 0 Round Up 1 1 1 Round Up
- 8. EXAMPLE 1 Perform addition of the numbers 0.5ten and 0.4375ten in binary using the floating point addition algorithm Final Answer 1.111 x 2-1 = 0.1111 0.937510
- 9. EXAMPLE 2 Perform addition of the numbers 10.01101 x 21 and 0.00101101 x 22 in binary using the floating point addition algorithm Step 0: Convert to Normalized Binary 10.01101 x 21 0.00101101 x 22 1.001101 x 22 1.01101 x 2-1
- 10. EXAMPLE 2 Perform addition of the numbers 10.01101 x 21 and 0.00101101 x 22 in binary using the floating point addition algorithm 1.001101 x 22 1.01101 x 2-1 Step 1: Exponent Comparison 0.00101101 x 22
- 11. EXAMPLE 2 Perform addition of the numbers 10.01101 x 21 and 0.00101101 x 22 in binary using the floating point addition algorithm 1.001101 x 22 0.00101101 x 22 Step 2: Addition 1.001101 0.00101101 (+) 1.01100001 1.01100001 x 22
- 12. EXAMPLE 2 Perform addition of the numbers 10.01101 x 21 and 0.00101101 x 22 in binary using the floating point addition algorithm Step 3: Normalization 1.01100001 x 22
- 13. EXAMPLE 2 Perform addition of the numbers 10.01101 x 21 and 0.00101101 x 22 in binary using the floating point addition algorithm Step 4: Rounding 1.01100001 x 22 G R S Rounding Action 0 0 0 Truncate 0 0 1 Truncate 0 1 0 Truncate 0 1 1 Truncate 1 0 0 Round to Even 1 0 1 Round Up 1 1 0 Round Up 1 1 1 Round Up 1.01100001 x 22 GUARD BIT(G) ROUND BIT(R) STICKY BITS (S) 1.011 x 22