UNIT 2 -FLOATING POINT

1. MIPS FLOATING POINT
REPRESENTATION
Mr. C.KARTHIKEYAN,
ASSISTANT PROFESSOR,
ECE , RMKCET

2. BINARY FLOATING POINT REPRESENTATION
(-1)S x 1.F x 2E
Normalized Floating Point Number
s = Sign Bit ( 0 for +ve and 1 for –ve)
F = Fraction / Mantissa
E = Exponent
Eg: +1.01010011 x 2-7
s = 0
F = 01010011
E = -7

3. BINARY FLOATING POINT REPRESENTATION
(-1)S x 1.F x 2E
Normalized Floating Point Number
s = Sign Bit ( 0 for +ve and 1 for –ve)
F = Fraction / Mantissa
E = Exponent
Eg: -1.11010 x 25
s = 1
F = 11010
E = 5

4. IEEE 754 BINARY FLOATING POINT
REPRESENTATION
Single Precision Representation Double Precision Representation
A floating-point value represented in a single 32-bit word. A floating-point value represented in two 32-bitwords.
31 30……......23 22……………………………….0
S E’ Fraction
63 62……......52 51……………………………….0
S E’ Fraction
E’ = E + 127 E’ = E + 1023
1 8 23 1 11 52

5. EXAMPLE 1
Show the IEEE 754 binary representation of the number -0.7510 in single precision
Binary Representation
0.75 x 2 = 1.50 1
0.50 x 2 = 1.00 1
-0.75 = -0.11
Normalization
-0.11 = -1.1 x 2-1
(-1)S x 1.F x 2E s = 1, F = 1, E = -1, E’ = E + 127 = -1 + 127 = 126
31 30……......23 22……………………………….0
1 111 1110
1 8 23
0 1000 0000 0000 0000 0000 000

6. EXAMPLE 1
Show the IEEE 754 binary representation of the number -0.7510 in Double precision
Binary Representation
0.75 x 2 = 1.50 1
0.50 x 2 = 1.00 1
-0.75 = -0.11
Normalization
-0.11 = -1.1 x 2-1
(-1)S x 1.F x 2E s = 1, F = 1, E = -1, E’ = E + 1023 = -1 + 1023 = 1022
63 62……......52 51……………………………….0
1 111 1111 110
1 11 52
0
1000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
0000 0000

7. EXAMPLE 2
Show the IEEE 754 binary representation of the number +0.6010 in single
precision
+0.6 = +0.1001
Normalization
+0.6 = +1.0011001 x 2-1
(-1)S x 1.F x 2E s = 0, F = 0011001, E = -1
E’ = E + 127 = -1 + 127 = 126
31 30……......23 22……………………………….0
0 111 1110
1 8 23
0 001 1001 1001 1001 1001 1001 1001 1001
0.40 x 2 = 0.80 0
0.80 x 2 = 1.60 1
0.60 x 2 = 1.20 1
0.20 x 2 = 0.40 0
0.20 x 2 = 0.40 0
0.60 x 2 = 1.20 1
Binary Representation
. . . .
. .
001 1001 1001 1001 1001 1010
G R S
Rounding
Action
0 0 0 Truncate
0 0 1 Truncate
0 1 0 Truncate
0 1 1 Truncate
1 0 0 Round to Even
1 0 1 Round Up
1 1 0 Round Up
1 1 1 Round Up

8. OTHER IEEE 754 BINARY
FLOATING POINT REPRESENTATION
Half Precision Representation
A floating-point value represented in a 16-bit half word.
15 14……......10 9……………………………….0
S E’ Fraction
E’ = E + 15
1 5 10

9. IEEE 754-2008 contains a half precision that is only 16 bits wide. The left most bit is still the sign bit, the
exponent is 5 bits wide and has a bias of 15, and the mantissa is 10 bits long. A hidden 1 is assumed. Write
down the bit pattern to represent 1.5625 x 10-1 assuming a version of this format, which uses an excess-16
format to store the exponent.
0.6250 x 2 = 1.250 1
0.250 x 2 = 0.50 0
0.31250 x 2 = 0.6250 0
0.15625 x 2 = 0.31250 0
Binary Representation
0.15625 = +0.00101
1.5625 x 10-1 = 0.15625
0.50 x 2 = 1.00 1
(-1)S x 1.F x 2E s = 0, F = 01, E = -3,
E’ = E + 15 = -3 + 15 = 12
15 14……......10 9……………….0
0 1100
1 5 10
0 01 0000 0000
+1.01 x 2-3
Computer Organization and Design by David A Patterson – Page no. 239
+1.01 x 2-3