Digital electronic systems have evolved from transistors to programmable logic devices like PLDs, PALs, GALs, CPLDs, and FPGAs. The first transistor was invented in 1947. PROMs were developed in 1970 and allowed for one-time programming. PLDs like PLA and PAL introduced in the 1970s-1980s provided more flexibility but were slower. CPLDs combined logic blocks in an array, while FPGAs arranged logic blocks in a grid, further improving speed and flexibility through reconfigurability. FPGAs are now widely used for applications requiring field programmability.

2. Outline

3. Introducion
Digital Electronic Systems
 Memory, Microprocessors and Logic devices .

4. 1970 Transistors PLDs
The first transistor PROM :1970
developed at Bell PLA:1975 Ron Cline from Signetics
laboratories by PAL:1978 by John Birkner
William Shockley, and H.T Chua
John Bardeen and of Monolithic Memories
Walter Brattain. GAL: 1980 by Lattice
CPLDs :1980
1947 ICs FPGAs
The first silicon chip , Xilinx co-founder
was invented by Jack Ross Freeman
Kilby and Robert Noyce and Bernard Vondershmitt
1960
1970
1985

6. • Allow user to store code in the device using a standard PROM
programmer.
• PROM can be programmed only once using anti-fuse technology.
• They are usually slow , consume more power and expensive .
Fixed
AND
Array
Programmable
OR
Array
Inputs Outputs
.
.
.

7. • PLA became available to address the speed and input limitations
imposed by the PROM .
• Used to implement Boolean functions after being simplified .
• Its architecture was very flexible but slow and hard to configure.
Programmable
AND
Array
Programmable
OR
Array
Inputs Outputs.
.
.

8. • They are faster, less expensive and less flexible .
• Registered and non-registered PALs were available , depending
on the presence or absence of flip-flop at the output .
Programmable
AND
Array
Fixed
OR
Array
Inputs Outputs.
.
.

9. • GAL devices used macocells at the output instead of flip-flops .
• Macrocells consists of flip-flop ,gates and multiplexers.
• They allow output selection and each output is programmable as
combinational or registered .

11. • In theory, we could keep adding LABs to a CPLD to continue the increase of
available logic. However, the extra routing required in the PIA for routing between
all these LABs increases exponentially until the amount of routing overtakes the
amount of actual logic.

12. • Instead of surrounding the PIA with logic blocks ,XILINX came up
with a new arrangement of LABs which is a grid or as the name
implies an Array .

13. A field-programmable gate array (FPGA) is an integrated
circuit designed to be configured by a customer or a
designer after manufacturing , hence "field-programmable".

14. IOE or IOB
LAB or CLB

15. Interconnect
switches
LAB
Local
interconnect
10 to 16 LEs
• 4-input LUT
• Carry chain
• FF
Set of 2:1
MUXs
functioning as
𝟐 𝟒:1 MUX
+ LAB control signals
+ LE carry chain
+ register chain
IOE
Remark:
In high
performance
FPGas we have
adaptive logic
module instead of
logic element,
Its internal
structure is more
sophisticated
including full
adders …

16. FPGA Design Flow
 Schematic
entry
 HDL
• Behavioral
simulation
• Functional
simulation
• Static timing
analysis
• Translate : netlist logic design file
• Map: whole circuit sub blocks
• Place and route : sub blocks logic blocks in
FPGA
Synthesis :
HDL netlist(gate
level design)

17. Applications of FPGA
 The applications of FPGAs within system design has
certainly changed over the years