Part I:
             Broad Impact of Electrostatic 
              Discharge (ESD) on Product 
              Discharge (ESD) on Product
                 Q
                 Quality and Reliability
                       y               y
                           Ted Dangelmayer
                             Š2011 ASQ & Presentation Ted
                             Presented live on Jul  06th, 2011




http://reliabilitycalendar.org/The_Re
liability_Calendar/Short_Courses/Sh
liability Calendar/Short Courses/Sh
ort_Courses.html
ASQ Reliability Division 
                 ASQ Reliability Division
                  Short Course Series
                  Short Course Series
                     The ASQ Reliability Division is pleased to 
                     present a regular series of short courses 
                   featuring leading international practitioners, 
                           academics, and consultants.
                           academics and consultants

                  The goal is to provide a forum for the basic and 
                  The goal is to provide a forum for the basic and
                        continuing education of reliability 
                                    professionals.




http://reliabilitycalendar.org/The_Re
liability_Calendar/Short_Courses/Sh
liability Calendar/Short Courses/Sh
ort_Courses.html
Part I:
    Broad Impact of Electrostatic Discharge (ESD)
         on Product Quality and Reliability




Professional Services Only
    No Product Sales!

•  Client Locations            Ted Dangelmayer
                             www.dangelmayer.com
Outline



•  ESD – A Surprisingly Dominant Failure Mechanism
•  ESD Sensitivity Trend
•  HBM & CDM Review
•  Failures Beyond Device Level
•  ESD Countermeasures - Overview




                                          p2
Copyright Š 2011 Dangelmayer Associates
Typical IC Device Defect Analysis

   350
                  ~20% - ESD
   300
                             ~10% to 80% - ESD(CDE/CBE)
   250

   200

   150

   100
                                              100% - ESD
    50

     0
         NTF      EOS      FAB     Asmbly   Test   ESD


Copyright Š 2011 Dangelmayer Associates
ESD Damage:
A Surprisingly Dominant Failure Mechanism!

                      After EOS Misdiagnosis Adjustment:
                      ESD: #1 Assignable Cause of IC Failure!




Copyright Š 2011 Dangelmayer Associates
ESD Sensitivity Trends




                                          p5
Copyright Š 2011 Dangelmayer Associates
ESDA Technology Roadmap
             HBM Roadmap (Min-Max)
     6kV




     4kV




     2kV


     1kV
                         ESD Control Methods
     0V
           1978   1983      1988     1993      1998   2003   2008   2013

      ESD Control is becoming increasingly critical!

                                                             p6
Copyright Š 2011 Dangelmayer Associates
ESDA Technology Roadmap
                CDM Roadmap (Min-Max)
      1000V




      750V


      500V


      250V

      125V
                            ESD Control Methods
       0V
              1978   1983      1988     1993      1998   2003        2008   2013

        ESD Control is becoming increasingly critical!

                                                                p7
Copyright Š 2011 Dangelmayer Associates
HBM & CDM Review




Copyright Š 2011 Dangelmayer Associates
Human Body Model
                                                          When the air breaks
                                                          down between the
                                                          human s finger and
                                                          an IC pin, charge is
                                                          suddenly
                                                          transferred from the
                                                          person via the
                                                          grounded pin of the
                                                          IC to ground.




                Charged Person                   Device
HBM

                                                                   Ground
      Copyright Š 2011 Dangelmayer Charge Flow
                                   Associates
Charged Device Model
                    99% of ESD Failures are CDM!
    Andrew Olney, Analog Devices, Quality Director & Industry Council




                                           Conductive Surface



       Capacitance of
          Device                     Device               Contact Resistance



                   Q                Charge
CDM Video                            Flow
                                                                 Ground
     Copyright Š 2011 Dangelmayer Associates
HBM




CDM




 Copyright Š 2011 Dangelmayer Associates
Case Study
     Circuit Board Class 0 Device

•  15 Volt CDM & HBM                Circuit Pack Production Yield
   Withstand Voltage                           Losses
•  100% Failure Rate:
   Some Lots
•  $1.2B Sales Jeopardy
•  $1K Invested in Shunt
•  $6.2M/yr Savings
   Documented


                                                  p12
  Copyright Š 2011 Dangelmayer Associates
CDM Threshold Dependencies
                    Larger Device Package Size




Higher
Operating
Speeds




                                                      p13
  Copyright Š 2011 Dangelmayer Associates Ref: Industry Council WPII 2009
ESD Failures Beyond Device Level
       •  Charged Board Event (CBE)
       •  Cable Discharged Event (CDE)
       •  Transient Latch-Up (TLU)
       •  MEMS
       •  MR Heads
       •  Automated Handling Equipment
       •  Wafers
       •  Flat Panels
       •  Handheld Devices
       •  System-Level
           •  Hard Failures (Device Damage)
           •  Recoverable Malfunction (Transient Latch-up)

Copyright Š 2011 Dangelmayer Associates
Charged Board Event (CBE)




Photograph courtesy: Andrew Olney, Quality Director, Analog Devices
   Copyright Š 2011 Dangelmayer Associates
CBE ESD Damage - A New Discovery!
         Most FA Experts Misdiagnose as EOS!!!!
  Up to 50% of EOS Failures are CBE ESD! (2008)




        CDM Device Damage                                    CBE (ESD)
                                                    Device Damage on Circuit Board

Courtesy: Andrew Olney, Quality Director, Analog Devices
   Copyright Š 2011 Dangelmayer Associates
CBE vs. CDM Discharge
                                      Waveform Comparison
                                  FICBM vs. FICDM Discharge Waveforms
                                                   (250 V) Voltage
                                    for DSP with a 250V Charge
                      10
                                                                  GND test pad FICBM
Peak Current (Amps)




                      8
                                                                  GND pin FICDM
                      6

                      4
                      2

                      0

                      -2
                           0.00



                                   0.25



                                            0.50



                                                         0.75



                                                                  1.00



                                                                            1.25



                                                                                       1.50
                                                   Time (nanoseconds)

                       Courtesy: Andrew Olney, Quality Director, Analog Devices

        Copyright Š 2011 Dangelmayer Associates
Faceplate Field- Induced CBE Failure

        Established Code - New Faceplate Supplier
         40% Failure Rate - 1.5KV CDM Threshold




                                                  Ref: ESD Program
                                                   Management, 2nd
                                                   edition, pp59-61


 Copyright Š 2011 Dangelmayer Associates
Cable Discharge Events (CDE)



Charge On Cables
Can Cause
Equipment Damage
Or Malfunctions




                                            19
  Copyright Š 2011 Dangelmayer Associates
System Level Testing & Latch-Up
•    Some tests can trigger latch-up in
     ICs
      •  IEC 61000-4-2, 4 and 5
      •  Cable Discharge Events (CDE)
•    …even though they pass IC level
     latch-up testing (JEDEC Std 78)
•    JEDEC Std 78 lacks a fast rising
     edge pulse
•    Most field latch-up problems are
     due to transients
•    Supplement with a transient latch-
     up test




Copyright Š 2011 Dangelmayer2010 - Semitracks, Inc.
                     Copyright Associates
Automation Induced Events




                                            No ESD Events Detected!
                                                Bonding Tip Properly
                                                Grounded!

                     ESD Events Detected!
                           Bonding Tip Not Grounded!



    Event Video

Copyright Š 2011 Dangelmayer Associates
Class 0 – Wafer Saw Example
   Unexpected Results!

                    •  CDM Threshold – 35 Volts
                    •  92.2% Defective at Wafer Saw
                    •  Failure Analysis
                       •  CDM Damage




Copyright Š 2011 Dangelmayer Associates
Field Induced Reticle Damage




  Voltage Differentials Induced
  On Traces Of Different Lengths
  By Movement In An Electric Field

Copyright Š 2011 Dangelmayer Associates
MEMS – Microelectromechanical Systems




              W. D. Greason, EOS/ESD Symposium 2007




Copyright Š 2011 Dangelmayer Associates
MEMS ESD

•    Micron Scale Moving To
     Nanostructures (NEMS)
•    When Co-integrated Into ICs
      •    Many IC Protection Strategies Used

•    Have Additional Important Failure
     Mode Due To Small Air Gaps
     Vulnerable To Air/Dielectric
     Breakdown
•    Typical Air Gap 1-3 Microns And
     Falling
      •    Modified Paschen Curve Behavior
•    Failure Modes
      •    Melting Due To Discharge Current
                                                W. D. Greason, EOS/ESD Sympsium 2007
      •    Stiction




     Copyright Š 2011 Dangelmayer Associates
MR Head Lessons Learned

•  Conventional ESD Methods Essential but Insufficient!
    •  Below 100 Volts
    •  Ionization - Necessary & Insufficient
•  Expect a Paradigm Shift @ 100 volts
    •  Assume Device Still Charged!
•  New Control Methods
    •  Eliminate Metal-to-Metal Contact
    •  Soft Landings with Dissipative Materials
    •  Advanced Test Methods
       •  EMI/ESD Event Detection
       •  Discharge Currents Test Methods

                                            p26
 Copyright Š 2011 Dangelmayer Associates
Case Study
Class 0 MR Tape Head
     25


                           22%
                           ESD
     20                                          Technical
                           Yield                Assessment
                           Loss                      &
     15
                                                CDM Training
                                                                                   80% EPM Yield Risk
                           S20.20 Program
                                                                                   Benchmarking™
     10
                             (39% EPM                                                              90% EPM Yield Risk
                           Benchmarking)
                                                                                                   Benchmarking™
                           (HBM Focused)
      5




      0
          1   5   9   13   17   21   25   29   33   37   41   45   49     1    5    9   13   17   21   25   29   33   37   41   45   49
                                                                        Week




 Copyright Š 2011 Dangelmayer Associates
Flat Panel Displays

•  Large Capacitance – Behaves
   Like Large Wafer Or Circuit
  Board
•  Manufacturing Process
   Creates Very High Potentials
   – Much Lifting, Sliding And
   Probing Of Panels At Various
   Stages Of Fabrication
•  ESD Control Implementation
  Very Challenging



 Copyright Š 2011 Dangelmayer Associates
Panels Vulnerable To ESD Damage


•  Electrothermal Damage
•  Dielectric Breakdown
   Between Large Power/
   Ground Planes
•  Technology Roadmaps
  To Higher Pixel Density
  And New Materials Will
  Increase Vulnerability


 Copyright Š 2011 Dangelmayer Associates
Hand-Held Devices – ESD/EMI Issues are Common




Copyright Š 2011 Dangelmayer Associates
System Level ESD Upsets

ESD Generates Radio Waves
That Affect Microprocessors
     •  Scrambled Program
        Instructions and Data
     •  Microprocessor Lockup
     •  Confusing Error Messages
     •  Software Errors



 Copyright Š 2011 Dangelmayer Associates
Questions?
                    Contact information:
                     Ted Dangelmayer
                        Terry Welsher
                        978 282 8888
                  ted@dangelmayer.com
                  www.dangelmayer.com

                  Part II: Tomorrow
    Electrostatic Discharge (ESD) and Electrical
       Overstress (EOS) Design Challenges
Copyright Š 2011 Dangelmayer Associates

Esd the broad impact and design challenges part1of2

  • 1.
    Part I: Broad Impact of Electrostatic  Discharge (ESD) on Product  Discharge (ESD) on Product Q Quality and Reliability y y Ted Dangelmayer Š2011 ASQ & Presentation Ted Presented live on Jul  06th, 2011 http://reliabilitycalendar.org/The_Re liability_Calendar/Short_Courses/Sh liability Calendar/Short Courses/Sh ort_Courses.html
  • 2.
    ASQ Reliability Division  ASQ Reliability Division Short Course Series Short Course Series The ASQ Reliability Division is pleased to  present a regular series of short courses  featuring leading international practitioners,  academics, and consultants. academics and consultants The goal is to provide a forum for the basic and  The goal is to provide a forum for the basic and continuing education of reliability  professionals. http://reliabilitycalendar.org/The_Re liability_Calendar/Short_Courses/Sh liability Calendar/Short Courses/Sh ort_Courses.html
  • 3.
    Part I: Broad Impact of Electrostatic Discharge (ESD) on Product Quality and Reliability Professional Services Only No Product Sales! •  Client Locations Ted Dangelmayer www.dangelmayer.com
  • 4.
    Outline •  ESD –A Surprisingly Dominant Failure Mechanism •  ESD Sensitivity Trend •  HBM & CDM Review •  Failures Beyond Device Level •  ESD Countermeasures - Overview p2 Copyright © 2011 Dangelmayer Associates
  • 5.
    Typical IC DeviceDefect Analysis 350 ~20% - ESD 300 ~10% to 80% - ESD(CDE/CBE) 250 200 150 100 100% - ESD 50 0 NTF EOS FAB Asmbly Test ESD Copyright Š 2011 Dangelmayer Associates
  • 6.
    ESD Damage: A SurprisinglyDominant Failure Mechanism! After EOS Misdiagnosis Adjustment: ESD: #1 Assignable Cause of IC Failure! Copyright Š 2011 Dangelmayer Associates
  • 7.
    ESD Sensitivity Trends p5 Copyright Š 2011 Dangelmayer Associates
  • 8.
    ESDA Technology Roadmap HBM Roadmap (Min-Max) 6kV 4kV 2kV 1kV ESD Control Methods 0V 1978 1983 1988 1993 1998 2003 2008 2013 ESD Control is becoming increasingly critical! p6 Copyright Š 2011 Dangelmayer Associates
  • 9.
    ESDA Technology Roadmap CDM Roadmap (Min-Max) 1000V 750V 500V 250V 125V ESD Control Methods 0V 1978 1983 1988 1993 1998 2003 2008 2013 ESD Control is becoming increasingly critical! p7 Copyright Š 2011 Dangelmayer Associates
  • 10.
    HBM & CDMReview Copyright Š 2011 Dangelmayer Associates
  • 11.
    Human Body Model When the air breaks down between the human s finger and an IC pin, charge is suddenly transferred from the person via the grounded pin of the IC to ground. Charged Person Device HBM Ground Copyright Š 2011 Dangelmayer Charge Flow Associates
  • 12.
    Charged Device Model 99% of ESD Failures are CDM! Andrew Olney, Analog Devices, Quality Director & Industry Council Conductive Surface Capacitance of Device Device Contact Resistance Q Charge CDM Video Flow Ground Copyright Š 2011 Dangelmayer Associates
  • 13.
    HBM CDM Copyright Š2011 Dangelmayer Associates
  • 14.
    Case Study Circuit Board Class 0 Device •  15 Volt CDM & HBM Circuit Pack Production Yield Withstand Voltage Losses •  100% Failure Rate: Some Lots •  $1.2B Sales Jeopardy •  $1K Invested in Shunt •  $6.2M/yr Savings Documented p12 Copyright © 2011 Dangelmayer Associates
  • 15.
    CDM Threshold Dependencies Larger Device Package Size Higher Operating Speeds p13 Copyright Š 2011 Dangelmayer Associates Ref: Industry Council WPII 2009
  • 16.
    ESD Failures BeyondDevice Level •  Charged Board Event (CBE) •  Cable Discharged Event (CDE) •  Transient Latch-Up (TLU) •  MEMS •  MR Heads •  Automated Handling Equipment •  Wafers •  Flat Panels •  Handheld Devices •  System-Level •  Hard Failures (Device Damage) •  Recoverable Malfunction (Transient Latch-up) Copyright © 2011 Dangelmayer Associates
  • 17.
    Charged Board Event(CBE) Photograph courtesy: Andrew Olney, Quality Director, Analog Devices Copyright Š 2011 Dangelmayer Associates
  • 18.
    CBE ESD Damage- A New Discovery! Most FA Experts Misdiagnose as EOS!!!! Up to 50% of EOS Failures are CBE ESD! (2008) CDM Device Damage CBE (ESD) Device Damage on Circuit Board Courtesy: Andrew Olney, Quality Director, Analog Devices Copyright Š 2011 Dangelmayer Associates
  • 19.
    CBE vs. CDMDischarge Waveform Comparison FICBM vs. FICDM Discharge Waveforms (250 V) Voltage for DSP with a 250V Charge 10 GND test pad FICBM Peak Current (Amps) 8 GND pin FICDM 6 4 2 0 -2 0.00 0.25 0.50 0.75 1.00 1.25 1.50 Time (nanoseconds) Courtesy: Andrew Olney, Quality Director, Analog Devices Copyright Š 2011 Dangelmayer Associates
  • 20.
    Faceplate Field- InducedCBE Failure Established Code - New Faceplate Supplier 40% Failure Rate - 1.5KV CDM Threshold Ref: ESD Program Management, 2nd edition, pp59-61 Copyright Š 2011 Dangelmayer Associates
  • 21.
    Cable Discharge Events(CDE) Charge On Cables Can Cause Equipment Damage Or Malfunctions 19 Copyright Š 2011 Dangelmayer Associates
  • 22.
    System Level Testing& Latch-Up •  Some tests can trigger latch-up in ICs •  IEC 61000-4-2, 4 and 5 •  Cable Discharge Events (CDE) •  …even though they pass IC level latch-up testing (JEDEC Std 78) •  JEDEC Std 78 lacks a fast rising edge pulse •  Most field latch-up problems are due to transients •  Supplement with a transient latch- up test Copyright © 2011 Dangelmayer2010 - Semitracks, Inc. Copyright Associates
  • 23.
    Automation Induced Events No ESD Events Detected! Bonding Tip Properly Grounded! ESD Events Detected! Bonding Tip Not Grounded! Event Video Copyright Š 2011 Dangelmayer Associates
  • 24.
    Class 0 –Wafer Saw Example Unexpected Results! •  CDM Threshold – 35 Volts •  92.2% Defective at Wafer Saw •  Failure Analysis •  CDM Damage Copyright © 2011 Dangelmayer Associates
  • 25.
    Field Induced ReticleDamage Voltage Differentials Induced On Traces Of Different Lengths By Movement In An Electric Field Copyright Š 2011 Dangelmayer Associates
  • 26.
    MEMS – MicroelectromechanicalSystems W. D. Greason, EOS/ESD Symposium 2007 Copyright © 2011 Dangelmayer Associates
  • 27.
    MEMS ESD •  Micron Scale Moving To Nanostructures (NEMS) •  When Co-integrated Into ICs •  Many IC Protection Strategies Used •  Have Additional Important Failure Mode Due To Small Air Gaps Vulnerable To Air/Dielectric Breakdown •  Typical Air Gap 1-3 Microns And Falling •  Modified Paschen Curve Behavior •  Failure Modes •  Melting Due To Discharge Current W. D. Greason, EOS/ESD Sympsium 2007 •  Stiction Copyright © 2011 Dangelmayer Associates
  • 28.
    MR Head LessonsLearned •  Conventional ESD Methods Essential but Insufficient! •  Below 100 Volts •  Ionization - Necessary & Insufficient •  Expect a Paradigm Shift @ 100 volts •  Assume Device Still Charged! •  New Control Methods •  Eliminate Metal-to-Metal Contact •  Soft Landings with Dissipative Materials •  Advanced Test Methods •  EMI/ESD Event Detection •  Discharge Currents Test Methods p26 Copyright © 2011 Dangelmayer Associates
  • 29.
    Case Study Class 0MR Tape Head 25 22% ESD 20 Technical Yield Assessment Loss & 15 CDM Training 80% EPM Yield Risk S20.20 Program Benchmarking™ 10 (39% EPM 90% EPM Yield Risk Benchmarking) Benchmarking™ (HBM Focused) 5 0 1 5 9 13 17 21 25 29 33 37 41 45 49 1 5 9 13 17 21 25 29 33 37 41 45 49 Week Copyright © 2011 Dangelmayer Associates
  • 30.
    Flat Panel Displays • Large Capacitance – Behaves Like Large Wafer Or Circuit Board •  Manufacturing Process Creates Very High Potentials – Much Lifting, Sliding And Probing Of Panels At Various Stages Of Fabrication •  ESD Control Implementation Very Challenging Copyright © 2011 Dangelmayer Associates
  • 31.
    Panels Vulnerable ToESD Damage •  Electrothermal Damage •  Dielectric Breakdown Between Large Power/ Ground Planes •  Technology Roadmaps To Higher Pixel Density And New Materials Will Increase Vulnerability Copyright © 2011 Dangelmayer Associates
  • 32.
    Hand-Held Devices –ESD/EMI Issues are Common Copyright © 2011 Dangelmayer Associates
  • 33.
    System Level ESDUpsets ESD Generates Radio Waves That Affect Microprocessors •  Scrambled Program Instructions and Data •  Microprocessor Lockup •  Confusing Error Messages •  Software Errors Copyright © 2011 Dangelmayer Associates
  • 34.
    Questions? Contact information: Ted Dangelmayer Terry Welsher 978 282 8888 ted@dangelmayer.com www.dangelmayer.com Part II: Tomorrow Electrostatic Discharge (ESD) and Electrical Overstress (EOS) Design Challenges Copyright Š 2011 Dangelmayer Associates