Latches
– Flip-Flops - SR, JK, D and T
– Master Slave Flip Flops
• Shift Registers
– SISO, SIPO, PISO, PIPO and Universal
• Binary Counters
– Synchronous and asynchronous up/down counters
– mod - N counter
– Counters for random sequence
– Johnson counter and Ring counter
Edge Trigged Flip Flpps, this presentation will cover the following topics
Flip Flops
Properties of flip flops
Edge trigged flip flops
THE EDGE TRIGGERED S-R FLIP FLOPS
THE EDGE TRIGGERED J-K FLIP FLOPS
THE EDGE TRIGGERED D FLIP FLOPS
THE EDGE TRIGGERED T FLIP FLOPS
Operating characteristics of edge trigged flip flops
Edge Trigged Flip Flpps, this presentation will cover the following topics
Flip Flops
Properties of flip flops
Edge trigged flip flops
THE EDGE TRIGGERED S-R FLIP FLOPS
THE EDGE TRIGGERED J-K FLIP FLOPS
THE EDGE TRIGGERED D FLIP FLOPS
THE EDGE TRIGGERED T FLIP FLOPS
Operating characteristics of edge trigged flip flops
This presentation covers:
Some basic definitions & concepts of digital communication
What is Phase Shift Keying(PSK) ?
Binary Phase Shift Keying – BPSK
BPSK transmitter & receiver
Advantages & Disadvantages of BPSK
Pi/4 – QPSK
Pi/4 – QPSK transmitter & receiver
Advantages of Pi/4- QPSK
This presentation covers:
Some basic definitions & concepts of digital communication
What is Phase Shift Keying(PSK) ?
Binary Phase Shift Keying – BPSK
BPSK transmitter & receiver
Advantages & Disadvantages of BPSK
Pi/4 – QPSK
Pi/4 – QPSK transmitter & receiver
Advantages of Pi/4- QPSK
in these slides you will find basic concept of combinational and sequenstional logic. these ppts are designed for students of electrical engineering, and covers all the necessary topic of their interest.
Counters:
Introduction, Asynchronous counter, Terms related to counters, IC-7493 (4-bit binary counter), Synchronous counter, Bushing, Type T-Design, Type JK Design, Presettable counter, IC-7490, IC 7492, Synchronous counter ICs, Analysis of counter circuits
Fundamentals of Assembly Language Programming
Instruction to Assembler, Compiler and IDE
C Programming for 8051 Microcontroller
Basic Arithmetic and Logical Programming
Timer and Counter, Interrupts
Interfacing and Programming of Serial Communication, I2C, SPI and CAN of 8051 Microcontroller
Design of Synchronous Sequential Circuits - State
Table and State Diagram - Design of Mealy and
Moore FSM
• Overlapping & Non-overlapping Sequence
detector
• Hazards - Hazard free realization - Case study on
Vending Machine FSM.
Review of Number systems - Logic gates - Boolean
algebra - Boolean postulates and laws - De-Morgan’s
Theorem, Principle of Duality - Simplification using
Boolean algebra - Canonical forms, Sum of product and
Product of sum - Minimization using Karnaugh map -
NAND and NOR Implementation.
Avionics Unit V Study Material
Air data quantities – Altitude, Air speed, Vertical speed, Mach Number, Total air temperature, Mach warning, Altitude warning – Auto pilot – Basic principles, Longitudinal and lateral auto pilot.
Avionics Unit IV Study Materials
Radio navigation – ADF, DME, VOR, LORAN, DECCA, OMEGA, ILS, MLS – Inertial Navigation Systems (INS) – Inertial sensors, INS block diagram – Satellite navigation systems – GPS.
Unit III Study Materials
Control and display technologies: CRT, LED, LCD, EL and plasma panel – Touch screen – Direct voice input (DVI) – Civil and Military Cockpits: MFDS, HUD, MFK, HOTAS.
Avionics-Unit I
Study Materials
Need for avionics in civil and military aircraft and space systems – integrated avionics and weapon systems – typical avionics subsystems, design, technologies – Introduction to digital computer and memories.
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1. EC1371 – DIGITAL ELECTRONICS
Dr. K. Kannan, M.E., M.E., Ph.D.,
Professor & Head,
Department of Mechatronics Engineering
2. OBJECTIVES
• To provide the Digital fundamentals, Boolean algebra
and its applications in digital systems
• To familiarize with the design of various
combinational digital circuits using logic gates
• To introduce the analysis and design procedures for
synchronous and asynchronous sequential circuits
• To explain the various semiconductor memories and
related technology
• To introduce the electronic circuits involved in the
making of logic gates
3. Unit III - SEQUENTIAL CIRCUITS
• Latches
– Flip-Flops - SR, JK, D and T
– Master Slave Flip Flops
• Shift Registers
– SISO, SIPO, PISO, PIPO and Universal
• Binary Counters
– Synchronous and asynchronous up/down counters
– mod - N counter
– Counters for random sequence
– Johnson counter and Ring counter
CO3: Develop a synchronous/asynchronous counters and
shift registers using sequential logic.
4. Types of Logic Circuits
Logic circuits can be:
– Combinational Logic Circuits - Outputs depend
only on current inputs
– Sequential Logic Circuits - Outputs depends not
only on current inputs but also on the past
sequence of inputs
5. Sequential Logic Circuits
The basic structure of a synchronous sequential
circuit is shown here.
Synchronous – One input is a clock and on the clock
the next state becomes the present state of the
system.
Sequential – The circuit transitions between states in
a regular manner.
6. Sequential Logic Circuits
Most digital systems like digital watches, digital
phones, digital computers, digital traffic light
controllers and so on require memory elements
Memory elements are digital circuits that can store
and retrieve data in the form of 1's and 0's.
The output of the systems with memory depends
not only on present inputs but also on what has
happened in the past
SR latch is an example of memory circuits that can
store one bit of information
9. Synchronous Vs Asynchronous
The behavior of a synchronous sequential circuit
depends upon the any input signal at any
instant of time and order of input change. This
synchronization is achieved by clock
generators that provides clock pulses. The
storage elements used in clocked sequential
circuits are called flip-flops.
In asynchronous sequential circuits the storage
elements are time delay devices (i.e., storage is
because of their propagation delay). They
implemented by feedback that may cause
instability in Asynchronous circuits.
15. JK Flip Flop
The JK flip-flop is an SR flip-flop with some additional
gating logic on the inputs in which the SR=11
(undetermined condition) doesn’t exist.
J is used for the set and K is used for reset
J K Q
-------------
0 0 Q
0 1 0
1 0 1
1 1 Q’
21. Edge-Triggered vs. Level sensitive
ET FF: Transition (output change) can happen only
during clock pulse transition
Clock pulse transition can be positive clock transition or
negative clock transition
Level Sensitive FF: as long as the pulse level is up or
down output can change
Level sensitive clock is less favorite because depending
on the duration of pulse, output may change a number
of times
23. Master-Slave FF (Edge-Trigger FF)
Is a combination of 2 FFS. The first FF is master
and responds to positive level of clock
The 2nd FF is slave and responds to negative
level of clock
Therefore, the final output changes only during 1
to 0 transition of clock. It means during the
duration of clock pulses changes in input do not
have effect on output.
29. Registers
A register is a group of flip‐flops, each one of which
shares a common clock and is capable of storing
one bit of information. An n ‐bit register consists
of a group of n flip‐flops capable of storing n bits
of binary information.
A counter is a register that goes through a
predetermined sequence of binary states. The
gates in the counter are connected in such a way
as to produce the prescribed sequence of states.
Although counters are a special type of register, it
is common to differentiate them by giving them a
different name.
31. Shift Registers
A register capable of shifting the binary information
held in each cell to its neighboring cell, in a
selected direction, is called a shift register.
The logical configuration of a shift register consists
of a chain of flip‐flops in cascade, with the output
of one flip‐flop connected to the input of the next
flip‐flop.
All flip‐flops receive common clock pulses, which
activate the shift of data from one stage to the
next.
42. Counters
A register that goes through a prescribed sequence of states
upon the application of input pulses is called a counter.
The sequence of states may follow the binary number
sequence or any other sequence of states. A counter that
follows the binary number sequence is called a binary
counter . An n ‐bit binary counter consists of n flip‐flops
and can count in binary from 0 through 2n - 1.
Counters are available in two categories: Ripple counters
and Synchronous counters. In a ripple counter, a flip‐flop
output transition serves as a source for triggering other
flip‐flops whereas in a synchronous counter, the Clock
inputs of all flip‐flops receive the common clock.
45. Ring Counter
A ring counter is a circular shift register with
only one flip‐flop being set at any particular
time; all others are cleared. The single bit is
shifted from one flip‐flop to the next to
produce the sequence of timing signals.
48. Switch‐Tail Ring Counter
A k ‐bit ring counter circulates a single bit
among the flip‐flops to provide k
distinguishable states. The number of states
can be doubled if the shift register is connected
as a switch‐tail ring counter. A switch‐tail ring
counter is a circular shift register with the
complemented output of the last flip‐flop
connected to the input of the first flip‐flop.