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Chapter 4
DC Biasing–BJTs
Biasing
Biasing
g
g
Biasing:
Biasing: T
The DC voltages applied to a transistor in
order to turn it on so that it can amplify the AC signal.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Operating Point
Operating Point
p g
p g
The DC input
establishes an
establishes an
operating or
quiescent point
called the Q
Q-
-point
point.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
The Three States of Operation
The Three States of Operation
p
p
• Active or Linear Region Operation
Active or Linear Region Operation
• Active or Linear Region Operation
Active or Linear Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is reverse biased
j
• Cutoff Region Operation
Cutoff Region Operation
B E itt j ti i bi d
Base–Emitter junction is reverse biased
•
• Saturation Region Operation
Saturation Region Operation
•
• Saturation Region Operation
Saturation Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is forward biased
j
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
DC Biasing Circuits
DC Biasing Circuits
g
g
• Fixed-bias circuit
• Fixed-bias circuit
• Emitter-stabilized bias circuit
• Collector emitter loop
• Collector-emitter loop
• Voltage divider bias circuit
• DC bias with voltage feedback
• DC bias with voltage feedback
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Fixed Bias
Fixed Bias
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
The Base
The Base-
-Emitter Loop
Emitter Loop
p
p
From Kirchhoff’s voltage
law:
V I R V 0
+VCC – IBRB – VBE = 0
Solving for base current:
BE
CC V
V −
B
BE
CC
B
R
V
V
I
−
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Collector
Collector-
-Emitter Loop
Emitter Loop
p
p
Collector current:
From Kirchhoff’s voltage law:
B
I
I C
β
=
From Kirchhoff s voltage law:
C
C
CC
CE R
I
V
V −
= C
C
CC
C
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Saturation
Saturation
Wh th t i t i ti i t ti t
When the transistor is operating in saturation, current
through the transistor is at its maximum possible value.
R
CC
V
Csat
I =
C
R
V
0
CE
V ≅
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Load Line Analysis
Load Line Analysis
I
I
The end points of the load line are:
I
ICsat
Csat
IC
C = VCC
CC / RC
C
VCE
CE = 0 V
V
VCEcutoff
CEcutoff
VCE
CE = VCC
CC
I = 0 mA
IC
C = 0 mA
The Q-point is the operating point:
• where the value of RB
B sets the value of
IB
B
• that sets the values of V and I
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
• that sets the values of VCE
CE and IC
C
Circuit Values Affect the Q
Circuit Values Affect the Q-
-Point
Point
Q
Q
more
more …
…
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Circuit Values Affect the Q
Circuit Values Affect the Q-
-Point
Point
Q
Q
more
more …
…
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Circuit Values Affect the Q
Circuit Values Affect the Q-
-Point
Point
Q
Q
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Emitter
Emitter-
-Stabilized Bias Circuit
Stabilized Bias Circuit
Emitter
Emitter-
-Stabilized Bias Circuit
Stabilized Bias Circuit
Adding a resistor
Adding a resistor
(RE) to the emitter
circuit stabilizes
circuit stabilizes
the bias circuit.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Base
Base-
-Emitter Loop
Emitter Loop
Base
Base-
-Emitter Loop
Emitter Loop
From Kirchhoff’s voltage law:
0
R
I
-
V
-
R
I
-
V E
E
BE
E
E
CC =
+
0
R
1)I
(
-
R
I
-
V E
B
B
B
CC =
+
β
Since IE = (β + 1)IB:
)
( E
B
B
B
CC β
BE
CC V
-
V
Solving for IB:
E
B
BE
CC
B
1)R
(
R
V
-
V
I
+
β
+
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Collector
Collector-
-Emitter Loop
Emitter Loop
Collector
Collector-
-Emitter Loop
Emitter Loop
From Kirchhoff’s voltage law:
From Kirchhoff’s voltage law:
0
CC
V
C
R
C
I
CE
V
E
R
E
I =
−
+
+
Since IE ≅ IC:
)
R
(R
I
–
V
V E
C
C
CC
CE +
= )
R
(R
I
V
V E
C
C
CC
CE +
=
Also:
R
I
V
E
BE
B
R
CC
B
C
C
CC
E
CE
C
E
E
E
V
V
R
I
–
V
V
R
I
-
V
V
V
V
R
I
V
+
=
=
=
+
=
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Improved Biased Stability
Improved Biased Stability
Improved Biased Stability
Improved Biased Stability
Stability refers to a circuit condition in which the currents and voltages
will remain fairly constant over a wide range of temperatures and
transistor Beta (β) values.
Adding RE to the emitter improves the stability of a transistor.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Saturation Level
Saturation Level
Saturation Level
Saturation Level
VCEcutoff:
: ICsat:
The endpoints can be determined from the load line.
mA
0
I
V
V
C
CC
CE
=
=
E
R
C
R
CC
V
C
I
CE V
0
V
+
=
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
E
R
C
R +
Voltage Divider Bias
Voltage Divider Bias
Voltage Divider Bias
Voltage Divider Bias
This is a very stable
bias circuit.
Th t d
The currents and
voltages are nearly
independent of any
any
independent of any
any
variations in β.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Approximate Analysis
Approximate Analysis
Approximate Analysis
Approximate Analysis
Where IB << I1 and I1 ≅ I2 :
2
1
CC
2
B
R
R
V
R
V
+
=
Where βRE > 10R2:
E
E
V
I =
E
E
R
I
BE
B
E V
V
V −
=
From Kirchhoff’s voltage law:
E
E
C
C
CC
CE R
I
R
I
V
V −
−
=
)
R
(R
I
V
V
I
I
E
C
C
CC
CE
C
E
+
−
=
≅
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Voltage Divider Bias Analysis
Voltage Divider Bias Analysis
Voltage Divider Bias Analysis
Voltage Divider Bias Analysis
Transistor Saturation Level
Transistor Saturation Level
CC
Cmax
Csat
V
I
I =
=
E
C
Cmax
Csat
R
R
I
I
+
Load Line Analysis
Load Line Analysis
Cutoff:
Cutoff: Saturation:
Saturation:
V
mA
0
I
V
V
C
CC
CE
=
=
V
0
VCE
E
R
C
R
CC
V
C
I
=
+
=
CE
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
DC Bias with Voltage Feedback
DC Bias with Voltage Feedback
DC Bias with Voltage Feedback
DC Bias with Voltage Feedback
Another way to
improve the stability
improve the stability
of a bias circuit is to
add a feedback path
from collector to
from collector to
base.
I thi bi i it
In this bias circuit
the Q-point is only
slightly dependent on
the transistor beta, β.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Base
Base-
-Emitter Loop
Emitter Loop
Base
Base-
-Emitter Loop
Emitter Loop
From Kirchhoff’s voltage law:
From Kirchhoff’s voltage law:
0
R
I
–
V
–
R
I
–
R
I
–
V E
E
BE
B
B
C
C
CC =
′
Where I
Where I << I
<< I :
:
Where I
Where IB
B << I
<< IC
C:
:
C
I
B
I
C
I
C
I' ≅
+
=
Knowing I
Knowing I β
βI
I and I
and I ≅
≅ I
I the loop
the loop
Knowing I
Knowing IC
C =
= β
βI
IB
B and I
and IE
E ≅
≅ I
IC
C, the loop
, the loop
equation becomes:
equation becomes:
0
R
I
V
R
I
R
I
–
V E
B
BE
B
B
C
B
CC =
β
−
−
−
β
V
V
0
R
I
V
R
I
R
I
V E
B
BE
B
B
C
B
CC β
β
Solving for I
Solving for IB
B:
:
)
R
(R
R
V
V
I
E
C
B
BE
CC
B
+
β
+
−
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Collector
Collector-
-Emitter Loop
Emitter Loop
Collector
Collector-
-Emitter Loop
Emitter Loop
Applying Kirchoff’s voltage law:
Applying Kirchoff’s voltage law:
I V I’ R V 0
IE + VCE + I’CRC – VCC = 0
Since I
Since I′
′C
C ≅
≅ I
IC
C and I
and IC
C =
= β
βI
IB
B:
:
IC(RC + RE) + VCE – VCC =0
Solving for V
Solving for VCE
CE:
:
g
g CE
CE
VCE = VCC – IC(RC + RE)
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Base
Base-
-Emitter Bias Analysis
Emitter Bias Analysis
Base
Base Emitter Bias Analysis
Emitter Bias Analysis
Transistor Saturation Level
Transistor Saturation Level
Transistor Saturation Level
Transistor Saturation Level
E
C
CC
Cmax
Csat
R
R
V
I
I
+
=
=
Load Line Analysis
Load Line Analysis
Cutoff:
Cutoff: Saturation:
Saturation:
V
V CC
CE = CC
V
I
mA
0
I
V
V
C
CC
CE
=
V
0
VCE
E
R
C
R
C
I
=
+
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Transistor Switching Networks
Transistor Switching Networks
Transistor Switching Networks
Transistor Switching Networks
Transistors with only the DC source applied can be used
Transistors with only the DC source applied can be used
as electronic switches.
as electronic switches.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Switching Circuit Calculations
Switching Circuit Calculations
g
g
V
Saturation current:
Saturation current:
C
CC
Csat
R
V
I =
To ensure saturation:
To ensure saturation:
dc
Csat
B
I
I
β
>
To ensure saturation:
To ensure saturation:
dc
β
Emitter
Emitter-
-collector resistance
collector resistance
at saturation and cutoff:
at saturation and cutoff:
C t
CEsat
sat
I
V
R =
at saturation and cutoff:
at saturation and cutoff:
Csat
I
CEO
CC
cutoff
I
V
R =
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Switching Time
Switching Time
Switching Time
Switching Time
Transistor switching times:
Transistor switching times:
d
r
on t
t
t +
=
f
s
off t
t
t +
=
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Troubleshooting Hints
Troubleshooting Hints
Troubleshooting Hints
Troubleshooting Hints
• Approximate voltages
pp g
– VBE ≅ .7 V for silicon transistors
– VCE ≅ 25% to 75% of VCC
• Test for opens and shorts with an ohmmeter.
• Test the solder joints.
• Test the transistor with a transistor tester or a curve tracer
• Test the transistor with a transistor tester or a curve tracer.
• Note that the load or the next stage affects the transistor operation.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
PNP Transistors
PNP Transistors
PNP Transistors
PNP Transistors
The analysis for pnp transistor biasing circuits is the same
as that for npn transistor circuits. The only difference is that
h fl i i h i di i
the currents are flowing in the opposite direction.
Copyright ©2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 • All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky

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Bem (7)

  • 2. Biasing Biasing g g Biasing: Biasing: T The DC voltages applied to a transistor in order to turn it on so that it can amplify the AC signal. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 3. Operating Point Operating Point p g p g The DC input establishes an establishes an operating or quiescent point called the Q Q- -point point. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 4. The Three States of Operation The Three States of Operation p p • Active or Linear Region Operation Active or Linear Region Operation • Active or Linear Region Operation Active or Linear Region Operation Base–Emitter junction is forward biased Base–Collector junction is reverse biased j • Cutoff Region Operation Cutoff Region Operation B E itt j ti i bi d Base–Emitter junction is reverse biased • • Saturation Region Operation Saturation Region Operation • • Saturation Region Operation Saturation Region Operation Base–Emitter junction is forward biased Base–Collector junction is forward biased j Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 5. DC Biasing Circuits DC Biasing Circuits g g • Fixed-bias circuit • Fixed-bias circuit • Emitter-stabilized bias circuit • Collector emitter loop • Collector-emitter loop • Voltage divider bias circuit • DC bias with voltage feedback • DC bias with voltage feedback Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 6. Fixed Bias Fixed Bias Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 7. The Base The Base- -Emitter Loop Emitter Loop p p From Kirchhoff’s voltage law: V I R V 0 +VCC – IBRB – VBE = 0 Solving for base current: BE CC V V − B BE CC B R V V I − = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 8. Collector Collector- -Emitter Loop Emitter Loop p p Collector current: From Kirchhoff’s voltage law: B I I C β = From Kirchhoff s voltage law: C C CC CE R I V V − = C C CC C Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 9. Saturation Saturation Wh th t i t i ti i t ti t When the transistor is operating in saturation, current through the transistor is at its maximum possible value. R CC V Csat I = C R V 0 CE V ≅ Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 10. Load Line Analysis Load Line Analysis I I The end points of the load line are: I ICsat Csat IC C = VCC CC / RC C VCE CE = 0 V V VCEcutoff CEcutoff VCE CE = VCC CC I = 0 mA IC C = 0 mA The Q-point is the operating point: • where the value of RB B sets the value of IB B • that sets the values of V and I Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky • that sets the values of VCE CE and IC C
  • 11. Circuit Values Affect the Q Circuit Values Affect the Q- -Point Point Q Q more more … … Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 12. Circuit Values Affect the Q Circuit Values Affect the Q- -Point Point Q Q more more … … Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 13. Circuit Values Affect the Q Circuit Values Affect the Q- -Point Point Q Q Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 14. Emitter Emitter- -Stabilized Bias Circuit Stabilized Bias Circuit Emitter Emitter- -Stabilized Bias Circuit Stabilized Bias Circuit Adding a resistor Adding a resistor (RE) to the emitter circuit stabilizes circuit stabilizes the bias circuit. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 15. Base Base- -Emitter Loop Emitter Loop Base Base- -Emitter Loop Emitter Loop From Kirchhoff’s voltage law: 0 R I - V - R I - V E E BE E E CC = + 0 R 1)I ( - R I - V E B B B CC = + β Since IE = (β + 1)IB: ) ( E B B B CC β BE CC V - V Solving for IB: E B BE CC B 1)R ( R V - V I + β + = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 16. Collector Collector- -Emitter Loop Emitter Loop Collector Collector- -Emitter Loop Emitter Loop From Kirchhoff’s voltage law: From Kirchhoff’s voltage law: 0 CC V C R C I CE V E R E I = − + + Since IE ≅ IC: ) R (R I – V V E C C CC CE + = ) R (R I V V E C C CC CE + = Also: R I V E BE B R CC B C C CC E CE C E E E V V R I – V V R I - V V V V R I V + = = = + = = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 17. Improved Biased Stability Improved Biased Stability Improved Biased Stability Improved Biased Stability Stability refers to a circuit condition in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor Beta (β) values. Adding RE to the emitter improves the stability of a transistor. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 18. Saturation Level Saturation Level Saturation Level Saturation Level VCEcutoff: : ICsat: The endpoints can be determined from the load line. mA 0 I V V C CC CE = = E R C R CC V C I CE V 0 V + = = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky E R C R +
  • 19. Voltage Divider Bias Voltage Divider Bias Voltage Divider Bias Voltage Divider Bias This is a very stable bias circuit. Th t d The currents and voltages are nearly independent of any any independent of any any variations in β. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 20. Approximate Analysis Approximate Analysis Approximate Analysis Approximate Analysis Where IB << I1 and I1 ≅ I2 : 2 1 CC 2 B R R V R V + = Where βRE > 10R2: E E V I = E E R I BE B E V V V − = From Kirchhoff’s voltage law: E E C C CC CE R I R I V V − − = ) R (R I V V I I E C C CC CE C E + − = ≅ Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 21. Voltage Divider Bias Analysis Voltage Divider Bias Analysis Voltage Divider Bias Analysis Voltage Divider Bias Analysis Transistor Saturation Level Transistor Saturation Level CC Cmax Csat V I I = = E C Cmax Csat R R I I + Load Line Analysis Load Line Analysis Cutoff: Cutoff: Saturation: Saturation: V mA 0 I V V C CC CE = = V 0 VCE E R C R CC V C I = + = CE Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 22. DC Bias with Voltage Feedback DC Bias with Voltage Feedback DC Bias with Voltage Feedback DC Bias with Voltage Feedback Another way to improve the stability improve the stability of a bias circuit is to add a feedback path from collector to from collector to base. I thi bi i it In this bias circuit the Q-point is only slightly dependent on the transistor beta, β. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 23. Base Base- -Emitter Loop Emitter Loop Base Base- -Emitter Loop Emitter Loop From Kirchhoff’s voltage law: From Kirchhoff’s voltage law: 0 R I – V – R I – R I – V E E BE B B C C CC = ′ Where I Where I << I << I : : Where I Where IB B << I << IC C: : C I B I C I C I' ≅ + = Knowing I Knowing I β βI I and I and I ≅ ≅ I I the loop the loop Knowing I Knowing IC C = = β βI IB B and I and IE E ≅ ≅ I IC C, the loop , the loop equation becomes: equation becomes: 0 R I V R I R I – V E B BE B B C B CC = β − − − β V V 0 R I V R I R I V E B BE B B C B CC β β Solving for I Solving for IB B: : ) R (R R V V I E C B BE CC B + β + − = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 24. Collector Collector- -Emitter Loop Emitter Loop Collector Collector- -Emitter Loop Emitter Loop Applying Kirchoff’s voltage law: Applying Kirchoff’s voltage law: I V I’ R V 0 IE + VCE + I’CRC – VCC = 0 Since I Since I′ ′C C ≅ ≅ I IC C and I and IC C = = β βI IB B: : IC(RC + RE) + VCE – VCC =0 Solving for V Solving for VCE CE: : g g CE CE VCE = VCC – IC(RC + RE) Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 25. Base Base- -Emitter Bias Analysis Emitter Bias Analysis Base Base Emitter Bias Analysis Emitter Bias Analysis Transistor Saturation Level Transistor Saturation Level Transistor Saturation Level Transistor Saturation Level E C CC Cmax Csat R R V I I + = = Load Line Analysis Load Line Analysis Cutoff: Cutoff: Saturation: Saturation: V V CC CE = CC V I mA 0 I V V C CC CE = V 0 VCE E R C R C I = + = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 26. Transistor Switching Networks Transistor Switching Networks Transistor Switching Networks Transistor Switching Networks Transistors with only the DC source applied can be used Transistors with only the DC source applied can be used as electronic switches. as electronic switches. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 27. Switching Circuit Calculations Switching Circuit Calculations g g V Saturation current: Saturation current: C CC Csat R V I = To ensure saturation: To ensure saturation: dc Csat B I I β > To ensure saturation: To ensure saturation: dc β Emitter Emitter- -collector resistance collector resistance at saturation and cutoff: at saturation and cutoff: C t CEsat sat I V R = at saturation and cutoff: at saturation and cutoff: Csat I CEO CC cutoff I V R = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 28. Switching Time Switching Time Switching Time Switching Time Transistor switching times: Transistor switching times: d r on t t t + = f s off t t t + = Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 29. Troubleshooting Hints Troubleshooting Hints Troubleshooting Hints Troubleshooting Hints • Approximate voltages pp g – VBE ≅ .7 V for silicon transistors – VCE ≅ 25% to 75% of VCC • Test for opens and shorts with an ohmmeter. • Test the solder joints. • Test the transistor with a transistor tester or a curve tracer • Test the transistor with a transistor tester or a curve tracer. • Note that the load or the next stage affects the transistor operation. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 30. PNP Transistors PNP Transistors PNP Transistors PNP Transistors The analysis for pnp transistor biasing circuits is the same as that for npn transistor circuits. The only difference is that h fl i i h i di i the currents are flowing in the opposite direction. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky