ChapterChapterChapterChapter 4444
DC BiasingDC BiasingDC BiasingDC Biasing––––BJTsBJTsBJTsBJTs
BiasingBiasing
Biasing:Biasing: TThe DC voltages applied to a transistor in
order to turn it on so that it can amplify the AC signal.
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Operating PointOperating Point
The DC input
establishes an
operating or
quiescent point
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
called the QQ--pointpoint.
The Three States of OperationThe Three States of Operation
• Active or Linear Region OperationActive or Linear Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is reverse biased
• Cutoff Region OperationCutoff Region Operation
Base–Emitter junction is reverse biased
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Base–Emitter junction is reverse biased
•• Saturation Region OperationSaturation Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is forward biased
DC Biasing CircuitsDC Biasing Circuits
• Fixed-bias circuit
• Emitter-stabilized bias circuit
• Collector-emitter loop
• Voltage divider bias circuit
• DC bias with voltage feedback
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
• DC bias with voltage feedback
Fixed BiasFixed Bias
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
The BaseThe Base--Emitter LoopEmitter Loop
From Kirchhoff’s voltage
law:
Solving for base current:
+VCC – IBRB – VBE = 0
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Solving for base current:
B
BECC
B
R
VV
I
−−−−
====
CollectorCollector--Emitter LoopEmitter Loop
Collector current:
From Kirchhoff’s voltage law:
BII C
ββββ====
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
From Kirchhoff’s voltage law:
CCCCCE RIVV −−−−====
SaturationSaturation
When the transistor is operating in saturation, current
through the transistor is at its maximum possible value.
CR
CCV
CsatI ====
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
CR
Csat
V0CEV ≅≅≅≅
Load Line AnalysisLoad Line Analysis
IICsatCsat
ICC = VCCCC / RCC
VCECE = 0 V
VVCEcutoffCEcutoff
VCECE = VCCCC
I = 0 mA
The end points of the load line are:
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Robert L. Boylestad and Louis Nashelsky
ICC = 0 mA
• where the value of RBB sets the value of
IBB
• that sets the values of VCECE and ICC
The Q-point is the operating point:
Circuit Values Affect the QCircuit Values Affect the Q--PointPoint
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moremore ……
Circuit Values Affect the QCircuit Values Affect the Q--PointPoint
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moremore ……
Circuit Values Affect the QCircuit Values Affect the Q--PointPoint
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EmitterEmitter--Stabilized Bias CircuitStabilized Bias Circuit
Adding a resistor
(RE) to the emitter
circuit stabilizes
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
circuit stabilizes
the bias circuit.
BaseBase--Emitter LoopEmitter Loop
From Kirchhoff’s voltage law:
0R1)I(-RI-V EBBBCC ====++++ββββ
0RI-V-RI-V EEBEEECC ====++++
Since IE = (ββββ + 1)IB:
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Robert L. Boylestad and Louis Nashelsky
0R1)I(-RI-V EBBBCC ====++++ββββ
EB
BECC
B
1)R(R
V-V
I
++++ββββ++++
====
Solving for IB:
CollectorCollector--Emitter LoopEmitter Loop
From Kirchhoff’s voltage law:
0
CC
V
C
R
C
I
CE
V
E
R
E
I =−++
Since IE ≅≅≅≅ IC:
)R(RI–VV ECCCCCE ++++====
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Robert L. Boylestad and Louis Nashelsky
)R(RI–VV ECCCCCE ++++====
Also:
EBEBRCCB
CCCCECEC
EEE
VVRI–VV
RI-VVVV
RIV
++++========
====++++====
====
Improved Biased StabilityImproved Biased Stability
Stability refers to a circuit condition in which the currents and voltages
will remain fairly constant over a wide range of temperatures and
transistor Beta (ββββ) values.
Adding RE to the emitter improves the stability of a transistor.
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Robert L. Boylestad and Louis Nashelsky
Saturation LevelSaturation Level
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VCEcutoff:: ICsat:
The endpoints can be determined from the load line.
mA0I
VV
C
CCCE
====
====
ERCR
CCV
CI
CE V0V
++++
====
====
Voltage Divider BiasVoltage Divider Bias
This is a very stable
bias circuit.
The currents and
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Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
The currents and
voltages are nearly
independent of anyany
variations in ββββ.
Approximate AnalysisApproximate Analysis
Where IB << I1 and I1 ≅≅≅≅ I2 :
Where ββββRE > 10R2:
21
CC2
B
RR
VR
V
++++
====
E
E
R
V
I ====
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Robert L. Boylestad and Louis Nashelsky
From Kirchhoff’s voltage law:
E
E
R
I ====
BEBE VVV −−−−====
EECCCCCE RIRIVV −−=
)R(RIVV
II
ECCCCCE
CE
+−=
≅
Voltage Divider Bias AnalysisVoltage Divider Bias Analysis
Transistor Saturation LevelTransistor Saturation Level
EC
CC
CmaxCsat
RR
V
II
++++
========
Load Line AnalysisLoad Line Analysis
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Load Line AnalysisLoad Line Analysis
Cutoff:Cutoff: Saturation:Saturation:
mA0I
VV
C
CCCE
====
====
V0VCE
ERCR
CCV
CI
====
++++
====
DC Bias with Voltage FeedbackDC Bias with Voltage Feedback
Another way to
improve the stability
of a bias circuit is to
add a feedback path
from collector to
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Robert L. Boylestad and Louis Nashelsky
from collector to
base.
In this bias circuit
the Q-point is only
slightly dependent on
the transistor beta, ββββ.
BaseBase--Emitter LoopEmitter Loop
From Kirchhoff’s voltage law:From Kirchhoff’s voltage law:
0RI–V–RI–RI–V EEBEBBCCCC ====′′′′
Where IWhere IBB << I<< ICC::
C
I
B
I
C
I
C
I' ≅+=
Knowing IKnowing I == ββββββββII and Iand I ≅≅≅≅≅≅≅≅ II , the loop, the loop
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)R(RR
VV
I
ECB
BECC
B
++++ββββ++++
−−−−
====
Knowing IKnowing ICC == ββββββββIIBB and Iand IEE ≅≅≅≅≅≅≅≅ IICC, the loop, the loop
equation becomes:equation becomes:
0RIVRIRI–V EBBEBBCBCC ====ββββ−−−−−−−−−−−−ββββ
Solving for ISolving for IBB::
CollectorCollector--Emitter LoopEmitter Loop
Applying Kirchoff’s voltage law:Applying Kirchoff’s voltage law:
IE + VCE + I’CRC – VCC = 0
Since ISince I′′′′′′′′CC ≅≅≅≅≅≅≅≅ IICC and Iand ICC == ββββββββIIBB::
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IC(RC + RE) + VCE – VCC =0
Solving for VSolving for VCECE::
VCE = VCC – IC(RC + RE)
BaseBase--Emitter Bias AnalysisEmitter Bias Analysis
Transistor Saturation LevelTransistor Saturation Level
EC
CC
CmaxCsat
RR
V
II
++++
========
Load Line AnalysisLoad Line Analysis
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Cutoff:Cutoff: Saturation:Saturation:
mA0I
VV
C
CCCE
=
=
V0VCE
E
R
C
R
CC
V
C
I
=
+
=
Transistor Switching NetworksTransistor Switching Networks
Transistors with only the DC source applied can be usedTransistors with only the DC source applied can be used
as electronic switches.as electronic switches.
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Switching Circuit CalculationsSwitching Circuit Calculations
C
CC
Csat
R
V
I ====
dc
Csat
B
I
I
ββββ
>>>>
Saturation current:Saturation current:
To ensure saturation:To ensure saturation:
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Robert L. Boylestad and Louis Nashelsky
dcββββ
Csat
CEsat
sat
I
V
R ====
CEO
CC
cutoff
I
V
R ====
EmitterEmitter--collector resistancecollector resistance
at saturation and cutoff:at saturation and cutoff:
Switching TimeSwitching Time
Transistor switching times:Transistor switching times:
dron ttt ++++====
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fsoff ttt ++++====
Troubleshooting HintsTroubleshooting Hints
• Approximate voltages
– VBE ≅≅≅≅ .7 V for silicon transistors
– VCE ≅≅≅≅ 25% to 75% of VCC
• Test for opens and shorts with an ohmmeter.
• Test the solder joints.
• Test the transistor with a transistor tester or a curve tracer.
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• Test the transistor with a transistor tester or a curve tracer.
• Note that the load or the next stage affects the transistor operation.
PNP TransistorsPNP Transistors
The analysis for pnp transistor biasing circuits is the same
as that for npn transistor circuits. The only difference is that
the currents are flowing in the opposite direction.
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Robert L. Boylestad and Louis Nashelsky

Dc basimg

  • 1.
    ChapterChapterChapterChapter 4444 DC BiasingDCBiasingDC BiasingDC Biasing––––BJTsBJTsBJTsBJTs
  • 2.
    BiasingBiasing Biasing:Biasing: TThe DCvoltages applied to a transistor in order to turn it on so that it can amplify the AC signal. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 3.
    Operating PointOperating Point TheDC input establishes an operating or quiescent point Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky called the QQ--pointpoint.
  • 4.
    The Three Statesof OperationThe Three States of Operation • Active or Linear Region OperationActive or Linear Region Operation Base–Emitter junction is forward biased Base–Collector junction is reverse biased • Cutoff Region OperationCutoff Region Operation Base–Emitter junction is reverse biased Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Base–Emitter junction is reverse biased •• Saturation Region OperationSaturation Region Operation Base–Emitter junction is forward biased Base–Collector junction is forward biased
  • 5.
    DC Biasing CircuitsDCBiasing Circuits • Fixed-bias circuit • Emitter-stabilized bias circuit • Collector-emitter loop • Voltage divider bias circuit • DC bias with voltage feedback Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky • DC bias with voltage feedback
  • 6.
    Fixed BiasFixed Bias Copyright©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 7.
    The BaseThe Base--EmitterLoopEmitter Loop From Kirchhoff’s voltage law: Solving for base current: +VCC – IBRB – VBE = 0 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Solving for base current: B BECC B R VV I −−−− ====
  • 8.
    CollectorCollector--Emitter LoopEmitter Loop Collectorcurrent: From Kirchhoff’s voltage law: BII C ββββ==== Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky From Kirchhoff’s voltage law: CCCCCE RIVV −−−−====
  • 9.
    SaturationSaturation When the transistoris operating in saturation, current through the transistor is at its maximum possible value. CR CCV CsatI ==== Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky CR Csat V0CEV ≅≅≅≅
  • 10.
    Load Line AnalysisLoadLine Analysis IICsatCsat ICC = VCCCC / RCC VCECE = 0 V VVCEcutoffCEcutoff VCECE = VCCCC I = 0 mA The end points of the load line are: Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky ICC = 0 mA • where the value of RBB sets the value of IBB • that sets the values of VCECE and ICC The Q-point is the operating point:
  • 11.
    Circuit Values Affectthe QCircuit Values Affect the Q--PointPoint Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky moremore ……
  • 12.
    Circuit Values Affectthe QCircuit Values Affect the Q--PointPoint Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky moremore ……
  • 13.
    Circuit Values Affectthe QCircuit Values Affect the Q--PointPoint Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 14.
    EmitterEmitter--Stabilized Bias CircuitStabilizedBias Circuit Adding a resistor (RE) to the emitter circuit stabilizes Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky circuit stabilizes the bias circuit.
  • 15.
    BaseBase--Emitter LoopEmitter Loop FromKirchhoff’s voltage law: 0R1)I(-RI-V EBBBCC ====++++ββββ 0RI-V-RI-V EEBEEECC ====++++ Since IE = (ββββ + 1)IB: Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky 0R1)I(-RI-V EBBBCC ====++++ββββ EB BECC B 1)R(R V-V I ++++ββββ++++ ==== Solving for IB:
  • 16.
    CollectorCollector--Emitter LoopEmitter Loop FromKirchhoff’s voltage law: 0 CC V C R C I CE V E R E I =−++ Since IE ≅≅≅≅ IC: )R(RI–VV ECCCCCE ++++==== Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky )R(RI–VV ECCCCCE ++++==== Also: EBEBRCCB CCCCECEC EEE VVRI–VV RI-VVVV RIV ++++======== ====++++==== ====
  • 17.
    Improved Biased StabilityImprovedBiased Stability Stability refers to a circuit condition in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor Beta (ββββ) values. Adding RE to the emitter improves the stability of a transistor. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 18.
    Saturation LevelSaturation Level Copyright©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky VCEcutoff:: ICsat: The endpoints can be determined from the load line. mA0I VV C CCCE ==== ==== ERCR CCV CI CE V0V ++++ ==== ====
  • 19.
    Voltage Divider BiasVoltageDivider Bias This is a very stable bias circuit. The currents and Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky The currents and voltages are nearly independent of anyany variations in ββββ.
  • 20.
    Approximate AnalysisApproximate Analysis WhereIB << I1 and I1 ≅≅≅≅ I2 : Where ββββRE > 10R2: 21 CC2 B RR VR V ++++ ==== E E R V I ==== Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky From Kirchhoff’s voltage law: E E R I ==== BEBE VVV −−−−==== EECCCCCE RIRIVV −−= )R(RIVV II ECCCCCE CE +−= ≅
  • 21.
    Voltage Divider BiasAnalysisVoltage Divider Bias Analysis Transistor Saturation LevelTransistor Saturation Level EC CC CmaxCsat RR V II ++++ ======== Load Line AnalysisLoad Line Analysis Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Load Line AnalysisLoad Line Analysis Cutoff:Cutoff: Saturation:Saturation: mA0I VV C CCCE ==== ==== V0VCE ERCR CCV CI ==== ++++ ====
  • 22.
    DC Bias withVoltage FeedbackDC Bias with Voltage Feedback Another way to improve the stability of a bias circuit is to add a feedback path from collector to Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky from collector to base. In this bias circuit the Q-point is only slightly dependent on the transistor beta, ββββ.
  • 23.
    BaseBase--Emitter LoopEmitter Loop FromKirchhoff’s voltage law:From Kirchhoff’s voltage law: 0RI–V–RI–RI–V EEBEBBCCCC ====′′′′ Where IWhere IBB << I<< ICC:: C I B I C I C I' ≅+= Knowing IKnowing I == ββββββββII and Iand I ≅≅≅≅≅≅≅≅ II , the loop, the loop Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky )R(RR VV I ECB BECC B ++++ββββ++++ −−−− ==== Knowing IKnowing ICC == ββββββββIIBB and Iand IEE ≅≅≅≅≅≅≅≅ IICC, the loop, the loop equation becomes:equation becomes: 0RIVRIRI–V EBBEBBCBCC ====ββββ−−−−−−−−−−−−ββββ Solving for ISolving for IBB::
  • 24.
    CollectorCollector--Emitter LoopEmitter Loop ApplyingKirchoff’s voltage law:Applying Kirchoff’s voltage law: IE + VCE + I’CRC – VCC = 0 Since ISince I′′′′′′′′CC ≅≅≅≅≅≅≅≅ IICC and Iand ICC == ββββββββIIBB:: Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky IC(RC + RE) + VCE – VCC =0 Solving for VSolving for VCECE:: VCE = VCC – IC(RC + RE)
  • 25.
    BaseBase--Emitter Bias AnalysisEmitterBias Analysis Transistor Saturation LevelTransistor Saturation Level EC CC CmaxCsat RR V II ++++ ======== Load Line AnalysisLoad Line Analysis Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Cutoff:Cutoff: Saturation:Saturation: mA0I VV C CCCE = = V0VCE E R C R CC V C I = + =
  • 26.
    Transistor Switching NetworksTransistorSwitching Networks Transistors with only the DC source applied can be usedTransistors with only the DC source applied can be used as electronic switches.as electronic switches. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky
  • 27.
    Switching Circuit CalculationsSwitchingCircuit Calculations C CC Csat R V I ==== dc Csat B I I ββββ >>>> Saturation current:Saturation current: To ensure saturation:To ensure saturation: Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky dcββββ Csat CEsat sat I V R ==== CEO CC cutoff I V R ==== EmitterEmitter--collector resistancecollector resistance at saturation and cutoff:at saturation and cutoff:
  • 28.
    Switching TimeSwitching Time Transistorswitching times:Transistor switching times: dron ttt ++++==== Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky fsoff ttt ++++====
  • 29.
    Troubleshooting HintsTroubleshooting Hints •Approximate voltages – VBE ≅≅≅≅ .7 V for silicon transistors – VCE ≅≅≅≅ 25% to 75% of VCC • Test for opens and shorts with an ohmmeter. • Test the solder joints. • Test the transistor with a transistor tester or a curve tracer. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky • Test the transistor with a transistor tester or a curve tracer. • Note that the load or the next stage affects the transistor operation.
  • 30.
    PNP TransistorsPNP Transistors Theanalysis for pnp transistor biasing circuits is the same as that for npn transistor circuits. The only difference is that the currents are flowing in the opposite direction. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 • All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky