1. The document analyzes unsymmetrical faults using the bus impedance matrix method. It describes connecting sequence networks for positive, negative, and zero sequences for line-to-ground faults. 2. Current is injected into the faulted bus in each sequence network. Voltages are then calculated based on the impedances in the bus impedance matrices. 3. Post-fault voltages and currents can be determined for all buses to analyze the effects of unsymmetrical faults on the system.

1. ANALYSIS OF
UNSYMMETRICAL FAULTS
USING BUS IMPEDENCE
MATRIX

2. INTRODUCTION OF UNSYMMETRICAL
FAULTS
 Most Of the faults that occur on power systems are unsymmetrical faults, which
may consist of unsymmetrical short circuits, unsymmetrical faults through
impedances, or open conductors.
 Unsymmetrical Faults occur as single line--‐to--‐ground faults, line--‐to--‐line
faults, or double line--‐to--‐ground faults. The Path of the fault current from line
to line or line to ground may or may not contain impedance. One Or two open
conductors result in unsymmetrical faults, through either the breaking of one or
two conductors or the achon of fuses and other devices that may not open the
three phases simultaneously

3.  Connection of sequence network for
LG fault 𝑖 𝑡ℎ bus
 Consider that there are n number of buses in a
System and a LG fault occurs 𝑖 𝑡ℎ bus of this system
 The positive sequence network is replaced by its
Thevenin’s equivalent i.e. the prefault voltage. 𝑉1−𝑖
0
Of bus I in series with the passive positive sequence
Network.
 As there is no prefault negative and zero sequence
Voltage ,both are passive network only

4. for passive positive sequence network
 𝑉1−𝑏𝑢𝑠 = Z1−𝑏𝑢𝑠 . I1−𝑏𝑢𝑠
Where 𝑉1−𝑏𝑢𝑠 =
𝑉𝑖−1
𝑉𝑖−2
..
𝑉𝑖−𝑛
= 𝑝𝑜𝑠𝑖𝑡𝑖𝑣𝑒 𝑠𝑒𝑞𝑢𝑒𝑛𝑐𝑒 𝑏𝑢𝑠 𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑣𝑒𝑐𝑡𝑜𝑟
Z1−𝑏𝑢𝑠 =
𝑍𝑖−11 ⋯ 𝑍𝑖−1𝑛
⋮ ⋱ ⋮
𝑍𝑖−𝑛1 ⋯ 𝑍𝑖−𝑛𝑛
=
𝑝𝑜𝑠𝑖𝑡𝑖𝑣𝑒 𝑠𝑒𝑞𝑢𝑒𝑛𝑐𝑒 𝑏𝑢𝑠 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒 𝑚𝑎𝑡𝑟𝑖𝑥
I1−𝑏𝑢𝑠 =
𝐼𝑖−1
𝐼𝑖−2
.
.
𝐼𝑖−𝑛
= 𝑝𝑜𝑠𝑖𝑡𝑖𝑣𝑒 𝑠𝑒𝑞𝑢𝑒𝑛𝑐𝑒 𝑏𝑢𝑠 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑖𝑛𝑗𝑒𝑐𝑡𝑖𝑜𝑛 𝑣𝑒𝑐𝑡𝑜𝑟

5.  According to sequence network connection , current −𝐼1−𝑖
𝑓
is injected only at the
faulted 𝑖 𝑡ℎ bus of the positive sequence network. Hence,
 I1−𝑏𝑢𝑠 =
0
0..
.
−𝐼1−𝑖
𝑓
.
.
0
 Hence the positive sequence voltage at the 𝑖 𝑡ℎ bus of the passive positive
sequence network is
 𝑉1−𝑖 = −Z1−𝑖𝑖 . I1−𝑖
𝑓
 Thus, the passive positive sequence network present an impedance Z1−𝑖𝑖 to the
positive sequence current I1−𝑖
𝑓

6.  For a negative sequence network.
 𝑉2−𝑏𝑢𝑠 = Z2−𝑏𝑢𝑠 . I2−𝑏𝑢𝑠
 The negative sequence network is injected with current I1−𝑖
𝑓
at the 𝑖 𝑡ℎ bus
only.hence,
 I2−𝑏𝑢𝑠 =
0
0..
.
−𝐼2−𝑖
𝑓
.
.
0
∴𝑉2−𝑖 = −Z2−𝑖𝑖 . I2−𝑖
𝑓
 Thus negative sequence network offers an impedance Z2−𝑖𝑖 to the negative
sequence current 𝐼2−𝑖
𝑓

7.  For zero sequence network
 𝑉0−𝑏𝑢𝑠 = Z0−𝑏𝑢𝑠 . I0−𝑏𝑢𝑠
 I0−𝑏𝑢𝑠 =
0
0..
.
−𝐼0−𝑖
𝑓
.
.
0
 𝑉0−𝑖 = −Z0−𝑖𝑖 . I0−𝑖
𝑓
 Thus zero sequence network offers an impedance Z0−𝑖𝑖 to the zero sequence
current 𝐼0−𝑖
𝑓

8.  From sequence network connection, we can write,
 𝐼1−𝑖
𝑓
= 𝐼2−𝑖
𝑓
= 𝐼0−𝑖
𝑓
=
𝑉1−𝑖
0
𝑍1−𝑖𝑖 + 𝑍2−𝑖𝑖 + 𝑍0−𝑖𝑖 + 3𝑍 𝑓
 Similarly we can compute sequence current for LL & LLG fault.
 For passive positive sequence network, the voltage developed at bus k due to
injection of current −𝐼1−𝑖
𝑓
at bus I is ,
 𝑉1−𝑘 = −Z1−𝑖𝑘 . I1−𝑖
𝑓
 Hence the postfault positive sequence voltage at bus K is,
 𝑉1−𝑘
𝑓
= 𝑉1−𝑘
0
−Z1−𝑖𝑘 . I1−𝑖
𝑓
; k=1,2,…n.
Where, 𝑉1−𝑘
0
=prefault positive sequence voltage at bus K
Z1−𝑖𝑘 = 𝑖𝑘 𝑡ℎ component of 𝑉1−𝑏𝑢𝑠

9.  As the prefault negative sequence bus voltage is zero, the postfault negative
sequence bus voltage is,
 𝑉2−𝑘
𝑓
= 0 + V2−𝑘
 𝑉2−𝑘
𝑓
= −Z2−𝑖𝑘 . I2−𝑖
𝑓
Where Z2−𝑖𝑘=𝑖𝑘 𝑡ℎ component of 𝑍2−𝑏𝑢𝑠
 The postfault zero sequence bus voltage is
 𝑉0−𝑘
𝑓
= 𝑉0−𝑘
0
−Z0−𝑖𝑘 . I1−𝑖
𝑓
;k=1,2,…n.
Where Z0−𝑖𝑘=𝑖𝑘 𝑡ℎ component of 𝑍0−𝑏𝑢𝑠

10.  After computing postfault sequence voltage , the sequence current in the line can
be computed as , for line pg. having sequence admittance 𝑌1−𝑝𝑔, 𝑌2−𝑝𝑔and 𝑌0−𝑝𝑔
 𝐼1−𝑝𝑔
𝑓
= 𝑌1−𝑝𝑔(𝑉1−𝑝
𝑓
− 𝑉1−𝑔
𝑓
)
 𝐼2−𝑝𝑔
𝑓
= 𝑌2−𝑝𝑔(𝑉2−𝑝
𝑓
− 𝑉2−𝑔
𝑓
)
 𝐼0−𝑝𝑔
𝑓
= 𝑌0−𝑝𝑔(𝑉2−𝑝
𝑓
− 𝑉2−𝑔
𝑓
)
 After computing sequence voltage and current, phase volage and current can be
easily computed as ,
 𝑉𝑝 = 𝐴 𝑣𝑠
 𝐼 𝑝 = 𝐴𝑖𝑠

11.  As this method requires computation of bus impedance matrices of all the three
sequence network, it seems to be more tedious and time consuming . But once the
bus impedance matrices have been formed, fault analysis can be easily can be
easily carried out for all the buses which is the aim of fault analysis.
 Also for any changes in power network bus impedance matrix can be easily
modified