A decoder is a logic circuit that takes binary input and provides an output based on the input. It performs the reverse operation of an encoder. There are different types of decoders including a 2 to 4 line decoder and a 3 to 8 line decoder. A 2 to 4 line decoder has 3 inputs (A0, A1, E) and 4 outputs (Y0, Y1, Y2, Y3). It uses AND gates to activate one output based on the input. A 3 to 8 line decoder has 3 inputs (A0, A1, A2), 8 outputs (Y0-Y7), and an enable input. It uses AND gates and logic expressions to activate one of the 8 outputs based on the

1. Decoders
Prof. Neeraj Bhargava
Mrs. Pooja Dixit
Department of Computer Science, School of
Engineering & System Sciences
MDS University Ajmer, Rajasthan

2. Decoders
 Decoder is a multi input, multi output logic circuit which
decodes n inputs into 2n possible outputs.
 The binary information is passed in the form of N input
lines. The output lines define the 2N-bit code for the
binary information. In simple words,
the Decoder performs the reverse operation of
the Encoder.

3. Decoders
 There are various types of decoders which are as follows:
 2 to 4 line decoder:
 In the 2 to 4 line decoder, there is a total of three inputs, i.e., A0, and
A1 and E and four outputs, i.e., Y0, Y1, Y2, and Y3. For each
combination of inputs, when the enable 'E' is set to 1, one of these
four outputs will be 1. The block diagram and the truth table of the 2
to 4 line decoder are given below.
 Block Diagram:
The output values will
be:
Yo=A’B’
Y1=A’B
Y2=AB’
Y3=AB

4. Decoders
 The binary inputs A and B determine which output line from Q0 to Q3
is “HIGH” at logic level “1” while the remaining outputs are held
“LOW” at logic “0” so only one output can be active (HIGH) at any
one time. Therefore, whichever output line is “HIGH” identifies the
binary code present at the input, in other words, it “decodes” the
binary input.
 Some binary decoders have an additional input pin labeled “Enable”
that controls the outputs from the device. This extra input allows the
outputs of the decoder to be turned “ON” or “OFF” as required. The
output is only generated when the Enable input has value 1;
otherwise, all outputs are 0. Only a small change in the
implementation is required: the Enable input is fed into the AND
gates which produce the outputs.

5. Decoders
 Logical circuit of the above expressions is
given below:


6. 3 to 8 line decoder:
 The 3 to 8 line decoder is also known as Binary to Octal Decoder. In a 3 to
8 line decoder, there is a total of eight outputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6,
and Y7 and three Inputs, i.e., A0, A1, and A2.
 This circuit has an enable input 'E'. when enable 'E' is set to 1, one of these
four outputs will be 1. The block diagram and the truth table of the 3 to 8 line
encoder are given below.
 Block Diagram:

7. 3 to 8 line decoder:
 Truth Table:

The logical expression
of the term Y0, Y1, Y2,
Y3, Y4, Y5, Y6, and Y7 is
as follows:
Y0=A0'.A1'.A2'
Y1=A0.A1'.A2'
Y2=A0'.A1.A2'
Y3=A0.A1.A2'
Y4=A0'.A1'.A2
Y5=A0.A1'.A2
Y6=A0'.A1.A2
Y7=A0.A1.A2

8. 3 to 8 line decoder:
 Logical circuit of the above expressions is given below:


9. Assignment Questions
 Q1. construct a 3 X 8 decoder using two 2 X
4 decoder with one enable.
 Q3. construct a 4 X 16 decoder using two 3
X 8 decoder with one enable.