May 13, 2005 VLSI Education in India Dr. Partha Pratim Das Interra Systems (India) Pvt. Ltd.
“ India does not need a fabrication facility, but it does need a training program for chip design.” –  Jaswinder S. Ahuja, Corporate VP & MD, Cadence India.   EETimes, Nov 03, 2004
Agenda VLSI Chronology India Advantage Government Initiatives Jaipur Workshop on VLSI Education Actors for Change
VLSI Education and R&D – A Chronology 1979-80 “ Introduction  to  VLSI  System  Design”  by  Mead  and  Conway  in  1980 “ VLSI Design” courses based on MC by some IITs. Adoption of the book’s methodology by TIFR and CEERI for their design R&D work. Concurrently, MOS technology development related R&D work was being pursued at TIFR, CEERI and IITs.
VLSI Chronology 1980-81 Setting  up  of  SCL  and  the  “VLSI  Task  Force”  by  GoI. 1981-82 First commercial interactive layout design system (among academic and R&D institutes) installed at CEERI’s Delhi Centre under UNDP support. Mid 1980s Evolution of focused integrated electronics and circuits oriented ME/MTech degree programmes at IITs.
VLSI Chronology 1985-86 First multinational company, TI, sets up its R&D Centre in India (for EDA tool development and software verification). 1986-87 First real application of Mead-Conway methodology to design a full custom LSI processor – the PWM processor for variable frequency AC drives at CEERI, Pilani together with UCL, Belgium (under UNDP support).
VLSI Chronology 1987-88 Setting up of Academic and R&D VLSI Design Centres at IITs and CEERI under an initiative of DoE. Academic Centres equipped with  Sun workstations  VTI tools (an integrated tool-set for full-custom and semi-custom logic, circuit and layout design and verification)  Semi-custom design tool “Vinyas” developed by ITI that ran on a particular brand of PC (the OMC PC-286 and PC-386). 10 industrial VLSI Design Centres were also set up by DoE –  5 under the charge of SCL and 5 under the charge of ITI.
VLSI Chronology 1987-88 Start of VLSI Design Workshop and International Conference. 1989 VSI Formed to foster education and research in VLSI
VLSI Chronology Early 1990s Successful chip design-developments by academic-R&D design centers : CEERI (for C-DoT) using VTI tools and VTI foundry. IIT-Kharagpur and Jadavpur University using Vinyas tools and ITI foundry. 1994 Introduction of VHDL in the Indian academia and R&D.
VLSI Chronology 1997 Start of the first industry-sponsored MTech programme – “VLSI Design, Tools and Technologies” (VDTT) programme at IIT-Delhi sponsored by Philips and co-sponsored by a number of other industries. Subsequently, TCS supports a MTech degree programme at IIT-Bombay.
VLSI Chronology 1998 DoE/MIT project – “ Special Manpower Development for VLSI Design and Related Software ” (SMDP): 9th plan. Start of VLSI Design & Test Workshop (VDAT). Around 2000 & Beyond Boom in Design Industry with every major setting up or trying to set up shops in India
VLSI Chronology 2002 Advanced VLSI Laboratory at IIT Kharagpur in collaboration with Natsem, Intel, Synopsys. 2004 ISA Launched 2005 Ganapati VLSI Laboratory at BESU, Kolkata VLSI Mtech Program at Radio Physics, CU, Kolkata
VLSI Challenges – Evolution of VLSI Design Scenario 1.0 Mix of all into a Complex SoC 500 200 2005+ 0.9 RF, MEMS, SoC 100-200 100-200 2000 0.7 ASP, Analog,  Mixed-Signal 30-50 30-50 1995 0.4 ASP, Chip-sets 10-15 10-12 1990 0.2 ASICs for Glue Logic 3-5 2-3 1985  MDI* Nature of Product Effort (Man-Years)  Team Size (At Peak)  Year
Where are we today? Many major design companies (count the subsidiary industry as well) have an India Center Many more are working on a plan to setup Every India Center has a very aggressive growth plan
Why India? India Operations were fuelled by  Cost Advantages Availability of an English speaking, electron-aware technical community India Operations have been supported by Positive Policy adoption  Improving service attitude
Why not India? India Operations are being deterred by  Spiraling Costs Weakening Infrastructure Aggressive poaching India is failing to deliver in Quality Man-Power Quantity Man-Power
Government Initiatives
SMDP: Phase I Started 1998 Goals Market share for VLSI design from 0.5% to 5%
SMDP: Phase I Salient Characteristics 19 Participating Institutes 7 Resource Center (RC), 12 Participating Institutes (PI) Rs. 15 Crores budget for 5 years Training of Faculty at PI’s Setting up VLSI Labs Development of learning material Teaching courses
SMDP I: Man-Power Type-I:  PhD in Microelectronics. Type-II:  MTech (VLSI Design / Microelectronics) graduate from PIs – 250-300 / yr. Type-III:  MTech graduate of other electronics disciplines (communications, control, . . . ) with at least two relevant VLSI courses.  Type-IV:  BTech of EE/ECE/CS exposed to two basic VLSI design courses.
SMDP I: RC & PI IIT, Chennai IIT, Delhi IIT, Kanpur IIT, Kharagpur IIT, Bombay IISc, Bangalore CEERI, Pilani North BHU-IT, Varanasi IIT, Roorki Thapar Institute of Tech. Patiala South KREC, Surathkal REC, Warangal PSG College of Technology, Coimbatore West MREC, Jaipur VREC, Nagpur Shri G.S. Inst. Of Tech. & Sc., Indore East Bengal Engineering College, Howrah Jadavpur University, Kolkata REC, Rourkela
SMDP: Phase II Report prepared by TCS & IIT Bombay Promoting Microelectronic Education – The Indian Imperative 32 Institutes Identified in report  7 RC 25 PI Budget: Rs. 50 Crores / 5 Years
SMDP: Phase II Resource Centers (7) IIT Chennai, Delhi, Kharagpur, Mumbai & Kanpur, IISc Bangalore, CEERI Pilani Participating Institutes (25) IIT Roorkee & Guwahati, Warangal, Surathkal, Tiruchirapalli, Rourkela, Motilal Nehru REC, Allahabad, B.R. Ambedkar REC, Jalandhar, Surat Nagpur, Hamirpur, Silchar, Kurukshetra, Calicut, Jaipur, Durgapur, Bhopal, Srinagar, Jamshedpur BEC, Jadavpur, G.S. I.T.S, Indore, Thapar, Patiala BHU-IT, PSG, Coimbatore
SMDP: Phase II Salient Characteristics  Continued VLSI Lab setup support (EDA SW, HW) Support for hiring 2 faculty members / institute Travel support for presenting papers Leverage SCL India Chip program Model Course Curriculum Access to IEEE Explore Plan for national website for public domain EDA software
Academic Estimates Institutes offering ME/MTech degree in VLSI / Microelectronics discipline  6 (IITs and IISc) 10 (NITs and Other) Institutes. Estimated Man-Power Total Core Faculty Pool Size : 60-70 Type-I Manpower/year : 8-12 Type-II Manpower/year : 250-300 Type-III Manpower/year : 150-200 Type-IV Manpower/year : 1,000-1,200
Widening Gap
VSI Opinion Polls How many B.Tech/B.E. students with specialization in Semiconductors/VLSI do you think will be needed on an annual basis by 2010? Less than 5000 5000 – 7500 7500 – 10000 10,000 or more
VSI Opinion Polls How many B.Tech/B.E. students with specialization in Semiconductors/VLSI do you think will be needed on an annual basis by 2010? Less than 5000: 23%  5000 – 7500: 35% 7500 – 10000: 16% 10,000 or more: 24%
VSI Opinion Polls How many PG students with specialization in Semiconductors/VLSI do you think will be needed (annually) by 2010? Less than 500 500 – 1000 1000 – 2000 2000 – 3000 More than 3000
VSI Opinion Polls How many PG students with specialization in Semiconductors/VLSI do you think will be needed (annually) by 2010? Less than 500: 1% 500 – 1000: 12% 1000 – 2000: 26% 2000 – 3000: 16% More than 3000: 43%
VSI Opinion Polls What is the number of B.Tech students graduating today with some specialization in Semiconductors/VLSI to take up a profession in the VLSI area? Less than 1000 1000 – 2000 2000 – 3000 3000 – 4000 More than 4000
VSI Opinion Polls What is the number of B.Tech students graduating today with some specialization in Semiconductors/VLSI to take up a profession in the VLSI area? Less than 1000: 52%  1000 – 2000: 13% 2000 – 3000: 23% 3000 – 4000: 2% More than 4000: 7%
VSI Opinion Polls What is the number of M.Tech students graduating today with specialization in Semiconductors/VLSI to take up a profession in VLSI? Less than 500 500 – 1000 More than 1000
VSI Opinion Polls What is the number of M.Tech students graduating today with specialization in Semiconductors/VLSI to take up a profession in VLSI? Less than 500: 66%  500 – 1000: 27% More than 1000: 6%
Jaipur Workshop on VLSI Education  Compiled by: Dr. C P Ravikumar, TI & Secy, VSI March 12, 2005
What constitutes “Talent in VLSI” ? Device Physics, VLSI Technology, Fabrication  Transistor-level Circuit Knowledge  Analog and mixed signal design, RF  Design Digital Design (HDL)  Synthesis  Verification (Simulation, Formal Verification, …)  EDA  DFT  Applications  Signal Processing  Networks  Embedded Systems
Goals of University – Industry Interaction Talent Pool Generation – growing the right kind of talent VLSI is a fast growing field and curriculum updates cannot keep pace  Research Collaboration  Funded projects  Start-ups  Papers  Patents
What is Industry saying? Insufficient talent pool – quality is lacking  Graduating students are not “industry-ready”  Productivity Issue  Related to attrition  Hiring experienced persons from outside India  Motivation factor  Should we rework the curriculum?
What is Industry saying? Public-domain tools are enough  Emphasize small projects and assignments in the course  Placement is disorganized – students interested in electronics are getting placed in software jobs  Target M.Tech and Ph.D. programs?  Students graduating from M.Tech programs are not industry ready
VSI Surveys Numbers – where are we today and where are we headed?  Electronics and Communications Computer Science/Engineering Both B.Tech level and Specialized man power (M.Tech)  Quality of man power  Survey results available from vdat yahoogroups
Projected Requirements 3000 persons required in 2006  500 experienced  2500 fresh engineers (100 companies)  150 M.Techs from IIT  150 B.Techs from IIT
What’s “Industry Ready”? Fundamentals  Frequently not answered questions: setup and hold delay, RC circuit operation, …  Ability to grasp concepts  If the student has understood what was taught in the curriculum, (s)he can be trained  Training is different from education  Industry does not expect VHDL and Verilog knowledge from students! That would be a bonus.
What’s “Industry Ready”? Applying concepts  Basic computer skills  At least one programming language, OS skills, …  Bonus: Exposure to TCL/TK, Perl, etc.   Soft skills (team work, …)
What should be emphasized, what should not To be emphasized  CMOS circuit design  Electronic Design Flow  Effect of Interconnects  Design Timing  Test and Verification   Emphasize less  BJT can be emphasized less   Electives
Debate – “Talent that is coming out of the Universities is not industry-ready” Strongly Disagree  The curriculum is already strong on fundamentals
Debate – “Talent that is coming out of the Universities is not industry-ready” Strongly Agree  Curriculum cannot be changed too often  Less resources are available for faculty recruitment, lab infrastructure, tools  Exposure to circuit design and semiconductors lacking (both students and faculty)  Students see more glamour in software/There are more opportunities in software  “ Readymade kits”  Less industry interaction (visits from industry and faculty internship programs)  Lack of motivation (device physics is less attractive)  Exams give little choice of learning
Academia’s Concerns If industry wants high quality, let them pay for it  Indian semiconductor/VLSI industries are not coming forward for Project training, ideas, data, guidance  Take faculty for deputation  Need long-term projects  Does any Indian semiconductor industry even want anything from the academia (other than students?)  Make this a win-win situation for all concerned (students, industry AND faculty)
Actors for Change
Actors for Change Government Industry Academia VSI – VLSI Society of India ISA – India Semiconductor Association
IT WB VLSI Design Park  Near Kharagpur IIT Campus, Kolkata  100 to 150 acres of land  20 to 30 million dollar in investment.  To house companies in development, manufacturing and assembly line. Directly linked with R&D at IIT  Joint Proposer - Mr. Deb Gupta, CTO of APSTL advanced Packaging & System Technology Laboratories, USA and an IIT Alumni. The state government is facilitating for  Funds - Meetings with Consul General of Japan, Kolkata and Embassy of Japan, Delhi (by APSTL, US, IIT, Kharagpur and IT WB) have been held. Land – considering favorably
Academia-Industry JV BITS-RIT APEX (Applied research and professional Excellence):  BITS Pilani  New York based Rochester Institute of Technology (RIT)  Indian Semiconductor Association (ISA).  Applied research lab in Bangalore Focus on cutting edge semi-conductor research and would also have basic and advanced courses.  BITS is investing around Rs 1.5 crore into the center Come up in July.  Indicative – Several other initiatives coming up
VSI – VLSI Society of India
VSI: VLSI Society of India The purpose of VSI is to contribute and promote the advancement of all aspects of VLSI technology, primarily in India: To promote all areas relating to VLSI field - materials, technology, process, design, application CAD/Design Automation, VLSI architectures, education, policies, etc.  To bring wide class of professionals from process technologies to specialists in VLSI architectures on one platform.  To provide impetus to infrastructural growth for technology development.   To provide impetus to human resources development.  Conduct periodic seminars/conferences/workshops in this area.  To bring out quality publications.  To continually formulate national goals for a sustained and vibrant VLSI industry.  To evolve standards and frameworks for achieving effective synergy.  To establish relations with other similar associations, national or international.
VSI Activities Regular Activities VLSI Design Conference (every Jan) VLSI Design and Test Symposium (every Aug) VLSI Education Day (every Aug) Other Activities Curriculum Discussions, Surveys Focused workshops (Low Power, Memory, DFT, ...) VLSI Education Workshops Publications VSI Newsletter Journal of the VSI
VED: VLSI Education Day Observed as a part of VDAT every year since 2000 The intent of VED is to bring together VLSI professionals in academia and industry and promote education, research and development in all aspects of VLSI in India.  VLSI Education Day includes programs such as: Keynote speeches from eminent personalities Panel Discussion on topics related to VLSI Education Invited talks from VLSI professionals Short tutorials on current topics Book Exhibition, IEEE/ACM booths, University Booth Poster Paper presentations from Indian Colleges
ISA – India Semiconductor Association
ISA: India Semiconductor Association Setup in Nov. 2004 at IT.com at Bangalore ISA is the premier national-level body for the semiconductor technology-driven industry in India. It’s a new entity and truly a global body with the active participation of semiconductor companies from the leading markets, including the US, EU and Asia.  Vision To establish India as the preferred global hub for excellence in creation of semiconductor products through technology leadership
ISA: Mission & Objectives The primary objective of ISA is to act as a catalyst for the growth of the semiconductor industry in India. Other objectives include: Create global awareness for Indian semiconductor industry outside of the generic “IT” umbrella  Create a win-win interaction amongst Semiconductor product and services companies, Government, Academia, VCs and Industry bodies Create an enabling ecosystem that catalyzes industry’s growth and leadership  Enhance Operational Efficiency  Identification of Investment opportunities   Foster active collaboration between Industry and Universities to further expand the available world-class Semiconductor talent pool   Drive technology vision for the Semiconductor industry
ISA: University Gateway Initiative (UGI) Objectives Invigorate research in semiconductors Technology Leadership Create sustainable tread-mill for talent generation Growth of India Semiconductor Industry
ISA: UGI: Focus Focus Areas Research Design Support & Fab access Student projects Faculty training, support, exchange Placement Curriculum / Course ware development VSI, MCIT collaboration Membership Mentorship Other Items
ISA: UGI: Research Research papers in international conferences An award system to create incentives Travel grants for international conferences Create a SRC like forum Participation from Industry & Universities Identify key thrust areas of research Invite & fund research proposals Publish a list of interesting research problems Similar to top 10 problems in Physical Design from ISPD Arrange visits / talks from leading researchers
ISA: UGI: Research Technnovation Initiative ‘ ISA-Technnovation Shield’ Awarded every year to an Academic Institution that excels in Technology Innovations in semiconductors and related areas ‘ ISA-Technnomentor of the Year’ Awarded every year to a faculty member for outstanding contribution in Technology Innovations in semiconductors and related areas ‘ ISA-Technnovators of the Year’ Awarded every year to top 5 students in the country with outstanding performance in technology innovation in semiconductors and related areas Patents and Research Publications as the yard sticks for technology innovation
ISA: UGI: Research Technnovation Initiative ‘ ISA-Technnowhizkids of the Year’ Semiconductor Industry aims to emerge as future for our nation and so are the young children in the school The idea is to catch them young ISA will partner with leading assessment institutions to create a nationwide contest on ‘innovative thinking’  Top 5 school children will be awarded ISA Technnowhizkids of the Year Award ‘ ISA PhD Fellowships’ An incentive program to support top talent to pursue research in India Will help fund the core research and provide financial scholarships to PhD students and their guides Will facilitate research collaboration with other nations in the world
ISA: UGI: Research Technnovation Initiative Life Time Achievement Award for Technnovation Awarded to a distinguished academician / researcher for significant contribution to Technology Innovations in India in the field of semiconductors and related areas
ISA: UGI: Design Activity – Support EDA Software Leverage Infrastructure created by SMDP/MCIT Work with MCIT to create a web portal for public domain tools ISA Facilitate EDA software acquisition for members (60+ universities already have access to EDA tools) Design kits Cell Libraries, I/O’s, memory compilers, process models Fabs (SCL, TSMC), I/P (Artisan, Virage) Design flows & Methodology Training to use the infrastructure Quarterly reviews Fab Access SCL, India Chip Program TSMC Shuttle
ISA: UGI: Academic Interaction Student Projects One of the Most frequent request Create a database of student projects topics Cover wide variety of topics of interest Solicit Ideas from member companies / Universities Short duration projects to support course curriculum Long duration projects used for practical training Need mentoring from industry (Technical, Financial) Active participation from faculty Background material for the projects
ISA: UGI: Academic Interaction Faculty & Student exchange Internship programs for students Faculty exchange programs Sponsored Sabbatical for summer in industry Visiting faculty from industry for short duration (1 week) Placement Major key incentive for the universities Lack of information about activities in universities Advanced placement (1 year ahead) Facilitate placement activities for member universities
ISA: UGI: Academic Interaction Curriculum / Courseware SMDP/VSI/Univ. have put together a good curriculum Need to support curriculum with courseware Augment with practical & Projects Courseware available electronically for wider usage MCIT / VSI MCIT & VSI have been doing a lot of work in this area Create partnership with MCIT to leverage infrastructure Partner & support VSI for conferences / workshops
ISA: UGI: Membership for Universities Awareness / Value Proposition Create awareness for opportunities in semiconductors Publicize benefits for ISA membership Create criteria for becoming ISA member
ISA: UGI: Membership for Universities Membership – Category-B Membership Fee – Rs. 10,000 / year Access to Design kits Support for student projects Possible mentoring relationship with ISA companies Membership – Category-A Membership Fee – Rs. 25,000 / year Additional Benefits Technovation Initiative Possible access to Fab-Shuttle program (Future) Summer Sabbatical program for faculty
ISA: UGI: Mentorship Facilitate Mentor Relationship Enlist ISA Industry members with commitment for Faculty hosting at their site Support & guidance of student projects Providing expert visiting faculty (Short-term) Help with course-work & curriculum Providing placement support for eligible universities ISA Plays a role of Facilitator based on needs
ISA: UGI: Other Items Create & Maintain database of university activities in India Survey to project talent generation requirements over next 5 years Work with MCIT on Hiring & Supporting additional faculty under SMDP-II program (2 per institutes) Extend IEEE-Explore facility to member universities Work with publishers to provide Indian edition of books
Summary We have a strategic position that ‘happened’ to us The opportunity is immense We are ahead - yet, competition is fast catching up We need to deliver through the production of abundant quality man power  We need to build a momentum around VSI and ISA to scale up to the required level
Contributors Dr. C P Ravikumar, TI As Secy, VSI Dr. G D Gautama, IT Secretary, WB Govt. Dr. Pradip Dutta, Synopsys Ms. Reena Mishra, Interra Systems  Dr. Uma Mahesh, Insilica As Secy, ISA
Thank You

Vlsi Education In India

  • 1.
    May 13, 2005VLSI Education in India Dr. Partha Pratim Das Interra Systems (India) Pvt. Ltd.
  • 2.
    “ India doesnot need a fabrication facility, but it does need a training program for chip design.” – Jaswinder S. Ahuja, Corporate VP & MD, Cadence India. EETimes, Nov 03, 2004
  • 3.
    Agenda VLSI ChronologyIndia Advantage Government Initiatives Jaipur Workshop on VLSI Education Actors for Change
  • 4.
    VLSI Education andR&D – A Chronology 1979-80 “ Introduction to VLSI System Design” by Mead and Conway in 1980 “ VLSI Design” courses based on MC by some IITs. Adoption of the book’s methodology by TIFR and CEERI for their design R&D work. Concurrently, MOS technology development related R&D work was being pursued at TIFR, CEERI and IITs.
  • 5.
    VLSI Chronology 1980-81Setting up of SCL and the “VLSI Task Force” by GoI. 1981-82 First commercial interactive layout design system (among academic and R&D institutes) installed at CEERI’s Delhi Centre under UNDP support. Mid 1980s Evolution of focused integrated electronics and circuits oriented ME/MTech degree programmes at IITs.
  • 6.
    VLSI Chronology 1985-86First multinational company, TI, sets up its R&D Centre in India (for EDA tool development and software verification). 1986-87 First real application of Mead-Conway methodology to design a full custom LSI processor – the PWM processor for variable frequency AC drives at CEERI, Pilani together with UCL, Belgium (under UNDP support).
  • 7.
    VLSI Chronology 1987-88Setting up of Academic and R&D VLSI Design Centres at IITs and CEERI under an initiative of DoE. Academic Centres equipped with Sun workstations VTI tools (an integrated tool-set for full-custom and semi-custom logic, circuit and layout design and verification) Semi-custom design tool “Vinyas” developed by ITI that ran on a particular brand of PC (the OMC PC-286 and PC-386). 10 industrial VLSI Design Centres were also set up by DoE – 5 under the charge of SCL and 5 under the charge of ITI.
  • 8.
    VLSI Chronology 1987-88Start of VLSI Design Workshop and International Conference. 1989 VSI Formed to foster education and research in VLSI
  • 9.
    VLSI Chronology Early1990s Successful chip design-developments by academic-R&D design centers : CEERI (for C-DoT) using VTI tools and VTI foundry. IIT-Kharagpur and Jadavpur University using Vinyas tools and ITI foundry. 1994 Introduction of VHDL in the Indian academia and R&D.
  • 10.
    VLSI Chronology 1997Start of the first industry-sponsored MTech programme – “VLSI Design, Tools and Technologies” (VDTT) programme at IIT-Delhi sponsored by Philips and co-sponsored by a number of other industries. Subsequently, TCS supports a MTech degree programme at IIT-Bombay.
  • 11.
    VLSI Chronology 1998DoE/MIT project – “ Special Manpower Development for VLSI Design and Related Software ” (SMDP): 9th plan. Start of VLSI Design & Test Workshop (VDAT). Around 2000 & Beyond Boom in Design Industry with every major setting up or trying to set up shops in India
  • 12.
    VLSI Chronology 2002Advanced VLSI Laboratory at IIT Kharagpur in collaboration with Natsem, Intel, Synopsys. 2004 ISA Launched 2005 Ganapati VLSI Laboratory at BESU, Kolkata VLSI Mtech Program at Radio Physics, CU, Kolkata
  • 13.
    VLSI Challenges –Evolution of VLSI Design Scenario 1.0 Mix of all into a Complex SoC 500 200 2005+ 0.9 RF, MEMS, SoC 100-200 100-200 2000 0.7 ASP, Analog, Mixed-Signal 30-50 30-50 1995 0.4 ASP, Chip-sets 10-15 10-12 1990 0.2 ASICs for Glue Logic 3-5 2-3 1985 MDI* Nature of Product Effort (Man-Years) Team Size (At Peak) Year
  • 14.
    Where are wetoday? Many major design companies (count the subsidiary industry as well) have an India Center Many more are working on a plan to setup Every India Center has a very aggressive growth plan
  • 15.
    Why India? IndiaOperations were fuelled by Cost Advantages Availability of an English speaking, electron-aware technical community India Operations have been supported by Positive Policy adoption Improving service attitude
  • 16.
    Why not India?India Operations are being deterred by Spiraling Costs Weakening Infrastructure Aggressive poaching India is failing to deliver in Quality Man-Power Quantity Man-Power
  • 17.
  • 18.
    SMDP: Phase IStarted 1998 Goals Market share for VLSI design from 0.5% to 5%
  • 19.
    SMDP: Phase ISalient Characteristics 19 Participating Institutes 7 Resource Center (RC), 12 Participating Institutes (PI) Rs. 15 Crores budget for 5 years Training of Faculty at PI’s Setting up VLSI Labs Development of learning material Teaching courses
  • 20.
    SMDP I: Man-PowerType-I: PhD in Microelectronics. Type-II: MTech (VLSI Design / Microelectronics) graduate from PIs – 250-300 / yr. Type-III: MTech graduate of other electronics disciplines (communications, control, . . . ) with at least two relevant VLSI courses. Type-IV: BTech of EE/ECE/CS exposed to two basic VLSI design courses.
  • 21.
    SMDP I: RC& PI IIT, Chennai IIT, Delhi IIT, Kanpur IIT, Kharagpur IIT, Bombay IISc, Bangalore CEERI, Pilani North BHU-IT, Varanasi IIT, Roorki Thapar Institute of Tech. Patiala South KREC, Surathkal REC, Warangal PSG College of Technology, Coimbatore West MREC, Jaipur VREC, Nagpur Shri G.S. Inst. Of Tech. & Sc., Indore East Bengal Engineering College, Howrah Jadavpur University, Kolkata REC, Rourkela
  • 22.
    SMDP: Phase IIReport prepared by TCS & IIT Bombay Promoting Microelectronic Education – The Indian Imperative 32 Institutes Identified in report 7 RC 25 PI Budget: Rs. 50 Crores / 5 Years
  • 23.
    SMDP: Phase IIResource Centers (7) IIT Chennai, Delhi, Kharagpur, Mumbai & Kanpur, IISc Bangalore, CEERI Pilani Participating Institutes (25) IIT Roorkee & Guwahati, Warangal, Surathkal, Tiruchirapalli, Rourkela, Motilal Nehru REC, Allahabad, B.R. Ambedkar REC, Jalandhar, Surat Nagpur, Hamirpur, Silchar, Kurukshetra, Calicut, Jaipur, Durgapur, Bhopal, Srinagar, Jamshedpur BEC, Jadavpur, G.S. I.T.S, Indore, Thapar, Patiala BHU-IT, PSG, Coimbatore
  • 24.
    SMDP: Phase IISalient Characteristics Continued VLSI Lab setup support (EDA SW, HW) Support for hiring 2 faculty members / institute Travel support for presenting papers Leverage SCL India Chip program Model Course Curriculum Access to IEEE Explore Plan for national website for public domain EDA software
  • 25.
    Academic Estimates Institutesoffering ME/MTech degree in VLSI / Microelectronics discipline 6 (IITs and IISc) 10 (NITs and Other) Institutes. Estimated Man-Power Total Core Faculty Pool Size : 60-70 Type-I Manpower/year : 8-12 Type-II Manpower/year : 250-300 Type-III Manpower/year : 150-200 Type-IV Manpower/year : 1,000-1,200
  • 26.
  • 27.
    VSI Opinion PollsHow many B.Tech/B.E. students with specialization in Semiconductors/VLSI do you think will be needed on an annual basis by 2010? Less than 5000 5000 – 7500 7500 – 10000 10,000 or more
  • 28.
    VSI Opinion PollsHow many B.Tech/B.E. students with specialization in Semiconductors/VLSI do you think will be needed on an annual basis by 2010? Less than 5000: 23% 5000 – 7500: 35% 7500 – 10000: 16% 10,000 or more: 24%
  • 29.
    VSI Opinion PollsHow many PG students with specialization in Semiconductors/VLSI do you think will be needed (annually) by 2010? Less than 500 500 – 1000 1000 – 2000 2000 – 3000 More than 3000
  • 30.
    VSI Opinion PollsHow many PG students with specialization in Semiconductors/VLSI do you think will be needed (annually) by 2010? Less than 500: 1% 500 – 1000: 12% 1000 – 2000: 26% 2000 – 3000: 16% More than 3000: 43%
  • 31.
    VSI Opinion PollsWhat is the number of B.Tech students graduating today with some specialization in Semiconductors/VLSI to take up a profession in the VLSI area? Less than 1000 1000 – 2000 2000 – 3000 3000 – 4000 More than 4000
  • 32.
    VSI Opinion PollsWhat is the number of B.Tech students graduating today with some specialization in Semiconductors/VLSI to take up a profession in the VLSI area? Less than 1000: 52% 1000 – 2000: 13% 2000 – 3000: 23% 3000 – 4000: 2% More than 4000: 7%
  • 33.
    VSI Opinion PollsWhat is the number of M.Tech students graduating today with specialization in Semiconductors/VLSI to take up a profession in VLSI? Less than 500 500 – 1000 More than 1000
  • 34.
    VSI Opinion PollsWhat is the number of M.Tech students graduating today with specialization in Semiconductors/VLSI to take up a profession in VLSI? Less than 500: 66% 500 – 1000: 27% More than 1000: 6%
  • 35.
    Jaipur Workshop onVLSI Education Compiled by: Dr. C P Ravikumar, TI & Secy, VSI March 12, 2005
  • 36.
    What constitutes “Talentin VLSI” ? Device Physics, VLSI Technology, Fabrication Transistor-level Circuit Knowledge Analog and mixed signal design, RF Design Digital Design (HDL) Synthesis Verification (Simulation, Formal Verification, …) EDA DFT Applications Signal Processing Networks Embedded Systems
  • 37.
    Goals of University– Industry Interaction Talent Pool Generation – growing the right kind of talent VLSI is a fast growing field and curriculum updates cannot keep pace Research Collaboration Funded projects Start-ups Papers Patents
  • 38.
    What is Industrysaying? Insufficient talent pool – quality is lacking Graduating students are not “industry-ready” Productivity Issue Related to attrition Hiring experienced persons from outside India Motivation factor Should we rework the curriculum?
  • 39.
    What is Industrysaying? Public-domain tools are enough Emphasize small projects and assignments in the course Placement is disorganized – students interested in electronics are getting placed in software jobs Target M.Tech and Ph.D. programs? Students graduating from M.Tech programs are not industry ready
  • 40.
    VSI Surveys Numbers– where are we today and where are we headed? Electronics and Communications Computer Science/Engineering Both B.Tech level and Specialized man power (M.Tech) Quality of man power Survey results available from vdat yahoogroups
  • 41.
    Projected Requirements 3000persons required in 2006 500 experienced 2500 fresh engineers (100 companies) 150 M.Techs from IIT 150 B.Techs from IIT
  • 42.
    What’s “Industry Ready”?Fundamentals Frequently not answered questions: setup and hold delay, RC circuit operation, … Ability to grasp concepts If the student has understood what was taught in the curriculum, (s)he can be trained Training is different from education Industry does not expect VHDL and Verilog knowledge from students! That would be a bonus.
  • 43.
    What’s “Industry Ready”?Applying concepts Basic computer skills At least one programming language, OS skills, … Bonus: Exposure to TCL/TK, Perl, etc. Soft skills (team work, …)
  • 44.
    What should beemphasized, what should not To be emphasized CMOS circuit design Electronic Design Flow Effect of Interconnects Design Timing Test and Verification Emphasize less BJT can be emphasized less Electives
  • 45.
    Debate – “Talentthat is coming out of the Universities is not industry-ready” Strongly Disagree The curriculum is already strong on fundamentals
  • 46.
    Debate – “Talentthat is coming out of the Universities is not industry-ready” Strongly Agree Curriculum cannot be changed too often Less resources are available for faculty recruitment, lab infrastructure, tools Exposure to circuit design and semiconductors lacking (both students and faculty) Students see more glamour in software/There are more opportunities in software “ Readymade kits” Less industry interaction (visits from industry and faculty internship programs) Lack of motivation (device physics is less attractive) Exams give little choice of learning
  • 47.
    Academia’s Concerns Ifindustry wants high quality, let them pay for it Indian semiconductor/VLSI industries are not coming forward for Project training, ideas, data, guidance Take faculty for deputation Need long-term projects Does any Indian semiconductor industry even want anything from the academia (other than students?) Make this a win-win situation for all concerned (students, industry AND faculty)
  • 48.
  • 49.
    Actors for ChangeGovernment Industry Academia VSI – VLSI Society of India ISA – India Semiconductor Association
  • 50.
    IT WB VLSIDesign Park Near Kharagpur IIT Campus, Kolkata 100 to 150 acres of land 20 to 30 million dollar in investment. To house companies in development, manufacturing and assembly line. Directly linked with R&D at IIT Joint Proposer - Mr. Deb Gupta, CTO of APSTL advanced Packaging & System Technology Laboratories, USA and an IIT Alumni. The state government is facilitating for Funds - Meetings with Consul General of Japan, Kolkata and Embassy of Japan, Delhi (by APSTL, US, IIT, Kharagpur and IT WB) have been held. Land – considering favorably
  • 51.
    Academia-Industry JV BITS-RITAPEX (Applied research and professional Excellence): BITS Pilani New York based Rochester Institute of Technology (RIT) Indian Semiconductor Association (ISA). Applied research lab in Bangalore Focus on cutting edge semi-conductor research and would also have basic and advanced courses. BITS is investing around Rs 1.5 crore into the center Come up in July. Indicative – Several other initiatives coming up
  • 52.
    VSI – VLSISociety of India
  • 53.
    VSI: VLSI Societyof India The purpose of VSI is to contribute and promote the advancement of all aspects of VLSI technology, primarily in India: To promote all areas relating to VLSI field - materials, technology, process, design, application CAD/Design Automation, VLSI architectures, education, policies, etc. To bring wide class of professionals from process technologies to specialists in VLSI architectures on one platform. To provide impetus to infrastructural growth for technology development.  To provide impetus to human resources development. Conduct periodic seminars/conferences/workshops in this area. To bring out quality publications. To continually formulate national goals for a sustained and vibrant VLSI industry. To evolve standards and frameworks for achieving effective synergy. To establish relations with other similar associations, national or international.
  • 54.
    VSI Activities RegularActivities VLSI Design Conference (every Jan) VLSI Design and Test Symposium (every Aug) VLSI Education Day (every Aug) Other Activities Curriculum Discussions, Surveys Focused workshops (Low Power, Memory, DFT, ...) VLSI Education Workshops Publications VSI Newsletter Journal of the VSI
  • 55.
    VED: VLSI EducationDay Observed as a part of VDAT every year since 2000 The intent of VED is to bring together VLSI professionals in academia and industry and promote education, research and development in all aspects of VLSI in India. VLSI Education Day includes programs such as: Keynote speeches from eminent personalities Panel Discussion on topics related to VLSI Education Invited talks from VLSI professionals Short tutorials on current topics Book Exhibition, IEEE/ACM booths, University Booth Poster Paper presentations from Indian Colleges
  • 56.
    ISA – IndiaSemiconductor Association
  • 57.
    ISA: India SemiconductorAssociation Setup in Nov. 2004 at IT.com at Bangalore ISA is the premier national-level body for the semiconductor technology-driven industry in India. It’s a new entity and truly a global body with the active participation of semiconductor companies from the leading markets, including the US, EU and Asia. Vision To establish India as the preferred global hub for excellence in creation of semiconductor products through technology leadership
  • 58.
    ISA: Mission &Objectives The primary objective of ISA is to act as a catalyst for the growth of the semiconductor industry in India. Other objectives include: Create global awareness for Indian semiconductor industry outside of the generic “IT” umbrella  Create a win-win interaction amongst Semiconductor product and services companies, Government, Academia, VCs and Industry bodies Create an enabling ecosystem that catalyzes industry’s growth and leadership Enhance Operational Efficiency Identification of Investment opportunities Foster active collaboration between Industry and Universities to further expand the available world-class Semiconductor talent pool Drive technology vision for the Semiconductor industry
  • 59.
    ISA: University GatewayInitiative (UGI) Objectives Invigorate research in semiconductors Technology Leadership Create sustainable tread-mill for talent generation Growth of India Semiconductor Industry
  • 60.
    ISA: UGI: FocusFocus Areas Research Design Support & Fab access Student projects Faculty training, support, exchange Placement Curriculum / Course ware development VSI, MCIT collaboration Membership Mentorship Other Items
  • 61.
    ISA: UGI: ResearchResearch papers in international conferences An award system to create incentives Travel grants for international conferences Create a SRC like forum Participation from Industry & Universities Identify key thrust areas of research Invite & fund research proposals Publish a list of interesting research problems Similar to top 10 problems in Physical Design from ISPD Arrange visits / talks from leading researchers
  • 62.
    ISA: UGI: ResearchTechnnovation Initiative ‘ ISA-Technnovation Shield’ Awarded every year to an Academic Institution that excels in Technology Innovations in semiconductors and related areas ‘ ISA-Technnomentor of the Year’ Awarded every year to a faculty member for outstanding contribution in Technology Innovations in semiconductors and related areas ‘ ISA-Technnovators of the Year’ Awarded every year to top 5 students in the country with outstanding performance in technology innovation in semiconductors and related areas Patents and Research Publications as the yard sticks for technology innovation
  • 63.
    ISA: UGI: ResearchTechnnovation Initiative ‘ ISA-Technnowhizkids of the Year’ Semiconductor Industry aims to emerge as future for our nation and so are the young children in the school The idea is to catch them young ISA will partner with leading assessment institutions to create a nationwide contest on ‘innovative thinking’ Top 5 school children will be awarded ISA Technnowhizkids of the Year Award ‘ ISA PhD Fellowships’ An incentive program to support top talent to pursue research in India Will help fund the core research and provide financial scholarships to PhD students and their guides Will facilitate research collaboration with other nations in the world
  • 64.
    ISA: UGI: ResearchTechnnovation Initiative Life Time Achievement Award for Technnovation Awarded to a distinguished academician / researcher for significant contribution to Technology Innovations in India in the field of semiconductors and related areas
  • 65.
    ISA: UGI: DesignActivity – Support EDA Software Leverage Infrastructure created by SMDP/MCIT Work with MCIT to create a web portal for public domain tools ISA Facilitate EDA software acquisition for members (60+ universities already have access to EDA tools) Design kits Cell Libraries, I/O’s, memory compilers, process models Fabs (SCL, TSMC), I/P (Artisan, Virage) Design flows & Methodology Training to use the infrastructure Quarterly reviews Fab Access SCL, India Chip Program TSMC Shuttle
  • 66.
    ISA: UGI: AcademicInteraction Student Projects One of the Most frequent request Create a database of student projects topics Cover wide variety of topics of interest Solicit Ideas from member companies / Universities Short duration projects to support course curriculum Long duration projects used for practical training Need mentoring from industry (Technical, Financial) Active participation from faculty Background material for the projects
  • 67.
    ISA: UGI: AcademicInteraction Faculty & Student exchange Internship programs for students Faculty exchange programs Sponsored Sabbatical for summer in industry Visiting faculty from industry for short duration (1 week) Placement Major key incentive for the universities Lack of information about activities in universities Advanced placement (1 year ahead) Facilitate placement activities for member universities
  • 68.
    ISA: UGI: AcademicInteraction Curriculum / Courseware SMDP/VSI/Univ. have put together a good curriculum Need to support curriculum with courseware Augment with practical & Projects Courseware available electronically for wider usage MCIT / VSI MCIT & VSI have been doing a lot of work in this area Create partnership with MCIT to leverage infrastructure Partner & support VSI for conferences / workshops
  • 69.
    ISA: UGI: Membershipfor Universities Awareness / Value Proposition Create awareness for opportunities in semiconductors Publicize benefits for ISA membership Create criteria for becoming ISA member
  • 70.
    ISA: UGI: Membershipfor Universities Membership – Category-B Membership Fee – Rs. 10,000 / year Access to Design kits Support for student projects Possible mentoring relationship with ISA companies Membership – Category-A Membership Fee – Rs. 25,000 / year Additional Benefits Technovation Initiative Possible access to Fab-Shuttle program (Future) Summer Sabbatical program for faculty
  • 71.
    ISA: UGI: MentorshipFacilitate Mentor Relationship Enlist ISA Industry members with commitment for Faculty hosting at their site Support & guidance of student projects Providing expert visiting faculty (Short-term) Help with course-work & curriculum Providing placement support for eligible universities ISA Plays a role of Facilitator based on needs
  • 72.
    ISA: UGI: OtherItems Create & Maintain database of university activities in India Survey to project talent generation requirements over next 5 years Work with MCIT on Hiring & Supporting additional faculty under SMDP-II program (2 per institutes) Extend IEEE-Explore facility to member universities Work with publishers to provide Indian edition of books
  • 73.
    Summary We havea strategic position that ‘happened’ to us The opportunity is immense We are ahead - yet, competition is fast catching up We need to deliver through the production of abundant quality man power We need to build a momentum around VSI and ISA to scale up to the required level
  • 74.
    Contributors Dr. CP Ravikumar, TI As Secy, VSI Dr. G D Gautama, IT Secretary, WB Govt. Dr. Pradip Dutta, Synopsys Ms. Reena Mishra, Interra Systems Dr. Uma Mahesh, Insilica As Secy, ISA
  • 75.

Editor's Notes

  • #2 Post Presentation: Presented to the seminar “VLSI Education & Research – The Present Perspective” at Purabi Das School of Information Technology, Bengal Engineering & Science University, Kolkata on the occasion of the inauguration of Ganapati Sengupta VLSI Laboratory on May 13, 2005. Dignitaries present included Prof. N Banerjee, VC of BESU, Prof. Barat, Prof. Hafizur Rahaman, Prof. Biplab Sikdar, Prof. P Pal Chausdhuri, Prof. Indranil Sengupta, Prof. Bhargab Bhattacharya, Prof. Susanta Sen and Mr. Ashish Auddy. Besides there were about 40-50 other teachers and students.
  • #3 Post Presentation: Prof. Pal Chaudhuri felt this was a motivated comment.
  • #16 Post Presentation: Some were upset with cost advantage as the first and foremost reason. Patriotically they felt, “Indian were just better”. Good to see such pride – I also wish this were true. For many, service attitude angle was a new idea.
  • #17 Post Presentation: Explained that VLSI business has started moving to Russia and Armenia.
  • #19 Post Presentation: Had a quick run-through on SMDP. Most people were already aware.
  • #28 Post Presentation: Most people found it difficult to believe these projections. We need to figure out (possibly publish) a report with some detailed analysis of where these high numbers are coming from.
  • #37 There were questions on what VSI sees as “Talent in VLSI” and we came up with this list jointly.
  • #38 Post Presentation: Some of the senior professors wanted to rank Research above Pool Generation. I defended that both are important and the quantity is needed in the industry to support quality.
  • #41 On March 12, 2005, we had a 2.5-hr debate on the topic of talent generation at the VSI Workshop on VLSI Education at Jaipur. I gave a background on the survey we are conducting – one survey has gone out to educational departments and another has gone out to industry. We are also doing an electronic poll.
  • #43 There was some heated debate on what universities can do in this direction and several people asked what “industry ready” means. I took a shot on what “industry ready” means for the industry. An interesting item that came from a Professor from Cochin. He said – up to class 12, they are in a competition mode and it is not easy to turn them to “cooperative” mode.
  • #44 Post Presentation: Explaining “Industry-Ready” concept to an academic crowd is a challenge. For example, someone asked what are soft skills and why should they be needed? After the talk one professor even commented that academia should not get into these nitty-gritty and rather focus on learning theory. I think VSI need to take a focused initiative to educate our friends in academia about “Industry-Readiness”.
  • #45 Post Presentation: Teacher wanted to understand how can they learn of the Design Flow. There is good source. I agree that this is a challenge. Possibly ISA’s UGI kind of initiative can quench that.
  • #46 We had an open debate and other than 2 Professors, everyone else took the “agree” stand. We tried to identify the reasons.
  • #47 We had an open debate and other than 2 Professors, everyone else took the “agree” stand. We tried to identify the reasons.
  • #51 Post Presentation: I explained that this is a sample – I am not showcasing the specific initiative. Expectedly, people wants to see more of such initiatives.
  • #52 Post Presentation: Again this was presented as an example of change.
  • #55 Post Presentation: There were questions on VSI and how can it help students. We need to give better shape and projection to whatever VSI does / plans.
  • #58 Post Presentation: This was information to most. There was very high interest to know what’s really going on.
  • #60 Post Presentation: Overall we spent about 30 minutes on UGI and there were number of queries from various quarters. I saw a high level of interest and expectation from the participants on this UGI program. We’ll need to keep this mind as and when we launch this.
  • #66 Post Presentation: The universities that have some industry EDA tools felt that it is rather tough to keep the tools up and running. Support loops with companies are usually long. They would like to see some support infrastructure & initiative from ISA-UGI on this.
  • #71 Post Presentation: Many universities present wanted to know of the memberships – how to start and when? I have advised them to keep an eye on the website.
  • #75 Post Presentation: Thank you.