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VLSI Technology and Design
1
III YEAR II SEMESTER ECE
( (AUTONOMOUS)
(AY: 2021-2022)
DR. G. PRASAD ACHARYA, ASSOCIATE PROFESSOR, ECE DEPT.
7C611
Course Objectives :
• The objectives of this course is to provide the students
an in-depth knowledge on various aspects of VLSI
circuits and their design including testing.
2
3
After studying this course, the students will be able to
• CO1: Understand the existing device technologies and IC fabrication
process
• CO2: Explore and analyze the electrical properties of the devices of CMOS
device.
• CO3: Design basic logic gates, combinational and sequential circuits using
CMOS logic.
• CO4: Analyze the effects of parasitic on IC power and performance.
• CO5: Design memory cells and basic data path units.
• CO6: Explore the need for testing and design verification of VLSI circuits.
Course Outcomes
Mapping between Course outcomes and
Program outcomes
4
CO PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9 PO 10 PO 11 PO 12 PSO1 PSO 2 PSO 3
CO1 3 3 2 2 2 3 2
CO2 2 2 2 2 2 1
CO3 2 1 3 2 2 3
CO4 3 3 2 2 2 2 3 3
CO5 3 3 2 2 2 2 1 3 2
CO6 3 2 2 2 2 1 3
CO 3 3 2 2 2 2 2 3 3
Syllabus
• UNIT I
INTRODUCTION TO MOS TECHNOLOGIES: MOS, PMOS, NMOS, CMOS &
BiCMOS
INTRODUCTION TO IC TECHNOLOGY AND FABRICATION PROCESS: VLSI
Design Flow, Oxidation, Lithography, Diffusion, Ion Implantation,
Metallisation, Encapsulation, Probe testing, Integrated Resistors and
Capacitors [T1-CH1, 2 & 3].
• UNIT II
BASIC ELECTRICAL PROPERTIES: Basic Electrical Properties of MOS and
BiCMOS Circuits: Ids-Vds relationships, MOS transistor threshold Voltage,
gm, gds, Figure of Merit (ωo), Zpu/Zpd, Latch-Up in CMOS, Pass Transistors
[T1-CH2]
INVERTERS: NMOS Inverter, Various Pull-Ups, CMOS Inverter Analysis and
Design, Bi-CMOS Inverters [T1-CH2]
• UNIT III Anupama Rani N, Assistant Professor,
ECE
5
Syllabus
• UNIT III
CIRCUIT DESIGN PROCESSES: MOS Layers, Stick Diagrams, Lamda-based
CMOS Design rules for Wires, Contacts and Transistors, Layout Diagrams
for NMOS and CMOS Inverters and Gates, Scaling of MOS circuits,
Limitations of Scaling. [T1-CH3]
GATES: CMOS Logic Gates and Structures, Switch logic, Layout Diagrams
Gates [T1-CH5]
• UNIT IV
DELAYS: Sheet Resistance Rs and its concept to MOS, Area Capacitance
Units, Calculations - Cg, τ-Delays, Driving large Capacitive Loads, Wiring
Capacitances, Fan-in and fan-out [T1- CH 4 & 5, T2-CH4]
Semiconductor Integrated circuit Design: PLD’s, Introduction to CPLD’s
and FPGA’s.
Anupama Rani N, Assistant Professor,
ECE
6
Syllabus
• UNIT V
MEMORY AND SUBSYSTEM DESIGN: Latches and Registers [T2-CH7],
Clocking strategies (Single Phase) [T1-CH5.5], Memory cells (SRAM &
DRAM), Adders, Shifter, Multipliers and ALUs [T1- CH8]
• UNIT VI
INTRODUCTION TO CMOS TESTING: CMOS Testing, Need for testing, Test
Principles, Design Strategies for Test, Chip level Test Techniques, System-
level Test Techniques [T1-CH7]
• TEXTBOOKS:
Basic VLSI Design –Douglas A. Pucknell, Kamran Eshraghian, PHI, 3rd Edition,2005.
Principles of CMOS VLSI Design - Weste and Eshraghian, Pearson Education, Second Edition,
2009.
• REFERENCES:
Chip Design for Submicron VLSI: CMOS Layout & Simulation, - John P. Uyemura, Thomson
Learning.
Introduction to VLSI Circuits and Systems - John .P. Uyemura, JohnWiley, 2003.
Digital Integrated Circuits: A Design Perspective - John M. Rabaey, 2/E, 2002
Modern VLSI Design - Wayne Wolf, Pearson Education, 3rd Edition, 1997.
VLSI Technology – S.M. SZE, 2nd Edition, TMH, 2003.
Anupama Rani N, Assistant Professor,
ECE
7
• Analog Layout Design.
• RTL Design.
• Design Verification.
• DFT.
• Physical Design.
• Physical Verification.
• Post Silicon Validation etc.
Sub-areas in VLSI
Job opportunities in VLSI
1. Design Engineer
Front-end designer – ASIC/FPGA
Back-end designer
AMS designer
DFT engineer
PCB designer – Board design
Library developer
2.Verification Engineer
Front-end verification engineers
Validation engineers
Modeling engineers
Verification Consultants
Integrated Circuits
 What is an Integrated Circuit?
 Where do you use an Integrated Circuit?
 Why do you prefer an Integrated Circuit to
the circuits made by interconnecting discrete
components?
11
Def: The “Integrated Circuit “ or IC is a
miniature, low cost electronic circuit
consisting of active and passive components
that are irreparably joined together on a
single crystal chip of silicon.
12
In 1958 Jack Kilby of Texas Instruments invented first IC
13
The Transistor Revolution
First transistor
Bell Labs, 1948
invention of the
transistor
at Bell Telephone
Laboratories in1947
[ Bardeen], followed by
the introduction of the
bipolar transistor by
Schockley in
1949 [Schockley]
14
The First Integrated Circuits
Bipolar logic
1960’s
ECL 3-input Gate
Motorola 1966
- TTL had the advantage, however, of offering a
higher integration density and was the basis of
the first integrated circuit revolution.
-In fact, the manufacturing of TTL components is
what spear-headed the first large semiconductor
companies such as Fair-child, National, and
Texas Instruments.
- The family was so successful that it composed
the largest fraction of the digital semiconductor
market until the 1980s.
15
Intel 4004 Micro-Processor
1971
1000 transistors
1 MHz operation
Handcrafted
These processors were
implemented in NMOS-
only logic, which has the
advantage of higher
speed over the PMOS
logic.
First 4Kbit MOS memory :1970
16
Intel Pentium (IV) microprocessor
year 2000
~40 million transistors
Hierarchical approach
17
Moore’s Law (amazing visionary)
In 1965, Gordon Moore noted that the number
of transistors on a chip doubled every 18 to 24
months.
He made a prediction that semiconductor
technology will double its effectiveness every 18
months
* Integration density and performance of integrated circuits have gone
through an astounding revolution in the last couple of decades.
18
Moore’s Law
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
LOG
2
OF
THE
NUMBER
OF
COMPONENTS
PER
INTEGRATED
FUNCTION
Electronics, April 19, 1965.
In 1965, Gordon Moore noted that the number of transistors
on a chip doubled every 18 to 24 months.
He made a prediction that semiconductor technology will
double its effectiveness every 18 months
19
Transistor Counts
1,000,000
100,000
10,000
1,000
10
100
1
1975 1980 1985 1990 1995 2000 2005 2010
8086
80286
i386
i486
Pentium®
Pentium® Pro
K
1 Billion
Transistors
Source: Intel
Projected
Pentium® II
Pentium® III
Courtesy, Intel
20
Moore’s law in Microprocessors
4004
8008
8080
8085 8086
286
386
486
Pentium® proc
P6
0.001
0.01
0.1
1
10
100
1000
1970 1980 1990 2000 2010
Year
Transistors
(MT)
2X growth in 1.96 years!
Transistors on Lead Microprocessors double every 2 years
Courtesy, Intel
Communication
Control
Instrumentation
Computer
Electronics
21
Applications of an
Integrated Circuit
Small size
Low cost
Less weight
Low supply voltages
Low power consumption
Highly reliable
Matched devices
Fast speed
22
Advantages:
Chip size and Complexity
• Invention of Transistor (Ge) - 1947
• Development of Silicon - 1955-1959
• Silicon Planar Technology - 1959
23
Anupama Rani N, Assistant Professor, ECE 24

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Vlsi td introduction

  • 1. VLSI Technology and Design 1 III YEAR II SEMESTER ECE ( (AUTONOMOUS) (AY: 2021-2022) DR. G. PRASAD ACHARYA, ASSOCIATE PROFESSOR, ECE DEPT. 7C611
  • 2. Course Objectives : • The objectives of this course is to provide the students an in-depth knowledge on various aspects of VLSI circuits and their design including testing. 2
  • 3. 3 After studying this course, the students will be able to • CO1: Understand the existing device technologies and IC fabrication process • CO2: Explore and analyze the electrical properties of the devices of CMOS device. • CO3: Design basic logic gates, combinational and sequential circuits using CMOS logic. • CO4: Analyze the effects of parasitic on IC power and performance. • CO5: Design memory cells and basic data path units. • CO6: Explore the need for testing and design verification of VLSI circuits. Course Outcomes
  • 4. Mapping between Course outcomes and Program outcomes 4 CO PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9 PO 10 PO 11 PO 12 PSO1 PSO 2 PSO 3 CO1 3 3 2 2 2 3 2 CO2 2 2 2 2 2 1 CO3 2 1 3 2 2 3 CO4 3 3 2 2 2 2 3 3 CO5 3 3 2 2 2 2 1 3 2 CO6 3 2 2 2 2 1 3 CO 3 3 2 2 2 2 2 3 3
  • 5. Syllabus • UNIT I INTRODUCTION TO MOS TECHNOLOGIES: MOS, PMOS, NMOS, CMOS & BiCMOS INTRODUCTION TO IC TECHNOLOGY AND FABRICATION PROCESS: VLSI Design Flow, Oxidation, Lithography, Diffusion, Ion Implantation, Metallisation, Encapsulation, Probe testing, Integrated Resistors and Capacitors [T1-CH1, 2 & 3]. • UNIT II BASIC ELECTRICAL PROPERTIES: Basic Electrical Properties of MOS and BiCMOS Circuits: Ids-Vds relationships, MOS transistor threshold Voltage, gm, gds, Figure of Merit (ωo), Zpu/Zpd, Latch-Up in CMOS, Pass Transistors [T1-CH2] INVERTERS: NMOS Inverter, Various Pull-Ups, CMOS Inverter Analysis and Design, Bi-CMOS Inverters [T1-CH2] • UNIT III Anupama Rani N, Assistant Professor, ECE 5
  • 6. Syllabus • UNIT III CIRCUIT DESIGN PROCESSES: MOS Layers, Stick Diagrams, Lamda-based CMOS Design rules for Wires, Contacts and Transistors, Layout Diagrams for NMOS and CMOS Inverters and Gates, Scaling of MOS circuits, Limitations of Scaling. [T1-CH3] GATES: CMOS Logic Gates and Structures, Switch logic, Layout Diagrams Gates [T1-CH5] • UNIT IV DELAYS: Sheet Resistance Rs and its concept to MOS, Area Capacitance Units, Calculations - Cg, τ-Delays, Driving large Capacitive Loads, Wiring Capacitances, Fan-in and fan-out [T1- CH 4 & 5, T2-CH4] Semiconductor Integrated circuit Design: PLD’s, Introduction to CPLD’s and FPGA’s. Anupama Rani N, Assistant Professor, ECE 6
  • 7. Syllabus • UNIT V MEMORY AND SUBSYSTEM DESIGN: Latches and Registers [T2-CH7], Clocking strategies (Single Phase) [T1-CH5.5], Memory cells (SRAM & DRAM), Adders, Shifter, Multipliers and ALUs [T1- CH8] • UNIT VI INTRODUCTION TO CMOS TESTING: CMOS Testing, Need for testing, Test Principles, Design Strategies for Test, Chip level Test Techniques, System- level Test Techniques [T1-CH7] • TEXTBOOKS: Basic VLSI Design –Douglas A. Pucknell, Kamran Eshraghian, PHI, 3rd Edition,2005. Principles of CMOS VLSI Design - Weste and Eshraghian, Pearson Education, Second Edition, 2009. • REFERENCES: Chip Design for Submicron VLSI: CMOS Layout & Simulation, - John P. Uyemura, Thomson Learning. Introduction to VLSI Circuits and Systems - John .P. Uyemura, JohnWiley, 2003. Digital Integrated Circuits: A Design Perspective - John M. Rabaey, 2/E, 2002 Modern VLSI Design - Wayne Wolf, Pearson Education, 3rd Edition, 1997. VLSI Technology – S.M. SZE, 2nd Edition, TMH, 2003. Anupama Rani N, Assistant Professor, ECE 7
  • 8. • Analog Layout Design. • RTL Design. • Design Verification. • DFT. • Physical Design. • Physical Verification. • Post Silicon Validation etc. Sub-areas in VLSI
  • 9. Job opportunities in VLSI 1. Design Engineer Front-end designer – ASIC/FPGA Back-end designer AMS designer DFT engineer PCB designer – Board design Library developer 2.Verification Engineer Front-end verification engineers Validation engineers Modeling engineers Verification Consultants
  • 10.
  • 11. Integrated Circuits  What is an Integrated Circuit?  Where do you use an Integrated Circuit?  Why do you prefer an Integrated Circuit to the circuits made by interconnecting discrete components? 11
  • 12. Def: The “Integrated Circuit “ or IC is a miniature, low cost electronic circuit consisting of active and passive components that are irreparably joined together on a single crystal chip of silicon. 12 In 1958 Jack Kilby of Texas Instruments invented first IC
  • 13. 13 The Transistor Revolution First transistor Bell Labs, 1948 invention of the transistor at Bell Telephone Laboratories in1947 [ Bardeen], followed by the introduction of the bipolar transistor by Schockley in 1949 [Schockley]
  • 14. 14 The First Integrated Circuits Bipolar logic 1960’s ECL 3-input Gate Motorola 1966 - TTL had the advantage, however, of offering a higher integration density and was the basis of the first integrated circuit revolution. -In fact, the manufacturing of TTL components is what spear-headed the first large semiconductor companies such as Fair-child, National, and Texas Instruments. - The family was so successful that it composed the largest fraction of the digital semiconductor market until the 1980s.
  • 15. 15 Intel 4004 Micro-Processor 1971 1000 transistors 1 MHz operation Handcrafted These processors were implemented in NMOS- only logic, which has the advantage of higher speed over the PMOS logic. First 4Kbit MOS memory :1970
  • 16. 16 Intel Pentium (IV) microprocessor year 2000 ~40 million transistors Hierarchical approach
  • 17. 17 Moore’s Law (amazing visionary) In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months * Integration density and performance of integrated circuits have gone through an astounding revolution in the last couple of decades.
  • 18. 18 Moore’s Law 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 LOG 2 OF THE NUMBER OF COMPONENTS PER INTEGRATED FUNCTION Electronics, April 19, 1965. In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months
  • 19. 19 Transistor Counts 1,000,000 100,000 10,000 1,000 10 100 1 1975 1980 1985 1990 1995 2000 2005 2010 8086 80286 i386 i486 Pentium® Pentium® Pro K 1 Billion Transistors Source: Intel Projected Pentium® II Pentium® III Courtesy, Intel
  • 20. 20 Moore’s law in Microprocessors 4004 8008 8080 8085 8086 286 386 486 Pentium® proc P6 0.001 0.01 0.1 1 10 100 1000 1970 1980 1990 2000 2010 Year Transistors (MT) 2X growth in 1.96 years! Transistors on Lead Microprocessors double every 2 years Courtesy, Intel
  • 22. Small size Low cost Less weight Low supply voltages Low power consumption Highly reliable Matched devices Fast speed 22 Advantages:
  • 23. Chip size and Complexity • Invention of Transistor (Ge) - 1947 • Development of Silicon - 1955-1959 • Silicon Planar Technology - 1959 23
  • 24. Anupama Rani N, Assistant Professor, ECE 24