[Capella Day 2019] Model execution and system simulation in CapellaObeo
A common need in system architecture design is to verify that if the architect is correct and can satisfy its requirements. Execution of system architect model means to interact with state machines to test system’s control logic. It can verify if the logical sequences of functions and interfaces in different scenarios are desired.
However, only sequence itself is not enough to verify its consequence or output. So we need each function to do what it is supposed to do during model execution to verify its output, and that is what we called “system simulation”.
This presentation introduces how we do model execution in Capella, and how to embed digital mockup inside functions to do “system simulation” with a higher confidence.
Renfei Xu, Glaway
Renfei Xu is the technical manager of MBSE solution in Glaway. He has participated in many pilot projects of MBSE in areas like Engine Control, Avionics, Mechatronics and so on. In recent years, he is responsible for the deployment of MBSE using Capella and ARCADIA methodology in a Radar research institute.
Wenhua Fang, Glaway
Wenhua Fang is the Director of Systems Engineering in Glaway. He has more than 12 years of working experience in SE.
He is responsible for more than 10 implementation projects of MBSE in areas like Aircraft, Engine Control, Avionics, Automotive and so on. In recent years, he leads the team to deploy MBSE in China(including using Capella and ARCADIA methodology).
[Capella Day 2019] Model execution and system simulation in CapellaObeo
A common need in system architecture design is to verify that if the architect is correct and can satisfy its requirements. Execution of system architect model means to interact with state machines to test system’s control logic. It can verify if the logical sequences of functions and interfaces in different scenarios are desired.
However, only sequence itself is not enough to verify its consequence or output. So we need each function to do what it is supposed to do during model execution to verify its output, and that is what we called “system simulation”.
This presentation introduces how we do model execution in Capella, and how to embed digital mockup inside functions to do “system simulation” with a higher confidence.
Renfei Xu, Glaway
Renfei Xu is the technical manager of MBSE solution in Glaway. He has participated in many pilot projects of MBSE in areas like Engine Control, Avionics, Mechatronics and so on. In recent years, he is responsible for the deployment of MBSE using Capella and ARCADIA methodology in a Radar research institute.
Wenhua Fang, Glaway
Wenhua Fang is the Director of Systems Engineering in Glaway. He has more than 12 years of working experience in SE.
He is responsible for more than 10 implementation projects of MBSE in areas like Aircraft, Engine Control, Avionics, Automotive and so on. In recent years, he leads the team to deploy MBSE in China(including using Capella and ARCADIA methodology).
A microprocessor is an electronic component that is used by a computer to do its work. It is a central processing unit on a single integrated circuit chip containing millions of very small components including transistors, resistors, and diodes that work together.
Model Predictive Control Implementation with LabVIEWyurongwang1
This presentation was presented at National Instruments NIWeek 2007 to demonstrate how to use LabVIEW to implement model predictive control (MPC) strategies to control complicated coax manufacturing processes. Both MatLAB MPC and LabVIEW MPC were implemented in these applications.
A macro processor is a system software. Macro is that the Section of code that the programmer writes (defines) once, and then can use or invokes many times.
The critical routines within signal processing algorithms are typically data intensive and iterate many times, carrying out the same functions on multi-dimensional arrays and input streams. These routines use the vast majority of an implementation’s resources, and for the longest time over the course of the algorithms execution. Such routines are classed as Nested-Loop Programs. Whether the implementation is software running on a processor or a higher performance customized hardware implementation, there is always a tradeoff between the throughput performance (execution-time) and the resources used such as the amount of processor memory and registers in a software implementation or the gate-count in a hardware implementation. This article shows the reader techniques and methods for manipulating a signal processing algorithm, in particular those conforming to a Nested-Loop Program, and the different generic implementation architectures along this tradeoff spectrum, as well as the different methods for describing and analyzing an algorithm implementation. Each of these methods for describing an algorithm is shown to correspond to a different abstraction-level view and as such exposes different features and properties for ease of analysis and manipulation. Manipulation techniques, mainly algorithmic-transformations are described and it is shown how these transformations take an implementation and form a new one at a different point in the trade-off spectrum of resources used versus throughput by performing calculations in a different order and a different way to arrive at the same result.
A microprocessor is an electronic component that is used by a computer to do its work. It is a central processing unit on a single integrated circuit chip containing millions of very small components including transistors, resistors, and diodes that work together.
Model Predictive Control Implementation with LabVIEWyurongwang1
This presentation was presented at National Instruments NIWeek 2007 to demonstrate how to use LabVIEW to implement model predictive control (MPC) strategies to control complicated coax manufacturing processes. Both MatLAB MPC and LabVIEW MPC were implemented in these applications.
A macro processor is a system software. Macro is that the Section of code that the programmer writes (defines) once, and then can use or invokes many times.
The critical routines within signal processing algorithms are typically data intensive and iterate many times, carrying out the same functions on multi-dimensional arrays and input streams. These routines use the vast majority of an implementation’s resources, and for the longest time over the course of the algorithms execution. Such routines are classed as Nested-Loop Programs. Whether the implementation is software running on a processor or a higher performance customized hardware implementation, there is always a tradeoff between the throughput performance (execution-time) and the resources used such as the amount of processor memory and registers in a software implementation or the gate-count in a hardware implementation. This article shows the reader techniques and methods for manipulating a signal processing algorithm, in particular those conforming to a Nested-Loop Program, and the different generic implementation architectures along this tradeoff spectrum, as well as the different methods for describing and analyzing an algorithm implementation. Each of these methods for describing an algorithm is shown to correspond to a different abstraction-level view and as such exposes different features and properties for ease of analysis and manipulation. Manipulation techniques, mainly algorithmic-transformations are described and it is shown how these transformations take an implementation and form a new one at a different point in the trade-off spectrum of resources used versus throughput by performing calculations in a different order and a different way to arrive at the same result.
Performance doesn’t have the same definition between system administrators, developpers and business teams. What is Performance ? High CPU usage, not scalable web site, low business transaction rate per sec, slow response time, … This presentation is about maths, code performance, load testing, web performance, best practices, … Working on performance optimizaton is a very broad topic. It’s important to really understand main concepts and to have a clean and strong methodology because it could be a very time consumming activity. Happy reading !
This calculator has been developed by me. It gives high precision results which
Normal calculator can not give. It is helpful in calculations for Space technology,
Supercomputers, Nano technology etc. I can give this calculator to interested people.
The Roman Empire A Historical Colossus.pdfkaushalkr1407
The Roman Empire, a vast and enduring power, stands as one of history's most remarkable civilizations, leaving an indelible imprint on the world. It emerged from the Roman Republic, transitioning into an imperial powerhouse under the leadership of Augustus Caesar in 27 BCE. This transformation marked the beginning of an era defined by unprecedented territorial expansion, architectural marvels, and profound cultural influence.
The empire's roots lie in the city of Rome, founded, according to legend, by Romulus in 753 BCE. Over centuries, Rome evolved from a small settlement to a formidable republic, characterized by a complex political system with elected officials and checks on power. However, internal strife, class conflicts, and military ambitions paved the way for the end of the Republic. Julius Caesar’s dictatorship and subsequent assassination in 44 BCE created a power vacuum, leading to a civil war. Octavian, later Augustus, emerged victorious, heralding the Roman Empire’s birth.
Under Augustus, the empire experienced the Pax Romana, a 200-year period of relative peace and stability. Augustus reformed the military, established efficient administrative systems, and initiated grand construction projects. The empire's borders expanded, encompassing territories from Britain to Egypt and from Spain to the Euphrates. Roman legions, renowned for their discipline and engineering prowess, secured and maintained these vast territories, building roads, fortifications, and cities that facilitated control and integration.
The Roman Empire’s society was hierarchical, with a rigid class system. At the top were the patricians, wealthy elites who held significant political power. Below them were the plebeians, free citizens with limited political influence, and the vast numbers of slaves who formed the backbone of the economy. The family unit was central, governed by the paterfamilias, the male head who held absolute authority.
Culturally, the Romans were eclectic, absorbing and adapting elements from the civilizations they encountered, particularly the Greeks. Roman art, literature, and philosophy reflected this synthesis, creating a rich cultural tapestry. Latin, the Roman language, became the lingua franca of the Western world, influencing numerous modern languages.
Roman architecture and engineering achievements were monumental. They perfected the arch, vault, and dome, constructing enduring structures like the Colosseum, Pantheon, and aqueducts. These engineering marvels not only showcased Roman ingenuity but also served practical purposes, from public entertainment to water supply.
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June 3, 2024 Anti-Semitism Letter Sent to MIT President Kornbluth and MIT Cor...Levi Shapiro
Letter from the Congress of the United States regarding Anti-Semitism sent June 3rd to MIT President Sally Kornbluth, MIT Corp Chair, Mark Gorenberg
Dear Dr. Kornbluth and Mr. Gorenberg,
The US House of Representatives is deeply concerned by ongoing and pervasive acts of antisemitic
harassment and intimidation at the Massachusetts Institute of Technology (MIT). Failing to act decisively to ensure a safe learning environment for all students would be a grave dereliction of your responsibilities as President of MIT and Chair of the MIT Corporation.
This Congress will not stand idly by and allow an environment hostile to Jewish students to persist. The House believes that your institution is in violation of Title VI of the Civil Rights Act, and the inability or
unwillingness to rectify this violation through action requires accountability.
Postsecondary education is a unique opportunity for students to learn and have their ideas and beliefs challenged. However, universities receiving hundreds of millions of federal funds annually have denied
students that opportunity and have been hijacked to become venues for the promotion of terrorism, antisemitic harassment and intimidation, unlawful encampments, and in some cases, assaults and riots.
The House of Representatives will not countenance the use of federal funds to indoctrinate students into hateful, antisemitic, anti-American supporters of terrorism. Investigations into campus antisemitism by the Committee on Education and the Workforce and the Committee on Ways and Means have been expanded into a Congress-wide probe across all relevant jurisdictions to address this national crisis. The undersigned Committees will conduct oversight into the use of federal funds at MIT and its learning environment under authorities granted to each Committee.
• The Committee on Education and the Workforce has been investigating your institution since December 7, 2023. The Committee has broad jurisdiction over postsecondary education, including its compliance with Title VI of the Civil Rights Act, campus safety concerns over disruptions to the learning environment, and the awarding of federal student aid under the Higher Education Act.
• The Committee on Oversight and Accountability is investigating the sources of funding and other support flowing to groups espousing pro-Hamas propaganda and engaged in antisemitic harassment and intimidation of students. The Committee on Oversight and Accountability is the principal oversight committee of the US House of Representatives and has broad authority to investigate “any matter” at “any time” under House Rule X.
• The Committee on Ways and Means has been investigating several universities since November 15, 2023, when the Committee held a hearing entitled From Ivory Towers to Dark Corners: Investigating the Nexus Between Antisemitism, Tax-Exempt Universities, and Terror Financing. The Committee followed the hearing with letters to those institutions on January 10, 202
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Biological screening of herbal drugs: Introduction and Need for
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3. Program-level performance
analysis
Need to understand
performance in detail:
Real-time behavior, not
just typical.
On complex platforms.
Program performance
CPU performance:
Pipeline, cache are
windows into program.
We must analyze the entire
program.
4. Complexities of program
performance
Varies with input data:
Different-length paths.
Cache effects.
Instruction-level performance variations:
Pipeline interlocks.
Fetch times.
5. How to measure program
performance
Simulate execution of the CPU.
Makes CPU state visible.
Measure on real CPU using timer.
Requires modifying the program to control
the timer.
Measure on real CPU using logic analyzer.
Requires events visible on the pins.
6. Program performance
metrics
Average-case execution time.
Typically used in application programming.
Worst-case execution time.
A component in deadline satisfaction.
Best-case execution time.
Task-level interactions can cause best-case
program behavior to result in worst-case
system behavior.
7. Elements of program
performance
Basic program execution time formula:
execution time = program path + instruction timing
Solving these problems independently helps
simplify analysis.
Easier to separate on simpler CPUs.
Accurate performance analysis requires:
Assembly/binary code.
Execution platform.
8. Data-dependent paths in
an if statement
if (a || b) { /* T1 */
if ( c ) /* T2 */
x = r*s+t; /* A1 */
else y=r+s; /* A2 */
z = r+s+u; /* A3 */
}
else {
if ( c ) /* T3 */
y = r-t; /* A4 */
}
a b c path
0 0 0 T1=F, T3=F: no assignments
0 0 1 T1=F, T3=T: A4
0 1 0 T1=T, T2=F: A2, A3
0 1 1 T1=T, T2=T: A1, A3
1 0 0 T1=T, T2=F: A2, A3
1 0 1 T1=T, T2=T: A1, A3
1 1 0 T1=T, T2=F: A2, A3
1 1 1 T1=T, T2=T: A1, A3
9. Paths in a loop
for (i=0, f=0; i<N; i++)
f = f + c[i] * x[i];
i=0
f=0
i=N
f = f + c[i] * x[i]
i = i + 1
N
Y
10. Instruction timing
Not all instructions take the same amount of time.
Multi-cycle instructions.
Fetches.
Execution times of instructions are not independent.
Pipeline interlocks.
Cache effects.
Execution times may vary with operand value.
Floating-point operations.
12. Physical measurement
In-circuit emulator allows tracing.
Affects execution timing.
Logic analyzer can measure behavior at pins.
Address bus can be analyzed to look for events.
Code can be modified to make events visible.
Particularly important for real-world input
streams.
13. CPU simulation
Some simulators are less accurate.
Cycle-accurate simulator provides
accurate clock-cycle timing.
Simulator models CPU internals.
Simulator writer must know how CPU works.
14. Performance optimization
motivation
Embedded systems must often meet
deadlines.
Faster may not be fast enough.
Need to be able to analyze execution
time.
Worst-case, not typical.
Need techniques for reliably improving
execution time.
15. Programs and performance
analysis
Best results come from analyzing
optimized instructions, not high-level
language code:
non-obvious translations of HLL statements
into instructions;
code may move;
cache effects are hard to predict.
21. Cache analysis
Loop nest: set of loops, one inside other.
Perfect loop nest: no conditionals in nest.
Because loops use large quantities of
data, cache conflicts are common.
22. Array conflicts in cache
a[0,0]
b[0,0]
main memory cache
1024 4099
...
1024
4099
23. Array conflicts, cont’d.
Array elements conflict because they are
in the same line, even if not mapped to
same location.
Solutions:
move one array;
pad array.
24. Performance optimization
hints
Use registers efficiently.
Use page mode memory accesses.
Analyze cache behavior:
instruction conflicts can be handled by
rewriting code, rescheudling;
conflicting array data can be moved, padded.
26. Energy/power optimization
Energy: ability to do work.
Most important in battery-powered systems.
Power: energy per unit time.
Important even in wall-plug systems---power
becomes heat.
28. Cache behavior is
important
Energy consumption has a sweet spot as
cache size changes:
cache too small: program thrashes, burning
energy on external memory accesses;
cache too large: cache itself burns too much
power.
33. Data size minimization
Reuse constants, variables, data buffers in
different parts of code.
Requires careful verification of correctness.
Encapsulating functions in subroutines when
done carefully can reduce program size
35. Program validation and
testing
Concentrate here on functional verification.
Major testing strategies:
Black box doesn’t look at the source code.
Clear box (white box) does look at the
source code.
36. Clear-box testing
Examine the source code to determine whether
it works:
Can you actually exercise a path?
Do you get the value you expect along a path?
Testing procedure:
Controllability: rovide program with inputs.
Execute.
Observability: examine outputs.
37. Execution paths and
testing
Paths are important in functional testing
as well as performance analysis.
In general, an exponential number of
paths through the program.
Show that some paths dominate others.
Heuristically limit paths.
38. Choosing the paths to test
Possible criteria:
Execute every
statement at least
once.
Execute every branch
direction at least once.
Equivalent for
structured programs.
Not true for gotos.
not covered
39. Basis paths
Approximate CDFG
with undirected
graph.
Undirected graphs
have basis paths:
All paths are linear
combinations of basis
paths.
44. Loop testing
Loops need specialized tests to be tested
efficiently.
Heuristic testing strategy:
Skip loop entirely.
One loop iteration.
Two loop iterations.
# iterations much below max.
n-1, n, n+1 iterations where n is max.
46. Black-box test vectors
Random tests.
May weight distribution based on software
specification.
Regression tests.
Tests of previous versions, bugs, etc.
May be clear-box tests of previous versions.
47. What atlast?
Must have the knowledge of compiler opt.
Well worse in Embedded C
To interpret the data structures whenever needed
Must know the DFG and CDFG
Wide knowledge on processor (target)
Techniques in prog optimization
Develop the code which occupies less memory space
with much features
Smart usage of loops in the code
