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DrUshaMehta24-07-2017
[Courtesy: ITRS]](https://image.slidesharecdn.com/2017tvec1introduction-180131082824/85/Testing-and-Verification-of-Electronics-Circuits-Introduction-30-320.jpg)
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Testing and Verification of Electronics Circuits : Introduction
This document discusses testing and verification of electronic circuits. It begins by acknowledging sources used to create the presentation. It then discusses how testing has become increasingly important as designs grow more complex, with verification now consuming 70% of effort. Testing ensures functionality and finds defects, helping prevent costly issues later. The relationship between testers and other roles is sometimes tense as testing finds problems but does not generate revenue. However, thorough testing helps gain user trust and reuse, reducing costs from redesigns. It outlines the various stages of testing from verification to diagnose issues and improve processes. The goal is thorough testing to detect defects before systems reach users.
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Testing and Verification of Electronics Circuits : Introduction
- 1. Introduction: Testing and Verificationof Electronic Circuits Dr Usha Mehta usha.mehta@ieee.org usha.mehta@nirmauni.ac.in 1 DrUshaMehta24-07-2017
- 2. Acknowledgement….. This presentation hasbeen summarized from various books, papers, websites and presentations on VLSI Design and its various topics all over the world. I couldn’t item-wise mention from where these large pull of hints and work come. However, I’d like to thank all professors and scientists who created such a good work on this emerging field. Without those efforts in this very emerging technology, these notes and slides can’t be finished. 2 DrUshaMehta24-07-2017
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- 6. System Development … ProjectStarts here…. 6 DrUshaMehta24-07-2017 Courtesy: https://asiketltestanalyst.wordpress.com/tag/tom-and-jerry/
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- 9. Tom has forgottenthat “Nothing is perfect…….” 9 DrUshaMehta24-07-2017
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- 12. The code deployment! 12 DrUshaMehta24-07-2017
- 13. Defect reported byTester….. 13 DrUshaMehta24-07-2017
- 14. Development Lead talksto Developer about Defect….. 14 DrUshaMehta24-07-2017
- 15. Developer is excusing…. “itis not a defect” 15 DrUshaMehta24-07-2017
- 16. Tester is explaining… “It is the Defect!” 16 DrUshaMehta24-07-2017
- 17. Developer fixed theDefect ! 17 DrUshaMehta24-07-2017
- 18. The defect isfixed and retested 18 DrUshaMehta24-07-2017
- 19. Developer and Testerhave gone for Holiday after the deployment . 19 DrUshaMehta24-07-2017
- 20. After they comeback ! they came to know the project is running successfully in the Production!!!!! 20 DrUshaMehta24-07-2017
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- 22. Tester…from Designer pointof view….. • The relationship between the tester and everyone else in the project team has been like …. 22 DrUshaMehta24-07-2017
- 23. Why so love-haterelationship? Can you prove the lion exists ? Can you prove the ghost does not exist? Testing can only show the presence of errors, never their absence. -Edsger Djikstra 23 DrUshaMehta24-07-2017
- 24. Tester….. From Production Housepoint of view….. “Bugfree Design” does not give any extra revenue but bugs in design are very costly!!!! • Pentium bug • Intel Pentium chip, released in 1994 produced error in floating point division • Cost : $475 million • ARIANE Failure • In December 1996, the Ariane 5 rocket exploded 40 seconds after take off . A software components threw an exception • Cost : $400 million payload. • Therac-25 Accident : • Therac-25 was a radiation therapy machine produced by Atomic Energy of Canada Limited (AECL) in 1982 • A software failure caused wrong dosages of x-rays. • Cost: Human Loss. 24 DrUshaMehta24-07-2017
- 25. • Incorrect specifications. •Misinterpretation of specifications. • Misunderstanding between designers. • Missed cases. • Protocol non-conformance. • Resource conflicts • Cycle-level timing errors. • …… 25 DrUshaMehta24-07-2017 Respin…. 65 % of chips fail at first silicon Tester….. From Production House point of view…..
- 26. • Costly re-spin(s) •Companies may miss out market window • Large companies can have reputation at stake – e.g. Pentium Bug • Smaller companies can have hard to recover financial implications • For start-ups, their existence itself can be at stake! 26 DrUshaMehta24-07-2017
- 27. Tester….. From User Pointof View….. 27 DrUshaMehta24-07-2017 Does user really value testing?
- 28. Tester Designer hates Consumer don’t care about Production house Does notwant 28 DrUshaMehta24-07-2017
- 29. Even though….. testing isimportant….. 29 DrUshaMehta24-07-2017 • Does testing directly generate any revenue? • Does designer like testing? • Does it generate “trust” ? • Does trust generate “reusability”? • Does reusability generate “revenue”?
- 30. Why testing isof too much importance in today’s semiconductor world….. 30 DrUshaMehta24-07-2017 [Courtesy: ITRS]
- 31. Testing and Verificationin Current Scenario • While the silicon capacity continues to increase along the Moore’s law, the efforts required to verify these designs have increased even a greater rate : doubling roughly every six to nine months. • In the era of multimillion gate Asics, reusable IPs, and SoC designs, 70% of the total efforts consumed by verification. • Number of verification, validation, testing engineer is three the number of RTL design engineer • When design projects are completed, test benches makes up 80% of the total code volume. • Most of the job openings in India is in this field. • Design Hubs in Ahmedabad/Gujarat • Verification Hubs in Ahmedabad/Gujarat 31 DrUshaMehta24-07-2017
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- 34. Once they grow…… 34 DrUshaMehta24-07-2017 Cost– Rule of 10 It costs 10 times more to test a device as we move to higher level in the product manufacturing process
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- 37. Architectural Behavioural RTL Gate Transistor Physical Unpacked Chip 37 DrUshaMehta24-07-2017 Circuit Chip, Components,Interconnects… System System on Chip Network on Chip Prototype Testing Mass Production Testing System @ Field
- 38. Role of Testingin General • Verification • will any fault occur? • Validation • will fault occur during mass production? • Detection • Is there any fault? Yes or no? • Diagnosis • Where is the fault? • Device Characterization • Why the fault occurred? (Is design wrong or test process wrong?) • Failure Mode Analysis (FMA) • How that fault can be prevented? (Is manufacturing process wrong?) • Burn-In • Will it work for longer life? • Speed Binning • What is the speed of device? • Acceptance Testing/Incoming Inspection • Should I use it in my system? 38 DrUshaMehta24-07-2017
- 39. Verification • Verifies thecorrectness of Design • Performed once prior to manufacturing process • Performed by simulation, hardware emulation or formal methods • Responsible for quality of design • Like sonography used for unborn baby during pregnancy 39 DrUshaMehta24-07-2017
- 40. Validation • After thefirst lot of prototypes are manufactured, IC goes through, design validation/pilot-run stage. • It checks that either the fabrication process was correct and fabricated IC is correct. ( Here it is assumed that design was error free) • AC, DC, Functional Test • Probing internal chip nodes also • Special tools like scanning electron Microscope, electron beam scanner, artificial intelligent technique etc, are used • Like Newborn sreening tests for baby 40 DrUshaMehta24-07-2017
- 41. Diagnosis • Identify thefault that exists in system. • Which fault is there (type of fault)? • Where is that fault (fault location)? • Like after a set of pathological test, the doctor diagnosis your disease. 41 DrUshaMehta24-07-2017
- 42. Device Characterization • Determinationand correction of errors in device and/or test procedure • So that the next lot of IC will be error free. • Like doctor writes a prescription of medicine to cure your disease. • Here there is a difference between man and IC!!!!!!!!! 42 DrUshaMehta24-07-2017
- 43. Failure Mode Analysis •Why/How/when the fault had occurred? • Determine the manufacturing process errors that may have caused the fault. • Like determining why that disease occurred and find the preventive actions (bad health /food habits) which created disease 43 DrUshaMehta24-07-2017
- 44. Detection (testing ingeneral…) • Does any of the fault exists? • Which, why, how, where, when is out of scope here. • Only YES/NO. Go/No Go test for IC to be shipped to market or not. • At fabrication unit • For all fabricated IC • Less comprehensive than characterization • Test should have high fault coverage, low cost and minimum test time • Are you completely fit? Does any of the disease there? • Like medical test for army ( if fit then go, otherwise no go) 44 DrUshaMehta24-07-2017
- 45. Burn-In/Stress Test • Tostress the chip to accelerate the failure mechanism • Some chip passes the production test but will fail very quickly thereafter • To increase temp and/or voltage while applying test patterns • Infant Mortality Failures: 10-30 Hrs • Freak Failure: 100-1000Hrs 45 DrUshaMehta24-07-2017
- 46. Acceptance Testing/ Incoming Inspection •Customer performs this test • Like universal tester to test the IC at our Digital Electronics Labs 46 DrUshaMehta24-07-2017
- 47. • Specification • Finalizationof specification • Behavioural Description/RTL code • Functional Verification • Gate level netlist • Static timing analysis • Circuit level • Propagation delay • Physical Domain • Layout vs Schematic (LVS) • During Fabrication • Wafer testing • Pilot lot production • Validation • Mass production • Testing • Burn-In • Speed Binning • Yield loss • Diagnosis • Failure Mode Analysis • Before use • Acceptance/Incoming Testing • In-System 47 DrUshaMehta24-07-2017
- 48. Verification • On Design (functionality, estimatedspeed) • Pre-silicon • One time • Methods: • Simulation • Emulation • formal methods • A Design Bug • Makes all Fabricated IC useless Detection/Testing • On Device (manufactured hardware) • Post-Silicon • On all ICs, i.e. every time IC is fabricated • Methods: • Test Generation • Test Application • A fabrication defect • May cause all ICs or Some of the ICs useless. 48 DrUshaMehta24-07-2017
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- 51. Test Principal forDigital Circuits 51 DrUshaMehta24-07-2017
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- 53. Mid Test…. Calculatethe time required to test a 64 bit adder at the speed of 1 GHz 64 bit adder => 129 inputs, 65 outputs • Is it possible???????????????????????? • The manufacturing house wants to complete it into few mins only. 53 DrUshaMehta24-07-2017
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