This document discusses functional verification for system companies that use FPGAs. It outlines the typical hardware development flow and pain points companies experience without verification, such as long integration times and bugs found late. The value of adopting functional verification principles from the ASIC world is presented, including defining test plans, using verification tools, and hiring verification experts. Case studies show benefits like shorter debug cycles, less time to market, and reduced effort. Functional verification can help FPGA designs get to the lab cleaner and work as specified even when software changes. The document concludes with background on the company Veriest, which provides functional verification consulting and services.