Intellectual property (IP) in VLSI design refers to reusable logic or functionality units that can be licensed and used as building blocks in chip designs. There are two main types of IP: hard IP, which includes a pre-designed layout, and soft IP, which is delivered as synthesizable code. Soft IP is more vulnerable to theft since it is in a synthesizable form. Memories are often delivered as hard IP since they require careful analog design and peripheral circuitry to be useful. IP differs from custom chip design in that it is created before a specific use, with the goal of reuse across multiple designs. The IP lifecycle involves initial creation through specification, design, testing, and documentation, followed by integration into

1. INTELLECTUAL PROPERTY IN
VLSI
1. What do you mean by Intellectual Property (IP) in VLSI Design?
An Intellectual Property (IP) in VLSI design is a reusable unit of logic or
functionality or a cell or a layout design that is normally developed with
the idea of licensing to multiple vendor for using as building blocks in different
chip designs.
All designers will either design IP for others or use IP in their own designs. IP-
based design is crucial even in the microprocessor world, where a chip
consists entirely of one or more CPUs and cache. Several different versions of
a processor family are needed to fill the product space; designing the
processor as reusable IP makes much more sense than starting from scratch
each time. And as multicore processors come to dominate the microprocessor
world, processors must be replicated on the die.
2. How many types of IPs are there? Discuss about them in brief.
SoC design teams often make use of IP blocks in order to improve their
productivity. An IP block is a pre-designed component that can be used in a
larger design.
There are two major types of IP:
i. Hard IP:
 Comes as a pre-designed layout.
 Because a full layout is available, the block’s size, performance, and power
consumption can be accurately measured.
 Hard IP blocks are process-specific, which means that if the hard IP block is
to be used in a different process, it must be redesigned.

2.  A given process may dictate that certain types of signals appear on certain
layers; an IP library may further dictate that certain types of signals appear at
specific positions on the block.
 The block must also be defined to an electrical standard—it must be able to
drive a certain load at some specified delay, for example.
Example: The simplest and earliest example of a hard IP block is the
standard cell (a gate-level IP component).
ii. Soft IP:
 Comes as a synthesizable module in a hardware description language such
as Verilog or VHDL.
 Soft IP can be more easily targeted to new technologies but it is harder to
characterize and may not be as small or as fast as hard IP.
 The design time savings of soft IP often outweigh the cost and performance
savings, even for large IP blocks like a CPU.
Example: Synthesizable RTL models, developed in one of the Hardware
description language like System Verilog or VHDL.
3. What is a wrapper in the context of soft IPs?
Although details of the physical interface to the IP block can be handled by the
design flow, a soft IP block must still be designed to implement an interface
that allows it to be connected to other blocks on the chip. In some cases, a
block’s interface may need to be changed—for example, if a different type of
bus is used to connect the blocks. The logic used to adapt the interface is
often called a wrapper.
4. What vulnerability do soft IPs suffer from?
Because a soft IP block is delivered in synthesizable form, it is more easily
stolen than a hard IP block. Soft IP vendors may tag their blocks to more
easily trace their source.
5. Give examples of IPs that can be used across entire design hierarchy.

3. Standard cells, register-transfer modules, memories, buses, CPUs, I/O
devices
6. Discuss memories as IPs in the context of VLSI design.
 They’re analog designs that must be carefully crafted.
 They are necessarily delivered as hard IP for all but the simplest of memories.
 They also require a great deal of peripheral circuitry to be useful in systems.
7. How does an IP differ from a custom chip?
IP differs from custom chip design in that it is designed well before it is used.
8. With the help of a flow diagram demonstrate the life cycle of an IP.
The following figure shows IP life cycle in two stages: IP creation and IP use.

4. Creation starts with a specification and goes through all the normal design
processes, using hardware description languages and, in the case of hard IP,
layout design tools. However, the IP modules go through more extensive
testing since they will be used many times. IP creation results in the IP
modules themselves, plus documentation and database descriptions. The
database information is used by design tools for layout, performance analysis,
etc. All this information feeds into standard chip design processes.