SlideShare a Scribd company logo
IOSR Journal of Engineering (IOSRJEN) www.iosrjen.org
ISSN (e): 2250-3021, ISSN (p): 2278-8719
Vol. 04, Issue 04 (April. 2014), ||V2|| PP 54-57
International organization of Scientific Research 54 | P a g e
Chemical extraction controlled by (FPGA), programmed by
(VHDL).
Zuhir Nemer Alaarajš, Abdelrasoul Jabar Alzubaidi²
1 Sudan Academy of Sciences (SAS); Council of Engineering Researches & Industrial Technologies
2 Electronic Dept. - Engineering College –Sudan University of science and Technology
Abstract: - The field programmable gate array (FPGA) is an integrated circuit designed to be configured by the
customer or designer after manufacturing—hence field programmable". The FPGA configuration is generally
specified using a hardware description language (HDL), similar to that used for an application-specific
integrated circuit (ASIC). FPGAs can be use to implement any logical function that an ASIC could perform.
FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable
interconnects that allow the blocks to be "wired together"—somewhat like many (changeable) logic gates that
can be inter-wired in (many) different configurations, as shown in figure (1). Logic blocks can be configured to
perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs,
the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of
memory.
There are numerous options for designers in selecting a hardware platform for custom electronics
design, ranging from embedded processors, application specific integrated circuits (ASICs), programmable
microprocessor, FPGAs to programmable logic devices (PLDs). The decision to choose a specific technology
such as an FPGA should depend primarily on the design requirements. Therefore, if the hardware requirements
require a higher level of performance, say up several 100 MHz operation, then an FPGA offers a suitable level
of performance. [4]
To define the behavior of the FPGA is performed by programming it by a very high speed integrated circuit
hardware description language (VHDL). [1]
Figure (1) internal structure of FPGA
I. PROBLEM STATEMENT
It’s a multi-sensing control system design based on FPGA and programmed by VHDL language .Its
objective is to build a chemical extraction instrument that depends on the boiling point of the components. We
took here as example of extraction of acetone from water (acetone 60% and water 40%).
II. METHODOLOGY
This paper explains the methodology of programming the FPGA device, as a control device.
The following schematic diagram –figure (2) - shows the basic parts of this process.
Chemical extraction controlled by (FPGA), programmed by (VHDL)
International organization of Scientific Research 55 | P a g e
Figure (2) Basic Parts of Extraction Instrument
 A, B &C: valves.
 1, 2: temperature sensors.
 3: concentration sensor.
III. OBJECTIVES
1. Develop a computer program – VHDL – language.
2.Download the program into FPGA.
3.Program the FPGA as multi-sensing control system of chemical compounds extraction instrument.
IV. SOFTWARE PROGRAM & ALGORITHMS
To achieve the objective of control, we divide the program into four parts and then compile all the four parts in
top module as shown in figure (3).
The result is giving pure acetone (99%).
The program controls the system by sensing the purity. If the output is not the demanded concentration, valve
(B) opens and valve (C) closes to repeat the operation –figure (2).
Figure (3) Four Programs Code
V. VHDL SYNTHESIS
VHDL synthesis is the next step in the design, which converts the design in the behavioral description file into
gates. The synthesis tools figure out what gates to be used based on a VHDL program file.
Chemical extraction controlled by (FPGA), programmed by (VHDL)
International organization of Scientific Research 56 | P a g e
VI. DESIGN IMPLEMENTATION
 The Components for the design are:
1. General Architecture of FPGA.
2. LM 35 Temperature Sensor.
3. Valves.
4. Concentration Sensor.
Figure (4) Block Diagram of IPs/OPs of FPGA
X: FPGA pins no. (7:0): A7, L13, L14, A8, A11, C4, H18 and N17.
Y: FPGA pins no. (7:0): D13, E13, H13, V4, D18, G9, A16 and A14.
VII. RESULT &OBSERVATION
The control system is programmed by VHDL language , then downloaded to the FPGA .Hence a
designed control system of extraction acetone from water based on different boiling points of the compound is
achieved.
We found out that FPGA has huge facilities to control systems according to the ability of the FPGA to
execute the commands in a parallel way that widens the range of controlled elements with less delay time. The
same thing in VHDL language, in spite of its complicated language, but we think that it is the right choice to
program complicated control system. It is suitable for a system that needs fast execution of commands. [2]
The disadvantage of FPGA is high cost compared to other controller devices.
The relationship between inputs and outputs are shown in tables (1) and (2).
Input output
Actual_temp (FPGA pins) Cooler(FPGA pin)
A14 A16 G9 D18 V4 H13 E12 D13 E12
0 1 1 1 0 0 0 0 1
Else 0
Table (1) Output (cooler)
Input output
Conce_in: (FPGA pins) vout(FPGA pin)
A7 L13 L14 A8 A11 C4 H18 N17 F12
0 1 1 0 0 0 1 1 1
Else 0
Table (2) Output (Vout)
VIII. CONCLUSION
A problem usually has multiple solutions, and a process can usually be controlled using different
controllers based on different methods. Almost every control method has its merits and weaknesses. What is
important is to use the right controller to fit the application at a minimum cost.
With continuous development and progress in electronics fields and control systems, the answer of this question
is always fluctuant or uneven.
Chemical extraction controlled by (FPGA), programmed by (VHDL)
International organization of Scientific Research 57 | P a g e
In the recent years, there has been a technical revolution in the semiconductor industry and in the
electronics industry, which has significantly developed the existing technologies in industrial control.
This technical development in both the semiconductor and the electronics industries have evolved industrial
control into both real-time control and distributed control. Real-time control requires controllers to capture all
the significant target activities and to deliver their responses as swiftly as possible so that system performance is
never degraded. Distributed control indicates that controls are performed by a number of controllers and
executed in a group of independent agents or units that are physically and electronically connected and
communicate with each other. This tendency in industrial control has led to the future continuation of both real-
time control and distributed control.
The (FPGA) have now approached intelligence similar to that of microprocessors, so that they are performing
more important functional role in various control systems.
REFERENCES
[1] Volnei A. Pedroni, Circuit Design with VHDL, MIT press, Massachusts, 2004.
[2] Peng Zhang, Industrial Control Tecnology,William Andrew, N. Y., 2008.
[3] ISE Simulator (ISim), UG682 (v1.0), 2009.
[4] www.fpga4fun.com.

More Related Content

What's hot

Fpg as 11 body
Fpg as 11 bodyFpg as 11 body
Fpg as 11 body
Rameez Raja
 
Introduction to FPGA, VHDL
Introduction to FPGA, VHDL  Introduction to FPGA, VHDL
Introduction to FPGA, VHDL
Amr Rashed
 
Verilog
VerilogVerilog
Verilog
Mohamed Rayan
 
PLC Programming Languages
PLC Programming LanguagesPLC Programming Languages
PLC Programming Languages
LIJU. G. CHACKO
 
Low power reduced instruction set architecture using clock gating technique
Low power reduced instruction set architecture using clock gating techniqueLow power reduced instruction set architecture using clock gating technique
Low power reduced instruction set architecture using clock gating technique
VLSICS Design
 
PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...
PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...
PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...
SANTIAGO PABLO ALBERTO
 
International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)
IJERD Editor
 
An introdution to MPLAB
An introdution to MPLABAn introdution to MPLAB
An introdution to MPLAB
Emanuele Bonanni
 
Fpga architectures and applications
Fpga architectures and applicationsFpga architectures and applications
Fpga architectures and applications
Sudhanshu Janwadkar
 
Synthesis & FPGA Implementation of UART IP Soft Core
Synthesis & FPGA Implementation of UART IP Soft CoreSynthesis & FPGA Implementation of UART IP Soft Core
Synthesis & FPGA Implementation of UART IP Soft Core
ijsrd.com
 
Fpga(field programmable gate array)
Fpga(field programmable gate array) Fpga(field programmable gate array)
Fpga(field programmable gate array)
Iffat Anjum
 
Real Time Clock Interfacing with FPGA
Real Time Clock Interfacing with FPGAReal Time Clock Interfacing with FPGA
Real Time Clock Interfacing with FPGA
Mafaz Ahmed
 
Ab PLC Cables Drivers Sample
Ab PLC Cables Drivers SampleAb PLC Cables Drivers Sample
Ab PLC Cables Drivers Sample
Business Industrial Network
 
Basics of plc_programming1
Basics of plc_programming1Basics of plc_programming1
Basics of plc_programming1
Enhmandah Hemeelee
 
Fpga based motor controller
Fpga based motor controllerFpga based motor controller
Fpga based motor controller
Uday Wankar
 
PLC Programming Introduction
PLC Programming IntroductionPLC Programming Introduction
PLC Programming Introduction
PranavAutomation
 
Verilog HDL
Verilog HDLVerilog HDL
Verilog HDL
Mantra VLSI
 
IRJET- Design of Fault Injection Technique for Digital HDL Models
IRJET-  	  Design of Fault Injection Technique for Digital HDL ModelsIRJET-  	  Design of Fault Injection Technique for Digital HDL Models
IRJET- Design of Fault Injection Technique for Digital HDL Models
IRJET Journal
 
PLC Architecture
PLC ArchitecturePLC Architecture
PLC Architecture
PranavAutomation
 
Module 2 ARM CORTEX M3 Instruction Set and Programming
Module 2 ARM CORTEX M3 Instruction Set and ProgrammingModule 2 ARM CORTEX M3 Instruction Set and Programming
Module 2 ARM CORTEX M3 Instruction Set and Programming
Amogha Bandrikalli
 

What's hot (20)

Fpg as 11 body
Fpg as 11 bodyFpg as 11 body
Fpg as 11 body
 
Introduction to FPGA, VHDL
Introduction to FPGA, VHDL  Introduction to FPGA, VHDL
Introduction to FPGA, VHDL
 
Verilog
VerilogVerilog
Verilog
 
PLC Programming Languages
PLC Programming LanguagesPLC Programming Languages
PLC Programming Languages
 
Low power reduced instruction set architecture using clock gating technique
Low power reduced instruction set architecture using clock gating techniqueLow power reduced instruction set architecture using clock gating technique
Low power reduced instruction set architecture using clock gating technique
 
PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...
PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...
PLC: Principios bĂĄsicos del controlador lĂłgico programable mediante el softwa...
 
International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)
 
An introdution to MPLAB
An introdution to MPLABAn introdution to MPLAB
An introdution to MPLAB
 
Fpga architectures and applications
Fpga architectures and applicationsFpga architectures and applications
Fpga architectures and applications
 
Synthesis & FPGA Implementation of UART IP Soft Core
Synthesis & FPGA Implementation of UART IP Soft CoreSynthesis & FPGA Implementation of UART IP Soft Core
Synthesis & FPGA Implementation of UART IP Soft Core
 
Fpga(field programmable gate array)
Fpga(field programmable gate array) Fpga(field programmable gate array)
Fpga(field programmable gate array)
 
Real Time Clock Interfacing with FPGA
Real Time Clock Interfacing with FPGAReal Time Clock Interfacing with FPGA
Real Time Clock Interfacing with FPGA
 
Ab PLC Cables Drivers Sample
Ab PLC Cables Drivers SampleAb PLC Cables Drivers Sample
Ab PLC Cables Drivers Sample
 
Basics of plc_programming1
Basics of plc_programming1Basics of plc_programming1
Basics of plc_programming1
 
Fpga based motor controller
Fpga based motor controllerFpga based motor controller
Fpga based motor controller
 
PLC Programming Introduction
PLC Programming IntroductionPLC Programming Introduction
PLC Programming Introduction
 
Verilog HDL
Verilog HDLVerilog HDL
Verilog HDL
 
IRJET- Design of Fault Injection Technique for Digital HDL Models
IRJET-  	  Design of Fault Injection Technique for Digital HDL ModelsIRJET-  	  Design of Fault Injection Technique for Digital HDL Models
IRJET- Design of Fault Injection Technique for Digital HDL Models
 
PLC Architecture
PLC ArchitecturePLC Architecture
PLC Architecture
 
Module 2 ARM CORTEX M3 Instruction Set and Programming
Module 2 ARM CORTEX M3 Instruction Set and ProgrammingModule 2 ARM CORTEX M3 Instruction Set and Programming
Module 2 ARM CORTEX M3 Instruction Set and Programming
 

Viewers also liked

Seo Certified Professional - Ankur Batla
Seo Certified Professional - Ankur BatlaSeo Certified Professional - Ankur Batla
Seo Certified Professional - Ankur Batla
ankurbatla
 
It newsletter jan mar-14
It newsletter jan mar-14It newsletter jan mar-14
It newsletter jan mar-14
Arvind Joshi
 
Christmascard6
Christmascard6Christmascard6
Christmascard6
Theodoula Liampa
 
Retreat agreements
Retreat agreementsRetreat agreements
Retreat agreementsiamkim
 
TYPO3 - The Future of DAM
TYPO3 - The Future of DAMTYPO3 - The Future of DAM
TYPO3 - The Future of DAM
Ingmar Schlecht
 
Estrategia reforma energĂŠtica AMLO 22S
Estrategia reforma energĂŠtica AMLO 22SEstrategia reforma energĂŠtica AMLO 22S
Estrategia reforma energĂŠtica AMLO 22S
Monalisa1234567
 
la niĂąa enojona
la niĂąa enojonala niĂąa enojona
la niĂąa enojona
plebonaviejona
 
Why the Mona Lisa is so Famous!
Why the Mona Lisa is so Famous!Why the Mona Lisa is so Famous!
Why the Mona Lisa is so Famous!
Tyler Wilkinson San Diego
 
Mini book isabel&fĂĄbio
Mini book isabel&fĂĄbioMini book isabel&fĂĄbio
Mini book isabel&fĂĄbio
Helena Gomes
 
Jedilniki 2011 marec
Jedilniki 2011 marecJedilniki 2011 marec
Jedilniki 2011 marec
Gurmanski Hram
 
HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...
HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...
HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...
husouza
 
Fall 1 a 9
Fall 1 a 9Fall 1 a 9
Fall 1 a 9
jordanlachance
 
ns_2008_Annual_Report
ns_2008_Annual_Reportns_2008_Annual_Report
ns_2008_Annual_Report
finance41
 
Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...
Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...
Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...
Observatorio de PrĂĄcticas Innovadoras en el Manejo de Enfermedades CrĂłnicas Complejas (OPIMEC)
 
Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...
Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...
Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...
LucianDronca
 
My favourite place casey
My favourite place caseyMy favourite place casey
My favourite place casey
Limey22
 
Traccia1istr
Traccia1istrTraccia1istr
Traccia1istrigogi
 
Tv scheduling activity
Tv scheduling activityTv scheduling activity
Tv scheduling activity
WOOD97
 

Viewers also liked (18)

Seo Certified Professional - Ankur Batla
Seo Certified Professional - Ankur BatlaSeo Certified Professional - Ankur Batla
Seo Certified Professional - Ankur Batla
 
It newsletter jan mar-14
It newsletter jan mar-14It newsletter jan mar-14
It newsletter jan mar-14
 
Christmascard6
Christmascard6Christmascard6
Christmascard6
 
Retreat agreements
Retreat agreementsRetreat agreements
Retreat agreements
 
TYPO3 - The Future of DAM
TYPO3 - The Future of DAMTYPO3 - The Future of DAM
TYPO3 - The Future of DAM
 
Estrategia reforma energĂŠtica AMLO 22S
Estrategia reforma energĂŠtica AMLO 22SEstrategia reforma energĂŠtica AMLO 22S
Estrategia reforma energĂŠtica AMLO 22S
 
la niĂąa enojona
la niĂąa enojonala niĂąa enojona
la niĂąa enojona
 
Why the Mona Lisa is so Famous!
Why the Mona Lisa is so Famous!Why the Mona Lisa is so Famous!
Why the Mona Lisa is so Famous!
 
Mini book isabel&fĂĄbio
Mini book isabel&fĂĄbioMini book isabel&fĂĄbio
Mini book isabel&fĂĄbio
 
Jedilniki 2011 marec
Jedilniki 2011 marecJedilniki 2011 marec
Jedilniki 2011 marec
 
HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...
HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...
HOSTILIDADES EM REDE: FIREWALLS REAIS PARA O CIBERESPAÇO (Apresentação de def...
 
Fall 1 a 9
Fall 1 a 9Fall 1 a 9
Fall 1 a 9
 
ns_2008_Annual_Report
ns_2008_Annual_Reportns_2008_Annual_Report
ns_2008_Annual_Report
 
Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...
Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...
Esteban de manuel_keenoy_la_estratificacin_en_la_estrategia_de_integracin_de_...
 
Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...
Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...
Bancile Romanesti din Transilvania in Perioada Dualismului Austro Ungar (1867...
 
My favourite place casey
My favourite place caseyMy favourite place casey
My favourite place casey
 
Traccia1istr
Traccia1istrTraccia1istr
Traccia1istr
 
Tv scheduling activity
Tv scheduling activityTv scheduling activity
Tv scheduling activity
 

Similar to I04425457

Programmable logic controller performance enhancement by field programmable g...
Programmable logic controller performance enhancement by field programmable g...Programmable logic controller performance enhancement by field programmable g...
Programmable logic controller performance enhancement by field programmable g...
ISA Interchange
 
40120140504013
4012014050401340120140504013
40120140504013
IAEME Publication
 
D05132630
D05132630D05132630
D05132630
IOSR-JEN
 
Convolution
ConvolutionConvolution
Convolution
sridharbommu
 
4 article azojete vol 8 37 45
4 article azojete vol 8 37 454 article azojete vol 8 37 45
4 article azojete vol 8 37 45
Oyeniyi Samuel
 
FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...
FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...
FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...
Editor IJCATR
 
Fpga lecture
Fpga lectureFpga lecture
Fpga lecture
Zhwan Rashid
 
Proposal of a reliable embedded circuit to control a stepper motor using mic...
Proposal of a reliable embedded circuit to control a stepper  motor using mic...Proposal of a reliable embedded circuit to control a stepper  motor using mic...
Proposal of a reliable embedded circuit to control a stepper motor using mic...
International Journal of Reconfigurable and Embedded Systems
 
The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)
theijes
 
DESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTURE
DESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTUREDESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTURE
DESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTURE
VLSICS Design
 
Seminar on field programmable gate array
Seminar on field programmable gate arraySeminar on field programmable gate array
Seminar on field programmable gate array
Saransh Choudhary
 
IEEE_ISIE08
IEEE_ISIE08IEEE_ISIE08
IEEE_ISIE08
Adam Taylor CEng FIET
 
Microcontroller Based Testing of Digital IP-Core
Microcontroller Based Testing of Digital IP-CoreMicrocontroller Based Testing of Digital IP-Core
Microcontroller Based Testing of Digital IP-Core
VLSICS Design
 
Nt1310 Unit 5 Algorithm
Nt1310 Unit 5 AlgorithmNt1310 Unit 5 Algorithm
Nt1310 Unit 5 Algorithm
Angie Lee
 
A design of FPGA based intelligent data handling interfacing card.
A design of FPGA based intelligent data handling interfacing card.A design of FPGA based intelligent data handling interfacing card.
A design of FPGA based intelligent data handling interfacing card.
IJERA Editor
 
Implementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation PurposeImplementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation Purpose
IRJET Journal
 
978-1-4577-1343-912$26.00 Š2014 IEEE Reliability an.docx
978-1-4577-1343-912$26.00 Š2014 IEEE  Reliability an.docx978-1-4577-1343-912$26.00 Š2014 IEEE  Reliability an.docx
978-1-4577-1343-912$26.00 Š2014 IEEE Reliability an.docx
evonnehoggarth79783
 
The Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging SystemThe Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging System
Melissa Luster
 
design of FPGA based traffic light controller system
design of FPGA based traffic light controller systemdesign of FPGA based traffic light controller system
design of FPGA based traffic light controller system
Vinny Chweety
 
VLSI
VLSIVLSI
VLSI
MAYANK KUMAR
 

Similar to I04425457 (20)

Programmable logic controller performance enhancement by field programmable g...
Programmable logic controller performance enhancement by field programmable g...Programmable logic controller performance enhancement by field programmable g...
Programmable logic controller performance enhancement by field programmable g...
 
40120140504013
4012014050401340120140504013
40120140504013
 
D05132630
D05132630D05132630
D05132630
 
Convolution
ConvolutionConvolution
Convolution
 
4 article azojete vol 8 37 45
4 article azojete vol 8 37 454 article azojete vol 8 37 45
4 article azojete vol 8 37 45
 
FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...
FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...
FPGA Implementation of Real Time Data Acquisition System Using Micro blaze Pr...
 
Fpga lecture
Fpga lectureFpga lecture
Fpga lecture
 
Proposal of a reliable embedded circuit to control a stepper motor using mic...
Proposal of a reliable embedded circuit to control a stepper  motor using mic...Proposal of a reliable embedded circuit to control a stepper  motor using mic...
Proposal of a reliable embedded circuit to control a stepper motor using mic...
 
The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)The International Journal of Engineering and Science (The IJES)
The International Journal of Engineering and Science (The IJES)
 
DESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTURE
DESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTUREDESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTURE
DESIGN APPROACH FOR FAULT TOLERANCE IN FPGA ARCHITECTURE
 
Seminar on field programmable gate array
Seminar on field programmable gate arraySeminar on field programmable gate array
Seminar on field programmable gate array
 
IEEE_ISIE08
IEEE_ISIE08IEEE_ISIE08
IEEE_ISIE08
 
Microcontroller Based Testing of Digital IP-Core
Microcontroller Based Testing of Digital IP-CoreMicrocontroller Based Testing of Digital IP-Core
Microcontroller Based Testing of Digital IP-Core
 
Nt1310 Unit 5 Algorithm
Nt1310 Unit 5 AlgorithmNt1310 Unit 5 Algorithm
Nt1310 Unit 5 Algorithm
 
A design of FPGA based intelligent data handling interfacing card.
A design of FPGA based intelligent data handling interfacing card.A design of FPGA based intelligent data handling interfacing card.
A design of FPGA based intelligent data handling interfacing card.
 
Implementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation PurposeImplementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation Purpose
 
978-1-4577-1343-912$26.00 Š2014 IEEE Reliability an.docx
978-1-4577-1343-912$26.00 Š2014 IEEE  Reliability an.docx978-1-4577-1343-912$26.00 Š2014 IEEE  Reliability an.docx
978-1-4577-1343-912$26.00 Š2014 IEEE Reliability an.docx
 
The Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging SystemThe Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging System
 
design of FPGA based traffic light controller system
design of FPGA based traffic light controller systemdesign of FPGA based traffic light controller system
design of FPGA based traffic light controller system
 
VLSI
VLSIVLSI
VLSI
 

More from IOSR-JEN

C05921721
C05921721C05921721
C05921721
IOSR-JEN
 
B05921016
B05921016B05921016
B05921016
IOSR-JEN
 
A05920109
A05920109A05920109
A05920109
IOSR-JEN
 
J05915457
J05915457J05915457
J05915457
IOSR-JEN
 
I05914153
I05914153I05914153
I05914153
IOSR-JEN
 
H05913540
H05913540H05913540
H05913540
IOSR-JEN
 
G05913234
G05913234G05913234
G05913234
IOSR-JEN
 
F05912731
F05912731F05912731
F05912731
IOSR-JEN
 
E05912226
E05912226E05912226
E05912226
IOSR-JEN
 
D05911621
D05911621D05911621
D05911621
IOSR-JEN
 
C05911315
C05911315C05911315
C05911315
IOSR-JEN
 
B05910712
B05910712B05910712
B05910712
IOSR-JEN
 
A05910106
A05910106A05910106
A05910106
IOSR-JEN
 
B05840510
B05840510B05840510
B05840510
IOSR-JEN
 
I05844759
I05844759I05844759
I05844759
IOSR-JEN
 
H05844346
H05844346H05844346
H05844346
IOSR-JEN
 
G05843942
G05843942G05843942
G05843942
IOSR-JEN
 
F05843238
F05843238F05843238
F05843238
IOSR-JEN
 
E05842831
E05842831E05842831
E05842831
IOSR-JEN
 
D05842227
D05842227D05842227
D05842227
IOSR-JEN
 

More from IOSR-JEN (20)

C05921721
C05921721C05921721
C05921721
 
B05921016
B05921016B05921016
B05921016
 
A05920109
A05920109A05920109
A05920109
 
J05915457
J05915457J05915457
J05915457
 
I05914153
I05914153I05914153
I05914153
 
H05913540
H05913540H05913540
H05913540
 
G05913234
G05913234G05913234
G05913234
 
F05912731
F05912731F05912731
F05912731
 
E05912226
E05912226E05912226
E05912226
 
D05911621
D05911621D05911621
D05911621
 
C05911315
C05911315C05911315
C05911315
 
B05910712
B05910712B05910712
B05910712
 
A05910106
A05910106A05910106
A05910106
 
B05840510
B05840510B05840510
B05840510
 
I05844759
I05844759I05844759
I05844759
 
H05844346
H05844346H05844346
H05844346
 
G05843942
G05843942G05843942
G05843942
 
F05843238
F05843238F05843238
F05843238
 
E05842831
E05842831E05842831
E05842831
 
D05842227
D05842227D05842227
D05842227
 

Recently uploaded

Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with SlackLet's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
shyamraj55
 
Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...
Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...
Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...
saastr
 
Monitoring and Managing Anomaly Detection on OpenShift.pdf
Monitoring and Managing Anomaly Detection on OpenShift.pdfMonitoring and Managing Anomaly Detection on OpenShift.pdf
Monitoring and Managing Anomaly Detection on OpenShift.pdf
Tosin Akinosho
 
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...
Tatiana Kojar
 
dbms calicut university B. sc Cs 4th sem.pdf
dbms  calicut university B. sc Cs 4th sem.pdfdbms  calicut university B. sc Cs 4th sem.pdf
dbms calicut university B. sc Cs 4th sem.pdf
Shinana2
 
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...Letter and Document Automation for Bonterra Impact Management (fka Social Sol...
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...
Jeffrey Haguewood
 
Main news related to the CCS TSI 2023 (2023/1695)
Main news related to the CCS TSI 2023 (2023/1695)Main news related to the CCS TSI 2023 (2023/1695)
Main news related to the CCS TSI 2023 (2023/1695)
Jakub Marek
 
Fueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte WebinarFueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte Webinar
Zilliz
 
Deep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStr
Deep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStrDeep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStr
Deep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStr
saastr
 
Presentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of GermanyPresentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of Germany
innovationoecd
 
WeTestAthens: Postman's AI & Automation Techniques
WeTestAthens: Postman's AI & Automation TechniquesWeTestAthens: Postman's AI & Automation Techniques
WeTestAthens: Postman's AI & Automation Techniques
Postman
 
Programming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup SlidesProgramming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup Slides
Zilliz
 
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
saastr
 
Serial Arm Control in Real Time Presentation
Serial Arm Control in Real Time PresentationSerial Arm Control in Real Time Presentation
Serial Arm Control in Real Time Presentation
tolgahangng
 
Taking AI to the Next Level in Manufacturing.pdf
Taking AI to the Next Level in Manufacturing.pdfTaking AI to the Next Level in Manufacturing.pdf
Taking AI to the Next Level in Manufacturing.pdf
ssuserfac0301
 
5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides
DanBrown980551
 
Columbus Data & Analytics Wednesdays - June 2024
Columbus Data & Analytics Wednesdays - June 2024Columbus Data & Analytics Wednesdays - June 2024
Columbus Data & Analytics Wednesdays - June 2024
Jason Packer
 
Choosing The Best AWS Service For Your Website + API.pptx
Choosing The Best AWS Service For Your Website + API.pptxChoosing The Best AWS Service For Your Website + API.pptx
Choosing The Best AWS Service For Your Website + API.pptx
Brandon Minnick, MBA
 
HCL Notes and Domino License Cost Reduction in the World of DLAU
HCL Notes and Domino License Cost Reduction in the World of DLAUHCL Notes and Domino License Cost Reduction in the World of DLAU
HCL Notes and Domino License Cost Reduction in the World of DLAU
panagenda
 
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdf
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdfNunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdf
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdf
flufftailshop
 

Recently uploaded (20)

Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with SlackLet's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
 
Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...
Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...
Overcoming the PLG Trap: Lessons from Canva's Head of Sales & Head of EMEA Da...
 
Monitoring and Managing Anomaly Detection on OpenShift.pdf
Monitoring and Managing Anomaly Detection on OpenShift.pdfMonitoring and Managing Anomaly Detection on OpenShift.pdf
Monitoring and Managing Anomaly Detection on OpenShift.pdf
 
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...
 
dbms calicut university B. sc Cs 4th sem.pdf
dbms  calicut university B. sc Cs 4th sem.pdfdbms  calicut university B. sc Cs 4th sem.pdf
dbms calicut university B. sc Cs 4th sem.pdf
 
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...Letter and Document Automation for Bonterra Impact Management (fka Social Sol...
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...
 
Main news related to the CCS TSI 2023 (2023/1695)
Main news related to the CCS TSI 2023 (2023/1695)Main news related to the CCS TSI 2023 (2023/1695)
Main news related to the CCS TSI 2023 (2023/1695)
 
Fueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte WebinarFueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte Webinar
 
Deep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStr
Deep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStrDeep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStr
Deep Dive: Getting Funded with Jason Jason Lemkin Founder & CEO @ SaaStr
 
Presentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of GermanyPresentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of Germany
 
WeTestAthens: Postman's AI & Automation Techniques
WeTestAthens: Postman's AI & Automation TechniquesWeTestAthens: Postman's AI & Automation Techniques
WeTestAthens: Postman's AI & Automation Techniques
 
Programming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup SlidesProgramming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup Slides
 
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
 
Serial Arm Control in Real Time Presentation
Serial Arm Control in Real Time PresentationSerial Arm Control in Real Time Presentation
Serial Arm Control in Real Time Presentation
 
Taking AI to the Next Level in Manufacturing.pdf
Taking AI to the Next Level in Manufacturing.pdfTaking AI to the Next Level in Manufacturing.pdf
Taking AI to the Next Level in Manufacturing.pdf
 
5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides
 
Columbus Data & Analytics Wednesdays - June 2024
Columbus Data & Analytics Wednesdays - June 2024Columbus Data & Analytics Wednesdays - June 2024
Columbus Data & Analytics Wednesdays - June 2024
 
Choosing The Best AWS Service For Your Website + API.pptx
Choosing The Best AWS Service For Your Website + API.pptxChoosing The Best AWS Service For Your Website + API.pptx
Choosing The Best AWS Service For Your Website + API.pptx
 
HCL Notes and Domino License Cost Reduction in the World of DLAU
HCL Notes and Domino License Cost Reduction in the World of DLAUHCL Notes and Domino License Cost Reduction in the World of DLAU
HCL Notes and Domino License Cost Reduction in the World of DLAU
 
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdf
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdfNunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdf
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdf
 

I04425457

  • 1. IOSR Journal of Engineering (IOSRJEN) www.iosrjen.org ISSN (e): 2250-3021, ISSN (p): 2278-8719 Vol. 04, Issue 04 (April. 2014), ||V2|| PP 54-57 International organization of Scientific Research 54 | P a g e Chemical extraction controlled by (FPGA), programmed by (VHDL). Zuhir Nemer Alaarajš, Abdelrasoul Jabar Alzubaidi² 1 Sudan Academy of Sciences (SAS); Council of Engineering Researches & Industrial Technologies 2 Electronic Dept. - Engineering College –Sudan University of science and Technology Abstract: - The field programmable gate array (FPGA) is an integrated circuit designed to be configured by the customer or designer after manufacturing—hence field programmable". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). FPGAs can be use to implement any logical function that an ASIC could perform. FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"—somewhat like many (changeable) logic gates that can be inter-wired in (many) different configurations, as shown in figure (1). Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. There are numerous options for designers in selecting a hardware platform for custom electronics design, ranging from embedded processors, application specific integrated circuits (ASICs), programmable microprocessor, FPGAs to programmable logic devices (PLDs). The decision to choose a specific technology such as an FPGA should depend primarily on the design requirements. Therefore, if the hardware requirements require a higher level of performance, say up several 100 MHz operation, then an FPGA offers a suitable level of performance. [4] To define the behavior of the FPGA is performed by programming it by a very high speed integrated circuit hardware description language (VHDL). [1] Figure (1) internal structure of FPGA I. PROBLEM STATEMENT It’s a multi-sensing control system design based on FPGA and programmed by VHDL language .Its objective is to build a chemical extraction instrument that depends on the boiling point of the components. We took here as example of extraction of acetone from water (acetone 60% and water 40%). II. METHODOLOGY This paper explains the methodology of programming the FPGA device, as a control device. The following schematic diagram –figure (2) - shows the basic parts of this process.
  • 2. Chemical extraction controlled by (FPGA), programmed by (VHDL) International organization of Scientific Research 55 | P a g e Figure (2) Basic Parts of Extraction Instrument  A, B &C: valves.  1, 2: temperature sensors.  3: concentration sensor. III. OBJECTIVES 1. Develop a computer program – VHDL – language. 2.Download the program into FPGA. 3.Program the FPGA as multi-sensing control system of chemical compounds extraction instrument. IV. SOFTWARE PROGRAM & ALGORITHMS To achieve the objective of control, we divide the program into four parts and then compile all the four parts in top module as shown in figure (3). The result is giving pure acetone (99%). The program controls the system by sensing the purity. If the output is not the demanded concentration, valve (B) opens and valve (C) closes to repeat the operation –figure (2). Figure (3) Four Programs Code V. VHDL SYNTHESIS VHDL synthesis is the next step in the design, which converts the design in the behavioral description file into gates. The synthesis tools figure out what gates to be used based on a VHDL program file.
  • 3. Chemical extraction controlled by (FPGA), programmed by (VHDL) International organization of Scientific Research 56 | P a g e VI. DESIGN IMPLEMENTATION  The Components for the design are: 1. General Architecture of FPGA. 2. LM 35 Temperature Sensor. 3. Valves. 4. Concentration Sensor. Figure (4) Block Diagram of IPs/OPs of FPGA X: FPGA pins no. (7:0): A7, L13, L14, A8, A11, C4, H18 and N17. Y: FPGA pins no. (7:0): D13, E13, H13, V4, D18, G9, A16 and A14. VII. RESULT &OBSERVATION The control system is programmed by VHDL language , then downloaded to the FPGA .Hence a designed control system of extraction acetone from water based on different boiling points of the compound is achieved. We found out that FPGA has huge facilities to control systems according to the ability of the FPGA to execute the commands in a parallel way that widens the range of controlled elements with less delay time. The same thing in VHDL language, in spite of its complicated language, but we think that it is the right choice to program complicated control system. It is suitable for a system that needs fast execution of commands. [2] The disadvantage of FPGA is high cost compared to other controller devices. The relationship between inputs and outputs are shown in tables (1) and (2). Input output Actual_temp (FPGA pins) Cooler(FPGA pin) A14 A16 G9 D18 V4 H13 E12 D13 E12 0 1 1 1 0 0 0 0 1 Else 0 Table (1) Output (cooler) Input output Conce_in: (FPGA pins) vout(FPGA pin) A7 L13 L14 A8 A11 C4 H18 N17 F12 0 1 1 0 0 0 1 1 1 Else 0 Table (2) Output (Vout) VIII. CONCLUSION A problem usually has multiple solutions, and a process can usually be controlled using different controllers based on different methods. Almost every control method has its merits and weaknesses. What is important is to use the right controller to fit the application at a minimum cost. With continuous development and progress in electronics fields and control systems, the answer of this question is always fluctuant or uneven.
  • 4. Chemical extraction controlled by (FPGA), programmed by (VHDL) International organization of Scientific Research 57 | P a g e In the recent years, there has been a technical revolution in the semiconductor industry and in the electronics industry, which has significantly developed the existing technologies in industrial control. This technical development in both the semiconductor and the electronics industries have evolved industrial control into both real-time control and distributed control. Real-time control requires controllers to capture all the significant target activities and to deliver their responses as swiftly as possible so that system performance is never degraded. Distributed control indicates that controls are performed by a number of controllers and executed in a group of independent agents or units that are physically and electronically connected and communicate with each other. This tendency in industrial control has led to the future continuation of both real- time control and distributed control. The (FPGA) have now approached intelligence similar to that of microprocessors, so that they are performing more important functional role in various control systems. REFERENCES [1] Volnei A. Pedroni, Circuit Design with VHDL, MIT press, Massachusts, 2004. [2] Peng Zhang, Industrial Control Tecnology,William Andrew, N. Y., 2008. [3] ISE Simulator (ISim), UG682 (v1.0), 2009. [4] www.fpga4fun.com.