International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
Design of an Efficient Communication Protocol for 3d Interconnection NetworkIJMTST Journal
Three-dimensional integrated circuits (3D ICs) provide better device integration, reduced signal delay and reduced interconnect power. They additionally give better layout flexibility by permitting heterogeneous integration, by taking the advantage of intrinsic capability of reducing the wire length in 3D ICs, 3D NOC Bus Hybrid mesh layout was suggested. This layout provides an apparently significant stage to implement economical multicast routings for 3D networks-on-chip. A unique multicast partitioning and routing strategy for the 3D NOC-Bus Hybrid mesh architectures to improve the system performance and to decrease the power consumption is being proposed. The planned design exploits the useful attribute of a single-hop (bus-based) interlayer communication of the 3D stacked mesh design to supply superior hardware multicast support. Finally customized partitioning approach and an effective routing method is given to decrease the average hop count and network latency. Compared to the recently designed 3D NOC architectures being capable of supporting hardware multicasting, huge simulations with traffic profiles reveals design exploitation, which is the planned multicast routing strategy will facilitate significant performance enhancements.
Comparative performance evaluation of routing algorithm and topology size for...journalBEEI
Wireless Network-on-Chip or WiNoC is an alternative to traditional planar on-chip networks. On-chip wireless links are utilized to reduce latency between distant nodes due to its capability to communicate with far-away node within a single hop. This paper analyzes the impact of various routing schemes and the effect of WiNoC sizes on network traffic distributions compared to conventional mesh NoC. Radio hubs (4×4) are evenly placed on WiNoC to analyze global average delay, throughput, energy consumption and wireless utilization. For validation, three various network sizes (8×8, 16×16 and 32×32) of mesh NoC and WiNoC architectures are simulated on cycle-accurate Noxim simulator under numerous traffic load distributions. Simulation results show that WiNoC architecture with the 16×16 network size has better average speedup (∼1.2×) and improved network throughputs by 6.36% in non-uniform transpose traffic distribution. As the trade-off, WiNoC requires 63% higher energy consumption compared to the classical wired NoC mesh.
A Cooperative Approach to Extend Cellular Coverage via D2D Architecture based...IJCNCJournal
The access part of all cellular network’s generation suffers from common concerns related to dead spots (zones that are not covered by the network) and hot spots (zones where the number of users is higher compared to network resources). During the last decade, lots of research proposals have tried to overcome cellular problems through multi-hop D2D architecture, which is a new paradigm allowing the direct communication between devices in cellular network to enhance network performances and improve user QoS. In this paper, we propose a multi-hop D2D architecture based on the OLSR protocol to extend cellular coverage. Cell-OLSR, which is the proposed adaptation of OLSR for our architecture, allows the exchange of cellular parameters between nodes to choose the best proxy device to forward data to the cellular base station (BS).
Video transmission over wireless network requires
link reliability. Videos are having more data to be transmitted
during communication. The criticality and load of the network
increases when some video data is communicated over the
network. Firstly, describes the characteristics of Mobile Ad hoc
Networks and their Routing protocol, and second a mobile ad
hoc network (MANET) which consists of set mobile wireless
nodes and one fixed wireless server are design using ns-2. In this
research we will simulate three MANET routing protocols such
as AODV against three different parameters i.e. delay, network
load, throughput and retransmission.
IEEE 802.11n Based Wireless Backhaul Enabled by Dual Channel IPT (DCH-IPT) Fo...CSCJournals
Wireless backhaul has received much attention as an enabler of future broadband mobile communication systems because it can reduce deployment cost of pico-cells, an essential part of high capacity system. A high throughput with a minimum delay network is highly appreciated to sustain the increasing proliferation in multimedia transmissions. In this paper, we propose a backhaul network using the Multi-Input Multi-Output (MIMO) IEEE 802.11n standard in conjunction with the Dual Channel Intermittent Periodic Transmit IPT (DCH-IPT) packets forwarding protocol. By using these two techniques (IEEE 802.11n + DCH-IPT), wireless backhaul nodes can meet more demanding communication requirements such as higher throughput, lower average delay, and lower packet dropping rate than those achieved by the currently used backhaul. The current backhaul is based upon Single-Input Single-Output (SISO) IEEE 802.11a,b,g standards in conjunction with Single Channel Conventional (SCH-Conv) relaying protocol in which packets are transmitted continuously from source nodes using single channel. The proposed backhaul will accelerate introduction of picocell based mobile communication systems.
Design of an Efficient Communication Protocol for 3d Interconnection NetworkIJMTST Journal
Three-dimensional integrated circuits (3D ICs) provide better device integration, reduced signal delay and reduced interconnect power. They additionally give better layout flexibility by permitting heterogeneous integration, by taking the advantage of intrinsic capability of reducing the wire length in 3D ICs, 3D NOC Bus Hybrid mesh layout was suggested. This layout provides an apparently significant stage to implement economical multicast routings for 3D networks-on-chip. A unique multicast partitioning and routing strategy for the 3D NOC-Bus Hybrid mesh architectures to improve the system performance and to decrease the power consumption is being proposed. The planned design exploits the useful attribute of a single-hop (bus-based) interlayer communication of the 3D stacked mesh design to supply superior hardware multicast support. Finally customized partitioning approach and an effective routing method is given to decrease the average hop count and network latency. Compared to the recently designed 3D NOC architectures being capable of supporting hardware multicasting, huge simulations with traffic profiles reveals design exploitation, which is the planned multicast routing strategy will facilitate significant performance enhancements.
Comparative performance evaluation of routing algorithm and topology size for...journalBEEI
Wireless Network-on-Chip or WiNoC is an alternative to traditional planar on-chip networks. On-chip wireless links are utilized to reduce latency between distant nodes due to its capability to communicate with far-away node within a single hop. This paper analyzes the impact of various routing schemes and the effect of WiNoC sizes on network traffic distributions compared to conventional mesh NoC. Radio hubs (4×4) are evenly placed on WiNoC to analyze global average delay, throughput, energy consumption and wireless utilization. For validation, three various network sizes (8×8, 16×16 and 32×32) of mesh NoC and WiNoC architectures are simulated on cycle-accurate Noxim simulator under numerous traffic load distributions. Simulation results show that WiNoC architecture with the 16×16 network size has better average speedup (∼1.2×) and improved network throughputs by 6.36% in non-uniform transpose traffic distribution. As the trade-off, WiNoC requires 63% higher energy consumption compared to the classical wired NoC mesh.
A Cooperative Approach to Extend Cellular Coverage via D2D Architecture based...IJCNCJournal
The access part of all cellular network’s generation suffers from common concerns related to dead spots (zones that are not covered by the network) and hot spots (zones where the number of users is higher compared to network resources). During the last decade, lots of research proposals have tried to overcome cellular problems through multi-hop D2D architecture, which is a new paradigm allowing the direct communication between devices in cellular network to enhance network performances and improve user QoS. In this paper, we propose a multi-hop D2D architecture based on the OLSR protocol to extend cellular coverage. Cell-OLSR, which is the proposed adaptation of OLSR for our architecture, allows the exchange of cellular parameters between nodes to choose the best proxy device to forward data to the cellular base station (BS).
Video transmission over wireless network requires
link reliability. Videos are having more data to be transmitted
during communication. The criticality and load of the network
increases when some video data is communicated over the
network. Firstly, describes the characteristics of Mobile Ad hoc
Networks and their Routing protocol, and second a mobile ad
hoc network (MANET) which consists of set mobile wireless
nodes and one fixed wireless server are design using ns-2. In this
research we will simulate three MANET routing protocols such
as AODV against three different parameters i.e. delay, network
load, throughput and retransmission.
IEEE 802.11n Based Wireless Backhaul Enabled by Dual Channel IPT (DCH-IPT) Fo...CSCJournals
Wireless backhaul has received much attention as an enabler of future broadband mobile communication systems because it can reduce deployment cost of pico-cells, an essential part of high capacity system. A high throughput with a minimum delay network is highly appreciated to sustain the increasing proliferation in multimedia transmissions. In this paper, we propose a backhaul network using the Multi-Input Multi-Output (MIMO) IEEE 802.11n standard in conjunction with the Dual Channel Intermittent Periodic Transmit IPT (DCH-IPT) packets forwarding protocol. By using these two techniques (IEEE 802.11n + DCH-IPT), wireless backhaul nodes can meet more demanding communication requirements such as higher throughput, lower average delay, and lower packet dropping rate than those achieved by the currently used backhaul. The current backhaul is based upon Single-Input Single-Output (SISO) IEEE 802.11a,b,g standards in conjunction with Single Channel Conventional (SCH-Conv) relaying protocol in which packets are transmitted continuously from source nodes using single channel. The proposed backhaul will accelerate introduction of picocell based mobile communication systems.
EFFECTS OF MAC PARAMETERS ON THE PERFORMANCE OF IEEE 802.11 DCF IN NS-3ijwmn
This paper presents the design procedure of the NS-3 script for WLAN that is organized according to the hierarchical manner of TCP/IP model. We configure all layers by using NS-3 model objects and set and modify the values used by objects to investigate the effects of MAC parameters (access mechanism, CWmin, CWmax and retry limit) on the performance metrics viz. packet delivery ratio, packet lost ratio, aggregated throughput, and average delay. The simulation results show that RTS/CTS access mechanism outperforms basic access mechanism in saturated state, whereas the MAC parameters have no significant impact on network performance in non-saturated state. A higher value of CWmin improves the aggregated throughput in expense of average delay. The tradeoff relationships among the performance metrics are also observed in results for the optimal values of MAC parameters. Our design procedure represents a good guideline for new NS-3 users to design and modify script and results greatly benefit the network design and management.
In this paper, we examine WiMAX – based network and evaluate the performance for quality of service (QoS) using an idea of IEEE 802.16 technology. In our models, the study used a multiprocessor architecture organized by the interconnection network. OPNET Modeler is used to simulate the architecture and to calculate the performance criteria (i.e. throughput, delay and data dropped) that
slightly concerned in network estimation. It is concluded that our models shorten the time quite a bit for
obtaining the performance measures of an end-to-end delay as well as throughput can be used as an
effective tool for this purpose.
An Efficient Wireless Backhaul Utilizing MIMO Transmission and IPT ForwardingCSCJournals
Wireless backhaul has been received much attention as an enabler of future broadband mobile communication systems because it can reduce deployment cost of pico-cells, an essential part of high capacity system. A high performance network, high throughput, low average delay and low packet loss rate, is highly appreciated to sustain the increasing proliferation in multimedia transmissions. The critical issue reducing the performance of wireless backhaul is the interference occurred in the network due to simultaneous nodes transmissions. In this research, we propose a high performance wireless backhaul using the low interference sensitivity MIMO based nodes. MIMO transmission has a better BER performance over SISO one even with the same transmission rate and bandwidth, which means that MIMO can operate at lower SINR values than SISO and give the same performance. This MIMO robust performance against interference gives us a greater benefit when adopted as a wireless interface in wireless backhaul than SISO. These facts motivated us to use the IEEE 802.11n the current MIMO standard to design a MIMO based wireless backhaul. In addition and to justify our assumptions, we investigate the effect of MIMO channels correlation, a major drawback in MIMO transmission, upon the system performance, and prove the robustness of the scheme under different MIMO channels correlation values. After proving the effectiveness of MIMO as a wireless interface for wireless backhaul, we further improve the performance of this MIMO-backhaul using the high efficient Intermittent Periodic Transmit (IPT) forwarding protocol. IPT is a reduced interference packet forwarding protocol with a more efficient relay performance than conventional method in which packets are transmitted continuously form the source nodes. By using these two techniques (IEEE 802.11n (MIMO) + IPT), wireless backhaul nodes can meet more demanding communication requirements such as higher throughput, lower average delay, and lower packet dropping rate than those achieved by simply applying IEEE 802.11n to conventionally relayed backhaul. The proposed wireless backhaul will accelerate introduction of picocell based mobile communication systems.
Comparative Review for Routing Protocols in Mobile Ad-Hoc Networksijasuc
Wireless Mobile Ad-Hoc Networks is one of the attractive research field that growing exponentially in the
last decade. it surrounded by much challenges that should be solved the improve establishment of such
networks. Failure of wireless link is considered as one of popular challenges faced by Mobile Ad-Hoc
Networks (MANETs). As this type of networks does not require any pre-exist hardware. As well as, every
node have the ability of roaming where it can be connected to other nodes dynamically. Therefore, the
network internal structure will be unpredictably changed frequently according to continuous activities
between nodes that simultaneously update network topology in the basis of active ad-hoc nature. This
model puts the functionality of routing operation in crucial angle in the area of research under mobile adhoc
network field due to highly dynamic nature. Adapting such kernel makes MANET indigence new
routing techniques to settle these challenges. Thereafter, tremendous amount of routing protocols proposed
to argue with ad-hoc nature. Thus, it is quite difficult to specify which protocols operate efficiently under
different mobile ad-hoc scenarios. This paper examines some of the prominent routing protocols that are
designed for mobile ad-hoc networks by describing their structures, operations, features and then
comparing their various characteristics.
Dvr based hybrid routing protocols in mobile ad-hoc network application and c...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
DIA-TORUS:A NOVEL TOPOLOGY FOR NETWORK ON CHIP DESIGNIJCNCJournal
The shortcomings of conventional bus architectures are in terms of scalability and the ever increasing
demand of more bandwidth. And also the feature size of sub-micron domain is decreasing making it
difficult for bus architectures to fulfill the requirements of modern System on Chip (SoC) systems. Network
on chip (NoC) architectures presents a solution to the earlier mentioned shortcomings by employing a
packet based network for inter IP communications. A pivotal feature of NoC systems is the topology in
which the system is arranged. Several parameters which are topology dependent like hop count, path
diversity, degree and other various parameters affect the system performance. We propose a novel
topology forNoC architecture which has been thoroughly compared with the existing topologies on the
basis of different network parameters.
Quick Routing for Communication in MANET using Zone Routing Protocolijceronline
rnational Journal of Computational Engineering Resaerch 2014, Volume 4 ~ Issue 11 (November 2014)
Abstract
The paper discusses the voltage control of a critical load bus using dynamic voltage restorer (DVR) in a distribution system. The critical load requires a balanced sinusoidal waveform across its terminals preferably at system nominal frequency of 50Hz .It is assumed that the frequency of the supply voltage can be varied and it is different from the system nominal frequency. The DVR is operated such that it holds the voltage across critical load bus terminals constant at system nominal frequency irrespective of the frequency of the source voltage. In case of a frequency mismatch, the total real power requirement of the critical load bus has to be supplied by the DVR. Proposed method used to compensate for frequency variation, the DC link of the DVR is supplied through an uncontrolled rectifier that provides a path for the real power required by the critical load to flow .A simple frequency estimation technique is discussed which are Discrete Fourier transform (DFT), ANN controller. The present work study the compensation principle and different control strategies of DVR used here are based on DFT, and ANN Controller .Through detailed analysis and simulation studies using MATLAB. It is shown that the voltage is completely controlled across the critical load.
VEGAS: Better Performance than other TCP Congestion Control Algorithms on MANETsCSCJournals
The wireless communication TCP/IP protocol is an important role in developing communication systems and which provides better and reliable communication capabilities in almost all kinds of networking environment. The wireless networking technology and the new kind of requirements in communication systems need some extensions to the original design of TCP for on coming technology development. In this paper we have analyzed six TCP Congestion Control Algorithms and their performance on Mobile Ad-hoc Networks (MANET). More specifically, we describe the performance behavior of BIC, Cubic, TCP Compound, Vegas, Reno and Westwood congestion control algorithms. The evaluation is simulated through Network Simulator (NS2) and the performance of these congestion control algorithms is analyzed with suitable metrics.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
The Effect of Design Parameters of an Integrated Linear Electromagnetic Moto...IJMER
This paper assess the influence of design parameters of ferromagnetic guide housing at the possess of pulling away the anchor from the holding device which is integrated in the design of the motor. The design of an integrated circuit and the equivalent magnetic circuit of the integrated LEMM on breakaway stage was built, mathematical models of system were laid out. An expression for its magnetic
induction, with which you can set the beginning of saturation of the shunt, defining moment of pulling
away anchor from the holding area. an expression is derived for its magnetic induction, with which you
can set the beginning of saturation of the shunt, define moment of anchor pulling away from the holding
area, the zone of permissible combinations of cross-sectional area of the upper magnetic shunt and
holding area, and the zone of change in the magnetic induction in the yoke at the pulling away moment of
the motor anchor
EFFECTS OF MAC PARAMETERS ON THE PERFORMANCE OF IEEE 802.11 DCF IN NS-3ijwmn
This paper presents the design procedure of the NS-3 script for WLAN that is organized according to the hierarchical manner of TCP/IP model. We configure all layers by using NS-3 model objects and set and modify the values used by objects to investigate the effects of MAC parameters (access mechanism, CWmin, CWmax and retry limit) on the performance metrics viz. packet delivery ratio, packet lost ratio, aggregated throughput, and average delay. The simulation results show that RTS/CTS access mechanism outperforms basic access mechanism in saturated state, whereas the MAC parameters have no significant impact on network performance in non-saturated state. A higher value of CWmin improves the aggregated throughput in expense of average delay. The tradeoff relationships among the performance metrics are also observed in results for the optimal values of MAC parameters. Our design procedure represents a good guideline for new NS-3 users to design and modify script and results greatly benefit the network design and management.
In this paper, we examine WiMAX – based network and evaluate the performance for quality of service (QoS) using an idea of IEEE 802.16 technology. In our models, the study used a multiprocessor architecture organized by the interconnection network. OPNET Modeler is used to simulate the architecture and to calculate the performance criteria (i.e. throughput, delay and data dropped) that
slightly concerned in network estimation. It is concluded that our models shorten the time quite a bit for
obtaining the performance measures of an end-to-end delay as well as throughput can be used as an
effective tool for this purpose.
An Efficient Wireless Backhaul Utilizing MIMO Transmission and IPT ForwardingCSCJournals
Wireless backhaul has been received much attention as an enabler of future broadband mobile communication systems because it can reduce deployment cost of pico-cells, an essential part of high capacity system. A high performance network, high throughput, low average delay and low packet loss rate, is highly appreciated to sustain the increasing proliferation in multimedia transmissions. The critical issue reducing the performance of wireless backhaul is the interference occurred in the network due to simultaneous nodes transmissions. In this research, we propose a high performance wireless backhaul using the low interference sensitivity MIMO based nodes. MIMO transmission has a better BER performance over SISO one even with the same transmission rate and bandwidth, which means that MIMO can operate at lower SINR values than SISO and give the same performance. This MIMO robust performance against interference gives us a greater benefit when adopted as a wireless interface in wireless backhaul than SISO. These facts motivated us to use the IEEE 802.11n the current MIMO standard to design a MIMO based wireless backhaul. In addition and to justify our assumptions, we investigate the effect of MIMO channels correlation, a major drawback in MIMO transmission, upon the system performance, and prove the robustness of the scheme under different MIMO channels correlation values. After proving the effectiveness of MIMO as a wireless interface for wireless backhaul, we further improve the performance of this MIMO-backhaul using the high efficient Intermittent Periodic Transmit (IPT) forwarding protocol. IPT is a reduced interference packet forwarding protocol with a more efficient relay performance than conventional method in which packets are transmitted continuously form the source nodes. By using these two techniques (IEEE 802.11n (MIMO) + IPT), wireless backhaul nodes can meet more demanding communication requirements such as higher throughput, lower average delay, and lower packet dropping rate than those achieved by simply applying IEEE 802.11n to conventionally relayed backhaul. The proposed wireless backhaul will accelerate introduction of picocell based mobile communication systems.
Comparative Review for Routing Protocols in Mobile Ad-Hoc Networksijasuc
Wireless Mobile Ad-Hoc Networks is one of the attractive research field that growing exponentially in the
last decade. it surrounded by much challenges that should be solved the improve establishment of such
networks. Failure of wireless link is considered as one of popular challenges faced by Mobile Ad-Hoc
Networks (MANETs). As this type of networks does not require any pre-exist hardware. As well as, every
node have the ability of roaming where it can be connected to other nodes dynamically. Therefore, the
network internal structure will be unpredictably changed frequently according to continuous activities
between nodes that simultaneously update network topology in the basis of active ad-hoc nature. This
model puts the functionality of routing operation in crucial angle in the area of research under mobile adhoc
network field due to highly dynamic nature. Adapting such kernel makes MANET indigence new
routing techniques to settle these challenges. Thereafter, tremendous amount of routing protocols proposed
to argue with ad-hoc nature. Thus, it is quite difficult to specify which protocols operate efficiently under
different mobile ad-hoc scenarios. This paper examines some of the prominent routing protocols that are
designed for mobile ad-hoc networks by describing their structures, operations, features and then
comparing their various characteristics.
Dvr based hybrid routing protocols in mobile ad-hoc network application and c...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
DIA-TORUS:A NOVEL TOPOLOGY FOR NETWORK ON CHIP DESIGNIJCNCJournal
The shortcomings of conventional bus architectures are in terms of scalability and the ever increasing
demand of more bandwidth. And also the feature size of sub-micron domain is decreasing making it
difficult for bus architectures to fulfill the requirements of modern System on Chip (SoC) systems. Network
on chip (NoC) architectures presents a solution to the earlier mentioned shortcomings by employing a
packet based network for inter IP communications. A pivotal feature of NoC systems is the topology in
which the system is arranged. Several parameters which are topology dependent like hop count, path
diversity, degree and other various parameters affect the system performance. We propose a novel
topology forNoC architecture which has been thoroughly compared with the existing topologies on the
basis of different network parameters.
Quick Routing for Communication in MANET using Zone Routing Protocolijceronline
rnational Journal of Computational Engineering Resaerch 2014, Volume 4 ~ Issue 11 (November 2014)
Abstract
The paper discusses the voltage control of a critical load bus using dynamic voltage restorer (DVR) in a distribution system. The critical load requires a balanced sinusoidal waveform across its terminals preferably at system nominal frequency of 50Hz .It is assumed that the frequency of the supply voltage can be varied and it is different from the system nominal frequency. The DVR is operated such that it holds the voltage across critical load bus terminals constant at system nominal frequency irrespective of the frequency of the source voltage. In case of a frequency mismatch, the total real power requirement of the critical load bus has to be supplied by the DVR. Proposed method used to compensate for frequency variation, the DC link of the DVR is supplied through an uncontrolled rectifier that provides a path for the real power required by the critical load to flow .A simple frequency estimation technique is discussed which are Discrete Fourier transform (DFT), ANN controller. The present work study the compensation principle and different control strategies of DVR used here are based on DFT, and ANN Controller .Through detailed analysis and simulation studies using MATLAB. It is shown that the voltage is completely controlled across the critical load.
VEGAS: Better Performance than other TCP Congestion Control Algorithms on MANETsCSCJournals
The wireless communication TCP/IP protocol is an important role in developing communication systems and which provides better and reliable communication capabilities in almost all kinds of networking environment. The wireless networking technology and the new kind of requirements in communication systems need some extensions to the original design of TCP for on coming technology development. In this paper we have analyzed six TCP Congestion Control Algorithms and their performance on Mobile Ad-hoc Networks (MANET). More specifically, we describe the performance behavior of BIC, Cubic, TCP Compound, Vegas, Reno and Westwood congestion control algorithms. The evaluation is simulated through Network Simulator (NS2) and the performance of these congestion control algorithms is analyzed with suitable metrics.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
The Effect of Design Parameters of an Integrated Linear Electromagnetic Moto...IJMER
This paper assess the influence of design parameters of ferromagnetic guide housing at the possess of pulling away the anchor from the holding device which is integrated in the design of the motor. The design of an integrated circuit and the equivalent magnetic circuit of the integrated LEMM on breakaway stage was built, mathematical models of system were laid out. An expression for its magnetic
induction, with which you can set the beginning of saturation of the shunt, defining moment of pulling
away anchor from the holding area. an expression is derived for its magnetic induction, with which you
can set the beginning of saturation of the shunt, define moment of anchor pulling away from the holding
area, the zone of permissible combinations of cross-sectional area of the upper magnetic shunt and
holding area, and the zone of change in the magnetic induction in the yoke at the pulling away moment of
the motor anchor
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
International Journal of Modern Engineering Research (IJMER) covers all the fields of engineering and science: Electrical Engineering, Mechanical Engineering, Civil Engineering, Chemical Engineering, Computer Engineering, Agricultural Engineering, Aerospace Engineering, Thermodynamics, Structural Engineering, Control Engineering, Robotics, Mechatronics, Fluid Mechanics, Nanotechnology, Simulators, Web-based Learning, Remote Laboratories, Engineering Design Methods, Education Research, Students' Satisfaction and Motivation, Global Projects, and Assessment…. And many more.
An Optimal Risk- Aware Mechanism for Countering Routing Attacks in MANETsIJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
International Journal of Modern Engineering Research (IJMER) covers all the fields of engineering and science: Electrical Engineering, Mechanical Engineering, Civil Engineering, Chemical Engineering, Computer Engineering, Agricultural Engineering, Aerospace Engineering, Thermodynamics, Structural Engineering, Control Engineering, Robotics, Mechatronics, Fluid Mechanics, Nanotechnology, Simulators, Web-based Learning, Remote Laboratories, Engineering Design Methods, Education Research, Students' Satisfaction and Motivation, Global Projects, and Assessment…. And many more.
Dynamic Organization of User Historical QueriesIJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
International Journal of Modern Engineering Research (IJMER) covers all the fields of engineering and science: Electrical Engineering, Mechanical Engineering, Civil Engineering, Chemical Engineering, Computer Engineering, Agricultural Engineering, Aerospace Engineering, Thermodynamics, Structural Engineering, Control Engineering, Robotics, Mechatronics, Fluid Mechanics, Nanotechnology, Simulators, Web-based Learning, Remote Laboratories, Engineering Design Methods, Education Research, Students' Satisfaction and Motivation, Global Projects, and Assessment…. And many more.
Unplanned startup launch: Product Hunt vs Fast Company vs Gizmodo. Source eff...Alessandro Marchesini
We shared our landing page in a few Facebook groups to test our startup idea and gain feedbacks. In the next days we ended up on Product Hunt, Fast Company and Gizmodo. We weren't ready for it and ... we'd like to share with you what we learned during the unplanned launch of Earlyclaim.com
Intrusion Detection and Forensics based on decision tree and Association rule...IJMER
This paper present an approach based on the combination of, two techniques using
decision tree and Association rule mining for Probe attack detection. This approach proves to be
better than the traditional approach of generating rules for fuzzy expert system by clustering methods.
Association rule mining for selecting the best attributes together and decision tree for identifying the
best parameters together to create the rules for fuzzy expert system. After that rules for fuzzy expert
system are generated using association rule mining and decision trees. Decision trees is generated for
dataset and to find the basic parameters for creating the membership functions of fuzzy inference
system. Membership functions are generated for the probe attack. Based on these rules we have
created the fuzzy inference system that is used as an input to neuro-fuzzy system. Fuzzy inference
system is loaded to neuro-fuzzy toolbox as an input and the final ANFIS structure is generated for
outcome of neuro-fuzzy approach. The experiments and evaluations of the proposed method were
done with NSL-KDD intrusion detection dataset. As the experimental results, the proposed approach
based on the combination of, two techniques using decision tree and Association rule mining
efficiently detected probe attacks. Experimental results shows better results for detecting intrusions as
compared to others existing methods
A Comparative Study of Low Cost Solar Based Lighting System and Fuel Based Li...IJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
The quality of the machined piece and tool life are greatly influenced by determination of
maximum temperature of the cutting tool. Numerous researchers have approached to solve this problem
with experimental, analytical and numerical analysis. There is hardly a consensus on the basics principles
of the thermal problem in metal cutting, even though considerable research effort has been made on it. It is
exceedingly difficult to predict in a precise manner the performance of tool for the machining process. This
paper reviews work on the requirements for optimization of Tool wear so that its life could easily be
predicted.
Modeling and Reduction of Root Fillet Stress in Spur Gear Using Stress Relie...IJMER
A gear is a component within a transmission device that transmits rotational forces. Gears
are commonly used for transmitting power. Gear teeth failure due to fatigue is a common fact
observed. Even a small reduction in the root tensile stress results in great raise in the fatigue life of a
gear. They develop high stress concentration at the root and the point of contact. The repeated
stressing on the fillets causes the fatigue failure of gear tooth. For many years, gear design has been
improved by using better material, hardening surfaces with carburization and heat treatment, and shot
penning to improve surface finish etc. Few more hard work have been made to improve the durability
and strength by changing the pressure angle, using the asymmetric teeth, varying the geometry of root
fillet curve and so on. The majority of the above systems don't ensure the compatibility of the current
rigging frameworks. This work presents the possibilities of utilizing the stress redistribution techniques
by introducing the Stress relieving features in the stressed zone to the advantage of reduction of root
fillet stress in spur gear
A Unique Application to Reserve Doctor Appointment by Using Wireless Applicat...IJMER
WAP is a standardized technology for cross-platform, distributed computing, very similar to the Internet’s combination of Hypertext Markup Language (HTML) and Hypertext Transfer Protocol (HTTP). WAP could be described as a set of protocols that has inherited its characteristics and functionality from Internet standards and from standards developed for wireless services by some of the world’s leading companies in the business of wireless telecommunications. This application will help patients, the normal doctor and the medical director. The patient can reserve an appointment. The normal doctor can view and print the lists of patient appointment under his responsibility. The medical director can add new departments, add new doctors, and also can change the password to access the database. He can also modify data and working schedules of doctors assigned. He can add new patients and can have privilege access to transfer any patient appointment to another doctor. This Application which has been developed by using WAP was the first of its kind here, where software has been developed.
Network on Chip Architecture and Routing Techniques: A surveyIJRES Journal
The processor designing and development was designed to perform various complex logical information exchange and processing operations in a variety of resolutions. They mainly rely on concurrent and sync, both that of the software and hardware to enhance the productivity and performance. With the high speed growth approaching multi-billion transistor integration era, some of the main problems which are symbolized by all gate lengths in the range of 60-90 nm, will be from non-scalable delays generated by wire. All similar problems may be solved by using Network on Chip (NOC) systems. In the presented paper, we have summarized research papers and contributions in NOC area. With advancement in the technology in the on chip communication, faster interaction between devices is becoming vital. Network on Chip (NOC) can be one of the solutions for faster on chip communication. For efficient link between devices of NOC, routers are needed. This paper also reviews implementation of routing techniques. The use of routing gives higher throughput as required for dealing with complexity of modern systems. It is mainly focused on the routing design parameters on both system level including traffic pattern, network topology and routing algorithm, and architecture level including arbitration algorithm.
Many intellectual property (IP) modules are present in contemporary system on chips (SoCs). This could provide an issue with interconnection among different IP modules, which would limit the system's ability to scale. Traditional bus-based SoC architectures have a connectivity bottleneck, and network on chip (NoC) has evolved as an embedded switching network to address this issue. The interconnections between various cores or IP modules on a chip have a significant impact on communication and chip performance in terms of power, area latency and throughput. Also, designing a reliable fault tolerant NoC became a significant concern. In fault tolerant NoC it becomes critical to identify faulty node and dynamically reroute the packets keeping minimum latency. This study provides an insight into a domain of NoC, with intention of understanding fault tolerant approach based on the XY routing algorithm for 4×4 mesh architecture. The fault tolerant NoC design is synthesized on field programmable gate array (FPGA).
A Flexible Software/Hardware Adaptive Network for Embedded Distributed Archit...csijjournal
Embedded platforms are projected to integrate hundreds of cores in the near future, and expanding the interconnection network remains a key challenge. We propose SNet, a new Scalable NETwork paradigm that extends the NoCs area to include a software/hardware dynamic routing mechanism. To design routing pathways among communicating processes, it uses a distributed, adaptive, non-supervised routing method based on the ACO algorithm (Ant Colony Optimization). A small footprint hardware unit called DMC speeds up data transfer (Direct Management of Communications). SNet has the benefit of being extremely versatile, allowing for the creation of a broad range of routing topologies to meet the needs of various applications. We provide the DMC module in this work and assess SNet performance by executing a large number of test cases.
A FLEXIBLE SOFTWARE/HARDWARE ADAPTIVE NETWORK FOR EMBEDDED DISTRIBUTED ARCHIT...csijjournal
Embedded platforms are projected to integrate hundreds of cores in the near future, and expanding the
interconnection network remains a key challenge. We propose SNet, a new Scalable NETwork paradigm
that extends the NoCs area to include a software/hardware dynamic routing mechanism. To design routing
pathways among communicating processes, it uses a distributed, adaptive, non-supervised routing method
based on the ACO algorithm (Ant Colony Optimization). A small footprint hardware unit called DMC
speeds up data transfer (Direct Management of Communications). SNet has the benefit of being extremely
versatile, allowing for the creation of a broad range of routing topologies to meet the needs of various
applications. We provide the DMC module in this work and assess SNet performance by executing a large
number of test cases.
The router is a network device that is used to connect subnetwork and packet-switched networking by directing the data packets to the intended IP addresses. It succeeds the traffic between different systems and allows several devices to share the internet connection. The router is applicable for the effective commutation in system on chip (SoC) modules for network on chip (NoC) communication. The research paper emphasizes the design of the two dimensional (2D) router hardware chip in the Xilinx integrated system environment (ISE) 14.7 software and further logic verification using the data packets transmitted from all input/output ports. The design evaluation is done based on the pre-synthesis device utilization summary relating to different field programmable gate array (FPGA) boards such as Spartan-3E (XC3S500E), Spartan-6 (XC6SLX45), Virtex-4 (XC4VFX12), Virtex-5 (XC5VSX50T), and Virtex-7 (XC7VX550T). The 64-bit data logic is verified on the different ports of the router configuration in the Xilinx and Modelsim waveform simulator. The Virtex-7 has proven the fast-switching speed and optimal hardware parameters in comparison to other FPGAs.
this paper they introduced UWMAC, a transmitter-based CDMA MAC protocol for UWASNs that integrates a new closed-loop distributed algorithm to establish the optimum transmit power and code length to decrease the near-far impact. UW-MAC objective is to obtain three goals i.e. low channel access delay, high network throughput and low energy consumption. It is shown that UW-MAC maintains to simultaneously obtain limited channel access delay, high network throughput and low energy consumption in deep water communications, which are not critically influenced by multipath. Fatma Bouabdallah and Raouf Boutaba suggested UW-OFDMAC, a distributed Medium Access Control (MAC) protocol which
Area-Efficient Design of Scheduler for Routing Node of Network-On-ChipVLSICS Design
Traditional System-on-Chip (SoC) design employed shared buses for data transfer among various subsystems. As SoCs become more complex involving a larger number of subsystems, traditional busbased architecture is giving way to a new paradigm for on-chip communication. This paradigm is called Network-on-Chip (NoC). A communication network of point-to-point links and routing switches is used to facilitate communication between subsystems. The routing switch proposed in this paper consists of four components, namely the input ports, output ports, switching fabric, and scheduler. The scheduler design is described in this paper. The function of the scheduler is to arbitrate between requests by data packets for use of the switching fabric. The scheduler uses an improved round robin based arbitration algorithm. Due to the symmetric structure of the scheduler, an area-efficient design is proposed by folding the scheduler onto itself, thereby reducing its area roughly by 50%.
AREA-EFFICIENT DESIGN OF SCHEDULER FOR ROUTING NODE OF NETWORK-ON-CHIPVLSICS Design
Traditional System-on-Chip (SoC) design employed shared buses for data transfer among various subsystems. As SoCs become more complex involving a larger number of subsystems, traditional busbased architecture is giving way to a new paradigm for on-chip communication. This paradigm is called Network-on-Chip (NoC). A communication network of point-to-point links and routing switches is used to facilitate communication between subsystems. The routing switch proposed in this paper consists of four components, namely the input ports, output ports, switching fabric, and scheduler. The scheduler design is described in this paper. The function of the scheduler is to arbitrate between requests by data packets for use of the switching fabric. The scheduler uses an improved round robin based arbitration algorithm. Due to the symmetric structure of the scheduler, an area-efficient design is proposed by folding the scheduler onto itself, thereby reducing its area roughly by 50%.
A ULTRA-LOW POWER ROUTER DESIGN FOR NETWORK ON CHIPijaceeejournal
The design of more complex systems becomes an increasingly difficult task because of different issues
related to latency, design reuse, throughput and cost that has to be considered while designing. In
Real-time applications there are different communication needs among the cores. When NoCs (Networks
on chip) are the means to interconnect the cores, use of some techniques to optimize the
communication are indispensable. From the performance point of view, large buffer sizes ensure
performance during different applications execution. But unfortunately, these same buffers are the main
responsible for the router total power dissipation. Another aspect is that by sizing buffers for the worst case
latency incurs in extra dissipation for the mean case, which is much more frequent. Reconfigurable router
architecture for NOC is designed for processing elements communicate over a second
communication level using direct-links between another node elements. Several possibilities to use the
router as additional resources to enhance complexity of modules are presented. The reconfigurable router
is evaluated in terms of area, speed and latencies. The proposed router was described in VHDL and used
the ModelSim tool to simulate the code. Analyses the average power consumption, area, and frequency
results to a standard cell library using the Design Compiler tool. With the reconfigurable router it was
possible to reduce the congestion in the network, while at the same time reducing power dissipation and
improving energy.
With the increase of usage of wireless networks for purposes where the nodes are either stationary or minimally mobile, focus is also on increasing the network capacity of wireless networks. One such way is to use non-overlapping multiple channels provided by 802.11 by using multiple interfaces per node. Multiple non overlapped channels exist in the 2.4 GHz and 5 GHz spectrum. Under this scenario, several challenges need to be addressed before all the available channels can be fully utilized.
Performance Analysis of Mesh-based NoC’s on Routing Algorithms IJECEIAES
The advent of System-on-Chip (SoCs), has brought about a need to increase the scale of multi-core chip networks. Bus Based communications have proved to be limited in terms of performance and ease of scalability, the solution to both bus – based and Point-to-Point (P2P) communication systems is to use a communication infrastructure called Network-on-Chip (NoC). Performance of NoC depends on various factors such as network topology, routing strategy and switching technique and traffic patterns. In this paper, we have taken the initiative to compile together a comparative analysis of different Network on Chip infrastructures based on the classification of routing algorithm, switching technique, and traffic patterns. The goal is to show how varied combinations of the three factors perform differently based on the size of the mesh network, using NOXIM, an open source SystemC Simulator of mesh-based NoC. The analysis has shown tenable evidence highlighting the novelty of XY routing algorithm.
DESIGN OF ENERGY EFFICIENT ROUTING ALGORITHM FOR WIRELESS SENSOR NETWORK (WSN...cscpconf
Development of energy efficient Wireless Sensor Network (WSN) routing protocol is nowadays main area of interest amongst researchers. This research is an effort in designing energy efficient Wireless Sensor Network (WSN) routing protocol under certain parameters consideration. Research report discusses various existing WSN routing protocols and propose a new WSN energy efficient routing protocol. Results show a significant improvement in life cycle of the nodes and enhancement in energy efficiency of WSN. In this paper, an attempt has been made to design a wireless sensor network involving the extraction of Pascal Graph features. The standard task involves designing a suitable topology using Pascal Graph. As per the definition of interconnection network it is equivalent that a suitable graph can represent the different computer network topologies very efficiently. Different characteristics of Pascal Graph Topology has been discovered and used in network topology design. Since Pascal Graph gives
better result in terms of finding the dependable and reliable nodes in topology, it has been considered for network analysis. Moreover, we propose a methodology that involves the Pascal
Graph Topology for wireless sensor network which can analyse and represent the network and help in routing.
INTERFERENCE-AWARE CHANNEL ASSIGNMENT FOR MAXIMIZING THROUGHPUT IN WMN pijans
Wireless Mesh network (WMN) is dynamically self-organizing and self-configured, with the nodes in the
network automatically establishing an ad-hoc network and maintaining the mesh connectivity. The ability
to use multiple-radios and multiple channels can be cashed to increase aggregate throughput of wireless
mesh network. Thus the efficient use of available interfaces and channels without interference becomes
the key factor. In this paper we propose interference aware clustered based channel assignment schemes
which minimizes the interference and increases throughput. In our proposed scheme we have given
priority to minimize interference from nearby mesh nodes in interference range than maximizing channel
diversity. We simulated our proposed work using NS-3 and results show that our scheme improves
network performance than BFSCA and Distributed Greedy CA.
Network-on-Chip (NoC) is a new approach for designing the communication subsystem among IP cores in a System-on-Chip (SoC). NoC applies networking theory and related methods to on-chip communication and brings out notable improvements over conventional bus and crossbar interconnections. NoC offers a great improvement over the issues like scalability, productivity, power efficiency and signal integrity challenges of complex SoC design. In an NoC, the communication among different nodes is achieved by routing packets through a pre-designed network fabric according to some routing algorithm. Therefore, architecture and related routing algorithm play an important role to the improvement of overall performance of an NoC. A Diametrical 2D Mesh routing architecture has the facility of having some additional diagonal links with simple 2D Mesh architecture. In this work, we have proposed a Modified Extended 2D routing algorithm for this architecture, which will ensure that a packet always reaches the destination through the possible shortest path, and the path is always deadlock free.
Similar to Noise Tolerant and Faster On Chip Communication Using Binoc Model (20)
A Study on Translucent Concrete Product and Its Properties by Using Optical F...IJMER
- Translucent concrete is a concrete based material with light-transferring properties,
obtained due to embedded light optical elements like Optical fibers used in concrete. Light is conducted
through the concrete from one end to the other. This results into a certain light pattern on the other
surface, depending on the fiber structure. Optical fibers transmit light so effectively that there is
virtually no loss of light conducted through the fibers. This paper deals with the modeling of such
translucent or transparent concrete blocks and panel and their usage and also the advantages it brings
in the field. The main purpose is to use sunlight as a light source to reduce the power consumption of
illumination and to use the optical fiber to sense the stress of structures and also use this concrete as an
architectural purpose of the building
Developing Cost Effective Automation for Cotton Seed DelintingIJMER
A low cost automation system for removal of lint from cottonseed is to be designed and
developed. The setup consists of stainless steel drum with stirrer in which cottonseeds having lint is mixed
with concentrated sulphuric acid. So lint will get burn. This lint free cottonseed treated with lime water to
neutralize acidic nature. After water washing this cottonseeds are used for agriculter purpose
Study & Testing Of Bio-Composite Material Based On Munja FibreIJMER
The incorporation of natural fibres such as munja fiber composites has gained
increasing applications both in many areas of Engineering and Technology. The aim of this study is to
evaluate mechanical properties such as flexural and tensile properties of reinforced epoxy composites.
This is mainly due to their applicable benefits as they are light weight and offer low cost compared to
synthetic fibre composites. Munja fibres recently have been a substitute material in many weight-critical
applications in areas such as aerospace, automotive and other high demanding industrial sectors. In
this study, natural munja fibre composites and munja/fibreglass hybrid composites were fabricated by a
combination of hand lay-up and cold-press methods. A new variety in munja fibre is the present work
the main aim of the work is to extract the neat fibre and is characterized for its flexural characteristics.
The composites are fabricated by reinforcing untreated and treated fibre and are tested for their
mechanical, properties strictly as per ASTM procedures.
Hybrid Engine (Stirling Engine + IC Engine + Electric Motor)IJMER
Hybrid engine is a combination of Stirling engine, IC engine and Electric motor. All these 3 are
connected together to a single shaft. The power source of the Stirling engine will be a Solar Panel. The aim of
this is to run the automobile using a Hybrid engine
Fabrication & Characterization of Bio Composite Materials Based On Sunnhemp F...IJMER
The present day technology demands eco-friendly developments. In this era the
composite material are playing a vital roal in different field of Engineering .The composite materials
are using as a principle materials. Nowaday the composite materials are utilizing as a important
component of engineering field .Where as the importance of the applications of composites is well
known, but thrust on the use of natural fibres in it for reinforcement has been given priority for some
times. But changing from synthetic fibres to natural fibres provides only half green-composites. A
partial green composite will be achieved if the matrix component is also eco-friendly. Keeping this in
view, a detailed literature surveyed has been carried out through various issues of the Journals
related to this field. The material systems used are sunnhemp fibres. Some epoxy and hardener has
been also added for stability and drying of the bio-composites. Various graphs and bar-charts are
super-imposed on each other for comparison among themselves and Graphs is plotted on MAT LAB
and ORIGIN 6.0 software. To determining tensile strengths, Various properties for different biocomposites
have been compared among themselves. Comparison of the behaviour of bio-composites of
this work has been also compare with other works. The bio-composites developed in this work are
likely to get applications in fall ceilings, partitions, bio-degradable packagings, automotive interiors,
sports things (e.g. rackets, nets, etc.), toys etc.
Geochemistry and Genesis of Kammatturu Iron Ores of Devagiri Formation, Sandu...IJMER
The Greenstone belts of Karnataka are enriched in BIFs in Dharwar craton, where Iron
formations are confined to the basin shelf, clearly separated from the deeper-water iron formation that
accumulated at the basin margin and flanking the marine basin. Geochemical data procured in terms of
major, trace and REE are plotted in various diagrams to interpret the genesis of BIFs. Al2O3, Fe2O3 (T),
TiO2, CaO, and SiO2 abundances and ratios show a wide variation. Ni, Co, Zr, Sc, V, Rb, Sr, U, Th,
ΣREE, La, Ce and Eu anomalies and their binary relationships indicate that wherever the terrigenous
component has increased, the concentration of elements of felsic such as Zr and Hf has gone up. Elevated
concentrations of Ni, Co and Sc are contributed by chlorite and other components characteristic of basic
volcanic debris. The data suggest that these formations were generated by chemical and clastic
sedimentary processes on a shallow shelf. During transgression, chemical precipitation took place at the
sediment-water interface, whereas at the time of regression. Iron ore formed with sedimentary structures
and textures in Kammatturu area, in a setting where the water column was oxygenated.
Experimental Investigation on Characteristic Study of the Carbon Steel C45 in...IJMER
In this paper, the mechanical characteristics of C45 medium carbon steel are investigated
under various working conditions. The main characteristic to be studied on this paper is impact toughness
of the material with different configurations and the experiment were carried out on charpy impact testing
equipment. This study reveals the ability of the material to absorb energy up to failure for various
specimen configurations under different heat treated conditions and the corresponding results were
compared with the analysis outcome
Non linear analysis of Robot Gun Support Structure using Equivalent Dynamic A...IJMER
Robot guns are being increasingly employed in automotive manufacturing to replace
risky jobs and also to increase productivity. Using a single robot for a single operation proves to be
expensive. Hence for cost optimization, multiple guns are mounted on a single robot and multiple
operations are performed. Robot Gun structure is an efficient way in which multiple welds can be done
simultaneously. However mounting several weld guns on a single structure induces a variety of
dynamic loads, especially during movement of the robot arm as it maneuvers to reach the weld
locations. The primary idea employed in this paper, is to model those dynamic loads as equivalent G
force loads in FEA. This approach will be on the conservative side, and will be saving time and
subsequently cost efficient. The approach of the paper is towards creating a standard operating
procedure when it comes to analysis of such structures, with emphasis on deploying various technical
aspects of FEA such as Non Linear Geometry, Multipoint Constraint Contact Algorithm, Multizone
meshing .
Static Analysis of Go-Kart Chassis by Analytical and Solid Works SimulationIJMER
This paper aims to do modelling, simulation and performing the static analysis of a go
kart chassis consisting of Circular beams. Modelling, simulations and analysis are performed using 3-D
modelling software i.e. Solid Works and ANSYS according to the rulebook provided by Indian Society of
New Era Engineers (ISNEE) for National Go Kart Championship (NGKC-14).The maximum deflection is
determined by performing static analysis. Computed results are then compared to analytical calculation,
where it is found that the location of maximum deflection agrees well with theoretical approximation but
varies on magnitude aspect.
In récent year various vehicle introduced in market but due to limitation in
carbon émission and BS Séries limitd speed availability vehicle in the market and causing of
environnent pollution over few year There is need to decrease dependancy on fuel vehicle.
bicycle is to be modified for optional in the future To implement new technique using change in
pedal assembly and variable speed gearbox such as planetary gear optimise speed of vehicle
with variable speed ratio.To increase the efficiency of bicycle for confortable drive and to
reduce torque appli éd on bicycle. we introduced epicyclic gear box in which transmission done
throgh Chain Drive (i.e. Sprocket )to rear wheel with help of Epicyclical gear Box to give
number of différent Speed during driving.To reduce torque requirent in the cycle with change in
the pedal mechanism
Integration of Struts & Spring & Hibernate for Enterprise ApplicationsIJMER
The proposal of this paper is to present Spring Framework which is widely used in
developing enterprise applications. Considering the current state where applications are developed using
the EJB model, Spring Framework assert that ordinary java beans(POJO) can be utilize with minimal
modifications. This modular framework can be used to develop the application faster and can reduce
complexity. This paper will highlight the design overview of Spring Framework along with its features that
have made the framework useful. The integration of multiple frameworks for an E-commerce system has
also been addressed in this paper. This paper also proposes structure for a website based on integration of
Spring, Hibernate and Struts Framework.
Microcontroller Based Automatic Sprinkler Irrigation SystemIJMER
Microcontroller based Automatic Sprinkler System is a new concept of using
intelligence power of embedded technology in the sprinkler irrigation work. Designed system replaces
the conventional manual work involved in sprinkler irrigation to automatic process. Using this system a
farmer is protected against adverse inhuman weather conditions, tedious work of changing over of
sprinkler water pipe lines & risk of accident due to high pressure in the water pipe line. Overall
sprinkler irrigation work is transformed in to a comfortableautomatic work. This system provides
flexibility & accuracy in respect of time set for the operation of a sprinkler water pipe lines. In present
work the author has designed and developed an automatic sprinkler irrigation system which is
controlled and monitored by a microcontroller interfaced with solenoid valves.
On some locally closed sets and spaces in Ideal Topological SpacesIJMER
In this paper we introduce and characterize some new generalized locally closed sets
known as
δ
ˆ
s-locally closed sets and spaces are known as
δ
ˆ
s-normal space and
δ
ˆ
s-connected space and
discussed some of their properties
Natural Language Ambiguity and its Effect on Machine LearningIJMER
"Natural language processing" here refers to the use and ability of systems to process
sentences in a natural language such as English, rather than in a specialized artificial computer
language such as C++. The systems of real interest here are digital computers of the type we think of as
personal computers and mainframes. Of course humans can process natural languages, but for us the
question is whether digital computers can or ever will process natural languages. We have tried to
explore in depth and break down the types of ambiguities persistent throughout the natural languages
and provide an answer to the question “How it affects the machine translation process and thereby
machine learning as whole?” .
Today in era of software industry there is no perfect software framework available for
analysis and software development. Currently there are enormous number of software development
process exists which can be implemented to stabilize the process of developing a software system. But no
perfect system is recognized till yet which can help software developers for opting of best software
development process. This paper present the framework of skillful system combined with Likert scale. With
the help of Likert scale we define a rule based model and delegate some mass score to every process and
develop one tool name as MuxSet which will help the software developers to select an appropriate
development process that may enhance the probability of system success.
Material Parameter and Effect of Thermal Load on Functionally Graded CylindersIJMER
The present study investigates the creep in a thick-walled composite cylinders made
up of aluminum/aluminum alloy matrix and reinforced with silicon carbide particles. The distribution
of SiCp is assumed to be either uniform or decreasing linearly from the inner to the outer radius of
the cylinder. The creep behavior of the cylinder has been described by threshold stress based creep
law with a stress exponent of 5. The composite cylinders are subjected to internal pressure which is
applied gradually and steady state condition of stress is assumed. The creep parameters required to
be used in creep law, are extracted by conducting regression analysis on the available experimental
results. The mathematical models have been developed to describe steady state creep in the composite
cylinder by using von-Mises criterion. Regression analysis is used to obtain the creep parameters
required in the study. The basic equilibrium equation of the cylinder and other constitutive equations
have been solved to obtain creep stresses in the cylinder. The effect of varying particle size, particle
content and temperature on the stresses in the composite cylinder has been analyzed. The study
revealed that the stress distributions in the cylinder do not vary significantly for various combinations
of particle size, particle content and operating temperature except for slight variation observed for
varying particle content. Functionally Graded Materials (FGMs) emerged and led to the development
of superior heat resistant materials.
Energy Audit is the systematic process for finding out the energy conservation
opportunities in industrial processes. The project carried out studies on various energy conservation
measures application in areas like lighting, motors, compressors, transformer, ventilation system etc.
In this investigation, studied the technical aspects of the various measures along with its cost benefit
analysis.
Investigation found that major areas of energy conservation are-
1. Energy efficient lighting schemes.
2. Use of electronic ballast instead of copper ballast.
3. Use of wind ventilators for ventilation.
4. Use of VFD for compressor.
5. Transparent roofing sheets to reduce energy consumption.
So Energy Audit is the only perfect & analyzed way of meeting the Industrial Energy Conservation.
An Implementation of I2C Slave Interface using Verilog HDLIJMER
The focus of this paper is on implementation of Inter Integrated Circuit (I2C) protocol
following slave module for no data loss. In this paper, the principle and the operation of I2C bus protocol
will be introduced. It follows the I2C specification to provide device addressing, read/write operation and
an acknowledgement. The programmable nature of device provide users with the flexibility of configuring
the I2C slave device to any legal slave address to avoid the slave address collision on an I2C bus with
multiple slave devices. This paper demonstrates how I2C Master controller transmits and receives data to
and from the Slave with proper synchronization.
The module is designed in Verilog and simulated in ModelSim. The design is also synthesized in Xilinx
XST 14.1. This module acts as a slave for the microprocessor which can be customized for no data loss.
Discrete Model of Two Predators competing for One PreyIJMER
This paper investigates the dynamical behavior of a discrete model of one prey two
predator systems. The equilibrium points and their stability are analyzed. Time series plots are obtained
for different sets of parameter values. Also bifurcation diagrams are plotted to show dynamical behavior
of the system in selected range of growth parameter
Application of Parabolic Trough Collectorfor Reduction of Pressure Drop in Oi...IJMER
Pipelines are the least expensive and most effective method for the oil transportation.
Due to high viscosity of crude oil, the pressure drop and pumping power requirements are very high.
So it is necessary to bring down the viscosity of crude oil. Heated pipelines are used reduce the oil
viscosity by increasing the oil temperature. Electrical heating and direct flame heating are the common
method used for heating the oil pipeline. In this work, a new application of Parabolic Trough Collector
in the field of oil pipeline transport is introduced for reducing pressure drop in oil pipelines. Oil
pipeline is heated by applying concentrated solar radiation on the pipe surface using a Parabolic
Trough Collector in which the oil pipeline acts as the absorber pipe. 3-D steady state analysis is
carried out on a heated oil pipeline using commercial CFD software package ANSYS Fluent 14.5. In
this work an effort is made to investigate the effect of concentrated solar radiation for reducing
pressure drop in the oil pipeline. The results from the numerical analysis shows that the pressure drop
in oil pipeline is get reduced by heating the pipe line using concentrated solar radiation. From this
work, the application of PTC in oil pipeline transportation is justified.
Neuro-symbolic is not enough, we need neuro-*semantic*Frank van Harmelen
Neuro-symbolic (NeSy) AI is on the rise. However, simply machine learning on just any symbolic structure is not sufficient to really harvest the gains of NeSy. These will only be gained when the symbolic structures have an actual semantics. I give an operational definition of semantics as “predictable inference”.
All of this illustrated with link prediction over knowledge graphs, but the argument is general.
The Art of the Pitch: WordPress Relationships and SalesLaura Byrne
Clients don’t know what they don’t know. What web solutions are right for them? How does WordPress come into the picture? How do you make sure you understand scope and timeline? What do you do if sometime changes?
All these questions and more will be explored as we talk about matching clients’ needs with what your agency offers without pulling teeth or pulling your hair out. Practical tips, and strategies for successful relationship building that leads to closing the deal.
UiPath Test Automation using UiPath Test Suite series, part 3DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 3. In this session, we will cover desktop automation along with UI automation.
Topics covered:
UI automation Introduction,
UI automation Sample
Desktop automation flow
Pradeep Chinnala, Senior Consultant Automation Developer @WonderBotz and UiPath MVP
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
Generating a custom Ruby SDK for your web service or Rails API using Smithyg2nightmarescribd
Have you ever wanted a Ruby client API to communicate with your web service? Smithy is a protocol-agnostic language for defining services and SDKs. Smithy Ruby is an implementation of Smithy that generates a Ruby SDK using a Smithy model. In this talk, we will explore Smithy and Smithy Ruby to learn how to generate custom feature-rich SDKs that can communicate with any web service, such as a Rails JSON API.
Kubernetes & AI - Beauty and the Beast !?! @KCD Istanbul 2024Tobias Schneck
As AI technology is pushing into IT I was wondering myself, as an “infrastructure container kubernetes guy”, how get this fancy AI technology get managed from an infrastructure operational view? Is it possible to apply our lovely cloud native principals as well? What benefit’s both technologies could bring to each other?
Let me take this questions and provide you a short journey through existing deployment models and use cases for AI software. On practical examples, we discuss what cloud/on-premise strategy we may need for applying it to our own infrastructure to get it to work from an enterprise perspective. I want to give an overview about infrastructure requirements and technologies, what could be beneficial or limiting your AI use cases in an enterprise environment. An interactive Demo will give you some insides, what approaches I got already working for real.
Slack (or Teams) Automation for Bonterra Impact Management (fka Social Soluti...Jeffrey Haguewood
Sidekick Solutions uses Bonterra Impact Management (fka Social Solutions Apricot) and automation solutions to integrate data for business workflows.
We believe integration and automation are essential to user experience and the promise of efficient work through technology. Automation is the critical ingredient to realizing that full vision. We develop integration products and services for Bonterra Case Management software to support the deployment of automations for a variety of use cases.
This video focuses on the notifications, alerts, and approval requests using Slack for Bonterra Impact Management. The solutions covered in this webinar can also be deployed for Microsoft Teams.
Interested in deploying notification automations for Bonterra Impact Management? Contact us at sales@sidekicksolutionsllc.com to discuss next steps.
Epistemic Interaction - tuning interfaces to provide information for AI supportAlan Dix
Paper presented at SYNERGY workshop at AVI 2024, Genoa, Italy. 3rd June 2024
https://alandix.com/academic/papers/synergy2024-epistemic/
As machine learning integrates deeper into human-computer interactions, the concept of epistemic interaction emerges, aiming to refine these interactions to enhance system adaptability. This approach encourages minor, intentional adjustments in user behaviour to enrich the data available for system learning. This paper introduces epistemic interaction within the context of human-system communication, illustrating how deliberate interaction design can improve system understanding and adaptation. Through concrete examples, we demonstrate the potential of epistemic interaction to significantly advance human-computer interaction by leveraging intuitive human communication strategies to inform system design and functionality, offering a novel pathway for enriching user-system engagements.
LF Energy Webinar: Electrical Grid Modelling and Simulation Through PowSyBl -...DanBrown980551
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Noise Tolerant and Faster On Chip Communication Using Binoc Model
1. www.ijmer.com
International Journal of Modern Engineering Research (IJMER)
Vol. 3, Issue. 5, Sep - Oct. 2013 pp-3188-3195
ISSN: 2249-6645
Noise Tolerant and Faster On Chip Communication Using
Binoc Model
Arun Arjunan.1, Karthika Manilal.2
1
2
PG Scholar, Dept.of Electronics and Communication Engg, TKM Institute of Technology, Kollam, Kerala, India.
Asst.Professor, Dept. of Electronics and Communication Engg, TKM Institute of Technology, Kollam, Kerala, India.
ABSTRACT: Network on chip (NoC) has become the most promising and reasonable solution for connecting many cores
in system on chips (SoC). In conventional NoC architectures neighbouring routers are connected via hard wired
unidirectional communication channels. Due to unpredictable and uneven traffic patterns in NoC one of the channels may
be overflowed due to heavy traffic in one direction while the other unidirectional channel is idling and thus causing
inefficient resource utilization, data loss and degradation in performance. So as a remedy for this situation a bidirectional
NoC (BiNoC) can be used, which uses bidirectional channels to connect adjacent routers and it also supports runtime
reconfiguration of channel direction according to traffic demand by using channel direction control (CDC) protocol. Since
data communication through Network on Chip is susceptible to noise due to the presence of various noise sources, the
incorporation of a hybrid error control scheme in which combined approach of error correction and retransmission is used
which increases the reliability of the system. This architecture will allow the NoC structure to handle massive data
transmission by effectively increasing the communication bandwidth, resource utilization capability and speed of NoC
communication together with the increased reliability. The architecture is modelled using VHDL.
I.
INTRODUCTION
With vigorous advancement in semiconductor processing technologies, the chip integration has reached a stage
where a complete system can be placed in a single chip. A system on chip (SoC) is an integrated circuit (IC) that integrates
all components of an electronic system into a single chip. Applications of these systems are in the area of
telecommunications, multimedia, and consumer electronics where it has to satisfy real time requirements. As technology
scales toward deep sub-micron, mare and more number of computational units will be integrated onto the same silicon die,
causing tight communication requirements on the communication architecture. Due to this fact the traditional solution for
inter core communication in SoCs such as shared bus systems and point to point links were not able to keep up with the
scalability and performance requirements. As a result “Network on Chip” (NoCs) emerged which has some reasonable and
promising features for application to giga-scale
system on chips such as modularity, scalability, high band width
availability, despite the increased design complexity. NoC consists of components such as IP Cores, Network Interface (NI),
and Routers or switch which routes the packets of data through the Network according to a routing algorithm and
interconnecting channels or wires. Packets of data to be communicated through the NoC are transmitted through the NoC via
routers and channels to reach the destination IP core from the source IP core of the SoC.
The city block style, tiled NoC architecture is the most popular type of NoC and is considered in most of designs
due to its flexibility, simplicity, scalability and performance advantages. In this type of architecture, the wires and routers are
arranged like street grids of a city, while the resources (logic processor cores) are placed on city blocks separated by wires.
Here neighbouring routers are connected together using a pair of unidirectional communication channels where each channel
is hard-wired to handle either outgoing or incoming traffic only. At run time quite often one channel may be overflowed with
heavy traffic in one direction, while the channel in the opposite direction remains idling. This leads to performance loss,
inefficient resource utilization, reduced throughput of the system and wastage of bandwidth in City Block style Network on
Chip architectures. As a solution for these problems the concept of reversible lanes in city traffic can be implemented in
Network on chip (NoC). A counter flow lane is one in which the driving directions are changed using some electronics signs
in-order to provide high capacity to the direction with heavier traffic volume. Such a Network on chip (NoC) which
implements the idea of reversible lanes in city traffic to configure the direction of channel according to the traffic inside the
system is termed as Bidirectional Network on Chip (BiNoC) [1]. The channels are made dynamically self reconfigurable at
real time by using a protocol called as Channel direction control protocol (CDC). This project targeted the Bidirectional NoC
having dynamically self reconfigurable channels to reduce the limitations of conventional NoC architecture such as
inefficient resource utilization, reduced channel bandwidth availability for massive unidirectional communication and it also
increases the effective throughput of the network on chip without using additional channels for interconnection.
II.
RELATED WORKS
By borrowing the ideas from real world computer networks in the chip level communication issue the concept of
Network on chip evolved. Network-on-Chip (NoC) provides scalable bandwidth requirement where number of simultaneous
bus requesters is large and their required bandwidth for interconnection is more than the bus based design [7][8]. When we
are moving to the era of nano scale technology one of critical issues is a wiring delay. While the speed of basic elements
such as gate delay becomes much faster, the wiring delay is growing exponentially because of the increased capacitance
caused by narrow channel width and increased crosstalk [10]. In designing NoC systems, there are several issues to be
concerned with, such as topologies, switching techniques, routing algorithms, performance, latency, complexity and so on.
Mesh Topology is a Feasible topology and is easily expandable by adding new nodes [1][6][9][3]. A routing algorithm
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determines the direction of Packet Transmission in NoCs [2][4]. The algorithm determines to what direction packets are
routed during every stage of the routing. XY routing is a dimension order routing which routes packets first in x- or
horizontal direction to the correct column and then in y- or vertical direction to the receiver [4][6].The performance of NoC
communication architecture is dictated by its flow-control mechanism. Wormhole flow control has advantages such as less
memory requirement and less latency. In wormhole routing packets are divided to small and equal sized flits (flow control
digit or flow control unit). . After first flit the route is reserved to route the remaining flits of the packet. This route is called
wormhole.
In conventional tiled NoC structures neighboring routers are connected using hardwired unidirectional
communication channels which can handle data only in a single direction i.e. either output data or input data [1]. While
considering the case of basic NoC structure one channel may be overflowed with heavy unidirectional traffic, while the
channel in the opposite direction remains idling since the channels or links that connect the neighboring routers together are
hardwired in such a way to handle traffic in only one particular direction [2]. This causes performance degradation and
inefficient resource utilization in traditional city block style NoC architectures. Thus Traditional tiled NoC structures are not
up to the mark in handling a heavy flow of traffic in single direction although it is equipped by resources to handle the
situation.
As we move to consider Deep Submicron NoCs (DSM NoCs), communication becomes unreliable because of the
increased sensitivity of interconnects to on-chip noise sources, such as crosstalk and power-supply noise [5].In DSM SoCs;
low swing signaling reduces signal-to-noise ratio thus making interconnects more sensitive to on-chip noise sources such as
cross-talk, power supply noise, electromagnetic interferences, soft errors, etc [5]. A common practice to increase the
reliability of NoC is to incorporate error detection and correction schemes into the design. . Hamming codes [5] are the first
class of linear codes devised for error correction and have been widely employed for error control in digital communication
and data storage systems. When the transmitted codeword is received, an error detecting stage checks the parity bits. If a
correction stage is applied, the exact location of the error can be identified so that the corrupted bit can be restored. A
distance- 3 Hamming code can be easily modified to increase its minimum distance to 4, adding one more check bit, chosen
so that the parity of all of the bits, including the new one, is even to form Single Error Correction and Double Error
Detecting hamming Code (SECDED)[5]. This version of the Hamming code is traditionally used for single error correction
and double error detection.
In this Paper a noise tolerant and faster on chip communication is proposed using bidirectional Network on Chip
(BiNoC) having dynamically self reconfigurable channels. The noise toleration capability of the system is to be increased by
using a hybrid scheme of error detection/correction and retransmission schemes. The packet switched Bidirectional NoC
prototype design considers the design constraints such as two dimensional mesh topology, XY routing algorithm, and
wormhole flow control mechanisms.
III
SYSTEM ARCHITECTURE
Network on Chip provides the infrastructure for the communication in multicore single chip systems. A NoC
consists of resources and switches that are connected using channels so that they are able to communicate with each other by
sending messages. Here the topology used is mesh, which is a simplest layout; also routing in a two-dimensional mesh is
easy. [2]. Figure: 1 shows the basic structure of a tiled, city block style network on chip. The inter router communication in
conventional NoC design is accomplished by using two unidirectional communication channels that are hardwired for
handling traffic only in a single direction. This causes problems such as performance degradation and ineffective resource
utilization in conventional tiled NoC architectures. In a BiNoC, each communication channel allows itself to be dynamically
reconfigured to transmit flits in either direction [2]. This promises better bandwidth utilization, lower packet delivery
latency, and higher packet consumption rate for the network. The flow direction at each channel is controlled by a channeldirection-control protocol (CDC protocol).Figure: 2 shows the basic block diagram of a 3*3 grid array structure of
Bidirectional NoC in which routers are interconnected together using bidirectional channels.
Figure:1 Basic structure of 4*4 array of NoC.
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International Journal of Modern Engineering Research (IJMER)
Vol. 3, Issue. 5, Sep - Oct. 2013 pp-3188-3195
ISSN: 2249-6645
Figure: 2 Block diagram of 3*3 2D-Mesh BiNoC
A. Existing Conventional NoC router Architecture
The network on chip routers which are connected together using communication links are the most vital part in a
NoC design. These routers are responsible for the correct switching of data to the destination resource by using a routing
protocol. The architecture of a basic tiled network on chip is shown in Figure: 3. The Router used in basic city block style
NoC will have five ports corresponding to the directions North, East, South, west and a local PE(Processing Element). Each
port is having its input and output channel, and each input and output channel is having its control and decoding logic, which
supports five parallel connections at the same time simultaneously. The input channel consists of three parts i.e. FIFO, FSM,
and XY logic. The FIFO is used as input buffer to store the data temporarily. XY Logic is used for comparing the
coordinates stored in header flit with the locally stored coordinates and thus finds out the direction to which the packet has to
be switched. There is a switch present inside the router which switches the data from the input port of a particular direction
of router to the output port of the desired location calculated by the XY routing algorithm. An Arbiter is used in output
channel to overcome the problem of multiple input requests coming at single output port. Arbiter is based on rotating priority
scheme in which each port get reduced its priority once it has been served.
Figure: 3 Five Port Router in Basic Tiled NoC
B. BiNoC Router Architecture
Modifications to the five port router structure when used in Bidirectional network on chip are:
1. All the ports of router will be bidirectional ports.
2. Buffers should be placed in every port to store data temporarily.
3. FIFO buffer capacity should be made higher to accommodate heavy traffic.
4. A high priority finite state machine (HP FSM) and a low priority finite state machine (LP FSM) will be connected at
each port to dynamically configure the channel direction according to the traffic needs.
Architecture of five port router used in BiNoC is shown in Figure: 4.Which has the capability of dynamically self
reconfiguring the directions of its bidirectional port according to the traffic needs. The direction of data transmission of a
bidirectional channel needs to be self-configured, at run time based on local traffic demands. To achieve this goal a
distributed CDC (Channel direction Control) protocol is used. Configuration of a bidirectional channel direction is controlled
by a pair of FSMs in the channel control blocks of the routers at both ends. Opposite priorities are assigned to FSMs on the
other channel of same pair of adjacent routers. The operations of adjacent FSMs synchronized against a common clock.
The two FSMs exchange control signals through a pair hand-shaking signals: input−req (input request) and
output−req (output request). When the sending end router has data packet to transmit the output−req is made „1‟. The
output−req signal from one router becomes the input−req signal to the FSM of the other router. Each FSM also receives a
channel−req (channel request) signal from the internal routing computation module as there is a grant given to a particular
port to output data. channel−req = 1 when a data packet in the local router is requesting the current channel.
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Figure: 4 Architecture of BiNoC Router
The state transition diagram of high priority FSM and low priority FSM are shown in Figure: 5. Each FSM consists of three
states: Free, Wait, and Idle, defined as:
1.
2.
3.
Free State: the channel is available for data output to the adjacent router.
Idle State: the channel is ready to input data from the adjacent router.
Wait State: an intermediate state preparing the transition from the idle state with an input channel direction to the Free
State with an output channel direction.
(a)
(b)
Figure: 5 state transition diagram of HP and LP FSMs
The inter router channel direction control scheme is shown in figure: 6.
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ISSN: 2249-6645
Figure: 6 channel Direction control scheme(CDC)
C. Flit Structure
As this project uses worm hole flow control mechanism, the data packet will be divided into equal sized flits (flow
control units). A packet of data will contain a header flit having the information of source, destination PEs and if needed it
may contain length of packets [9] followed by the data flits which carry the actual data to be communicated and finally there
will be a tail flit which indicates the completion of packet. In this proposed system the flit structure is considered in the way
that the first bit shows the flit to be the header-trailer or the data. When the first bit equals one, this flit is a header or trailer.
In this case, the 2nd bit determines which one is the header and which one is the trailer. The data flit will have first bit as
zero. The sizes of flits considered in this project are of 16 bits each.
(a)
(b)
(c)
Figure 7 (a) Header, (b) Tail and (c) Data Flit structures
D. Error Control
Hamming codes are the widely used error detection and correction code in network on chip due to its simplicity,
short timing delay and less area overhead. SEC-DED Hamming code is used here for error detection and correction of errors.
A retransmission scheme in which the receiver acknowledges the sender to transmit the data again is also implemented in
NoC designs to increase the reliability. For Retransmission scheme the Network Interface (NI) of sender will be having
additional Retransmission Buffers which will store the packets that have been transmitted.
When considering the switch to switch and end to end error control policy [7], end to end error control policy has
less latency and area overhead. So in this project an end to end and hybrid scheme of error detection, correction and
retransmission are considered for increasing the reliability of the NoC communication. Since wormhole flow control
mechanism is been used in this project error detection and correction will be occurring in flit by flit basis so it assures more
reliability than packet by packet error control mechanism.
Flit size considered is 16 bit so for a SEC-DED hamming code will have 5 check bits and one overall parity bit. he
codeword generated by the SEC-DED Hamming encoder (22, 16) will be of 22 bits containing 16 data bits 5 check bits and
one overall parity bit.Here p1,p2,p4,p8,p16 are the check bits occupying the 2n positions of codeword while p is the overall
parity bit of the data to be transmitted. Structure of codeword generated by SEC-DED hamming encoder is shown in Figure
8.
Figure: 8 structure of (22, 16) SEC-DED hamming codeword
Hamming decoder is more complex than encoder. The Hamming Decoder block recovers a binary message vector
from a binary Hamming codeword vector. (22, 16) SEC_DED Hamming decoder takes 22 bit codeword and it calculates the
syndrome and overall parity and decides whether an error has occurred or not in a transmitted code word. Since the error
control scheme used in this work is a hybrid scheme of error correction and retransmission in which if certain number of
uncorrectable errors are found to be occurred in the received data packet then the hybrid SEC-DED decoder has to generate
the retransmission request.
IV.
SIMULATION RESULTS
The modules are modeled using VHDL in Xilinx ISE Design Suite 12.1 and the simulation of the design is
performed using Modelsim SE 6.2c to verify the functionality of the design. Analysis of the results obtained is discussed in
this section.
In Figure 9, five port router used in conventional NoC designs is shown. The five port router designed here is the
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one used in basic tiled NoC architecture. The router consists of five input and five output ports. The structure of router is
shown in Figure: 3.6. The routing decision is taken by the router according to the XY routing logic present in the router
module. The 8 bits from 3rd bit of the header flit is analyzed to find out the address of destination router and it is compared to
find the direction of switching inside the router. Switching is made into effect by a crossbar switch inside the NoC router.
There may be multiple requests for one particular output port at a time, but when using an arbiter only one request is served
once. Since Wormhole flow control is used in this router once a request is granted then the data from that port is switched till
a tail flit is encountered.
Figure:9 Five port Router Simulation
In Figure:10 the simulation results of high priority and Low priority FSM are shown which dynamically configures
the direction of bidirectional channels that interconnects the adjacsent routers in BiNoC structure.
Figure:10a Simulation result of HP FSM
Figure:10b Simulation result of LP FSM
Simulation result of BiNoC router is shown in figure: 9 which show the switching of data flits through bidirectional
ports of the router. The direction of bidirectional ports are configured according to the distributed CDC protocol consisting
of high priority and low priority FSMs at run time.
Figure: 11 Simulation result of BiNoC Router
Figure:12 shows the simulation result of Single Error Correction-Double Error Detecting (SEC-DED)Hamming
encoder. The hamming encoder designed here is a (22, 16) SEC-DED hamming encoder. Encoder inputs are 16 bit flits and
its output is 22 bit codeword consisting of check bits, data bits and an overall parity bit.
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Figure: 12 Simulation result of Hamming Encoder
Decoder designed here is a SEC-DED hamming decoder with forward error correction and retransmission. Decoder
module takes 22 bit codeword and calculates the syndrome as well as overall parity and makes decisions.
Figure: 12 Simulation result of Hamming Encoder
Figure 13 shows the simulation result of 2*2 BiNoC with hybrid error control scheme. Here communication is
established between router having address (1, 1) and router having address (2, 2) via router having address (1, 2). Here the
channels and buffers will be having more width to accommodate the hamming encoded flits than normal BiNoC. The Header
and data flits are injected in the router R1 (1, 1) and the flits are switched through the network by using both the channels in
the path. At the receiver end i.e. R4 (2, 2) the encoded flits are decoded by the hybrid decoder and if single bit errors are
detected then it is corrected and if two bit errors are occurring then errors are counted and a Retransmission Request signal is
made HIGH which reaches NI of the sender router.
Figure: 5.13 Simulation result of 2*2 BiNoC with Hybrid Error Control Scheme
Table: 1 shows the comparison of flit switching speed and resource utilization of Basic NoC router and BiNoC
router. Flits where injected into the west port of routers and switching was done to the ports in east direction for both the
routers.
Type of
Router
No of Clocks
No of flits
switched
No o f
channels
configured
Basic NoC
Router
50
44
1
BiNoC Router
50
84
2
Table: 1 Flit Switching Speed Comparison of Basic NoC Router Vs BiNoC Router.
Table: 2 shows the details of clock cycles, channels used and number of flits switched by the 2*2 Bidirectional
NoC when a communication was established form Router R1 (1, 1) to R4 (2, 2).
2*2 BiNoC
No of clocks
No of flits
reaching
destination
No of
channels used
Communication
from R1 to R4
100
146
4
Table: 2 BiNoC (2*2) flit switching from R1 (1, 1) to R4 (2, 2).
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V.
CONCLUSION
This paper focuses on the development of Bidirectional Network on Chip prototype for faster on chip
communication than conventional city block style NoC. The system also incorporates a noise toleration scheme by using
SEC-DED hamming code and for increasing the reliability, a hybrid scheme of error detection/correction and retransmission
of packets is employed in the system. Wormhole routing mode based basic 5 port NoC router and 5 port BiNoC router
having bidirectional ports which are dynamically configurable to either direction by using CDC protocol are designed and
simulated. Routing algorithm considered is XY routing algorithm. Comparative analysis of Basic NoC router with BiNoC
reveals that the flit switching speed and resource utilization capability of BiNoC router is almost double for massive
unidirectional communications. 2*2 BiNoC was developed by interconnecting the routers together in mesh topology and
communication through network based on XY routing algorithm and wormhole flow control was established. The error
control policy considered in this work is End to End Error Control Policy since its area overhead and delay overhead for
packet transfer are less. For error correction and detection SEC-DED hamming code is used which can correct single bit
errors and detect two bit errors. By using BiNoC having hybrid scheme of error control a faster and reliable on chip
communication is achieved. The whole architecture is designed using VHDL, synthesized using Xilinx ISE 12.1 and
simulated using ModelSim 6.2c simulator.
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