This document is an introduction to CMOS VLSI design and fabrication presented as a slideshow. It begins with an overview of VLSI and MOS transistors, explaining how transistors are built on a silicon substrate and doped to create n-type and p-type semiconductors. It then covers p-n junctions, MOSFET structure, and the operation of nMOS and pMOS transistors. The document introduces CMOS logic gates like inverters built from combinations of nMOS and pMOS transistors. It concludes with an overview of the CMOS fabrication process using lithography and various deposition and etching steps.

1. Introduction to
CMOS VLSI
Design
Elementary Logic Design
and
Fabrication
by
SUVAYAN SAMANTA
STREAM-ECE-2
ROLL-111
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2. INTRODUCTION
 Very-large-scale integration (VLSI) is the process of creating
integrated circuits by combining thousands of transistors into a
single chip.
 VLSI began in the 1970s
 Integrated circuits: many transistors on one chip.
 Metal Oxide Semiconductor (MOS) transistor
 Fast, cheap, low-power transistors
 Complementary: mixture of n- and p-type leads to less power
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3. Silicon Lattice
 Silicon is a Group IV material
 Transistors are built on a silicon substrate
 Forms crystal lattice with bonds to four neighbors
Si Si Si
Si Si Si
Si Si Si
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4. Dopants
 Silicon is a semiconductor
 Pure silicon has no free carriers and conducts poorly
 Adding dopants increases the conductivity
 Group V: extra electron (n-type)
 Group III: missing electron, called hole (p-type)
Si Si Si
Si As Si
Si Si Si
Si Si Si
Si B Si
Si Si Si
-
+
+
-
N-type P-type
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slide- 4

5. p-n Junctions
 A junction between p-type and n-type semiconductor forms a
diode.
 Current flows only in one direction
p-type n-type
anode cathode
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Current flow direction
Electron flow direction
slide- 5

6. CATEGORIES
MOSFET
NMOS PMOS CMOS
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7. MOSFET
Gate
source Drain
 Metal Oxide Semiconductor Field Effect Transistor
Source (Arsenic, Phosphorous, Boron)
 Drain (Arsenic, Phosphorous, Boron)
 Gate (Aluminium, Polysilicon)
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8. nMOS Transistor
 Four terminals: gate, source, drain, body
 Gate – oxide – body stack looks like a capacitor
 Gate and body are conductors
 SiO2 (oxide) is a very good insulator
 Called metal – oxide – semiconductor (MOS) capacitor
 Even though gate is no longer made of metal
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9. nMOS Operation
 Body is commonly tied to ground (0 V)
 When the gate is at a low voltage:
 P-type body is at low voltage
 Source-body and drain-body diodes are OFF
 No current flows, transistor is OFF
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10. nMOS Operation
 When the gate is at a high voltage.
 Positive charge on gate of MOS capacitor
 Negative charge attracted to body
 Inverts a channel under gate to n-type
 Now current can flow through n-type silicon from source
through channel to drain, transistor is ON
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11. pMOS Transistor
Similar, but doping and voltages reversed
Body tied to high voltage (VDD)
Gate low: transistor ON
Gate high: transistor OFF
 indicates inverted behavior
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Bubble
slide- 11

12. Power Supply Voltage
 GND = 0 V
 In 1980’s, VDD = 5V
 VDD has decreased in modern processes
High VDD would damage modern tiny transistors
 Lower VDD saves power
 VDD = 3.3, 2.5, 1.8, 1.5, 1.2, 1.0, …
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13. Transistors as Switches
We can view MOS transistors as electrically controlled
switches
Voltage at gate controls path from source to drain
g
d
s
g = 0
d
s
g = 1
d
s
g
d
s
d
s
d
s
nMOS
pMOS
OFF ON
ON OFF
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14. What is CMOS?
 Complementary metal–oxide–semiconductor (CMOS)
 Has many different uses:
 Integrated Circuits
 Data converters
 Image sensors
 Logic circuits
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15. CMOS Inverter
A Y
0
1
A Y
VDD
A Y
GND
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16. CMOS Inverter
A Y
0
1 0
VDD
OFF
A=1 Y=0
ON
GND
A Y
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17. CMOS Inverter
A Y
0 1
1 0
VDD
ON
A=0 Y=1
OFF
GND
A Y
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18. CMOS Fabrication
 CMOS transistors are fabricated on silicon wafer
 Lithography process similar to printing press
 On each step, different materials are deposited or
etched
 Easiest to understand by viewing both top and cross-section
of wafer in a simplified manufacturing
process
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19. Fabrication Steps
 Start with blank wafer
 First step will be to form the n-well
 Cover wafer with protective layer of SiO2 (oxide)
 Remove layer where n-well should be built
 Implant or diffuse n dopants into exposed wafer
 Strip off SiO2
P-TYPE si WAFER
p-substrate
Slide view
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20. Oxidation
 Grow SiO2 on top of Si wafer
 900 – 1200 ºC with H2O or O2 in oxidation
furnace
SiO2
P-substrate
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21. Photoresist
Spin on photoresist
Photoresist is a light-sensitive organic polymer
Softens where exposed to light
p-substrate
SiO2
Photoresist
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22. Lithography
 Expose photoresist through n-well mask
 Strip off exposed photoresist
p-substrate
SiO2
Photoresist
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23. Etch
 Etch oxide with hydrofluoric acid (HF)
 Only attacks oxide where resist has been exposed
p-substrate
SiO2
Photoresist
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24. Strip Photoresist
Strip off remaining photoresist
 Use mixture of acids called piranah etch
Necessary so resist doesn’t melt in next step
p-substrate
SiO2
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25. n-well
 n-well is formed with diffusion or ion implantation
 Diffusion
 Place wafer in furnace with arsenic gas
 Heat until As atoms diffuse into exposed Si
 Ion Implanatation
 Blast wafer with beam of As ions
 Ions blocked by SiO2, only enter exposed Si
SiO2
p-substrate n-well
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26. Strip Oxide
Strip off the remaining oxide using HF
Back to bare wafer with n-well
Subsequent steps involve similar series of steps
p-substrate n-well
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27. N-diffusion
 Historically dopants were diffused
 Usually ion implantation today
 But regions are still called diffusion
n+ n+ n-well n+
p-substrate
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28. N-diffusion
 Strip off oxide to complete patterning
step
n+ n+ n+
n-well
p-substrate
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29. P-Diffusion
 Similar set of steps form p+ diffusion
regions for pMOS source and drain and
substrate contact
n+ n+ n+
p+ p+ p+
p-substrate n-well
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30. Summary
 MOS Transistors are stack of gate, oxide, silicon
 Can be viewed as electrically controlled switches
 Build logic gates out of switches
 We became familier with the fabrication process
of CMOS
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31. BiBliography
web.ewu.edu/groups/technology/Claudio/ee430/Lecture
s/L1-print.pdf
 users.ece.utexas.edu/~adnan/vlsi-05-
backup/lec23Concl.ppt
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en.wikipedia.org/wiki/CMOS
www.cmosvlsi.com/

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