The document discusses arithmetic operations in digital computers. It describes how the arithmetic unit performs additions, subtractions, multiplications, and divisions by taking information from memory and processing it. It also explains how serial and parallel adders work to perform addition operations through shifting and parallel logic circuits. The document further discusses the complement technique for representing positive and negative numbers in binary with 1 and 0 bits for the sign and complement form for negative values.

1. Arithmetic Operations Ir. SNMP Simamora, MT. Laboratorium Sistem Komputasi & Jaringan Akses

3. Computer Systems General Scheme

5. Serial Adder – simplified block diagram

6. Serial Adder – Data at start

7. Serial Adder – After first shift pulse

9. Parallel Adder – logic diagram

14. Solution: sign sign 1 101100 1 101011 010100 – 20 1 110111 1 110110 001001 – 9 1 111101 1 111100 000011 – 3 0 001100 0 001100 001100 +12 0 001111 0 001111 001111 +7 Signed (2’s complement) Signed (1’s complement) Absolute magnitude Number

15. Description Solution:

16. Ex: (00011001) 2 + (00010011) 2 = (…) 2 Solution:

17. Ex: (00011001) 2 - (00010011) 2 = (…) 2 Solution: