This document contains information about a computer organization and architecture lab. It includes details about the lab report format, integer representation using fixed point, two's complement, addition and subtraction algorithms and hardware. It also discusses logical operations, and provides MATLAB code examples for 4-bit binary addition, subtraction, multiplication and restoring division algorithms.

1. COMPUTER ORGANIZATION & ARCHITECTURE LAB
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LAB@1
Full Marks: 25 Pass Marks: 10
Marks Distribution
Mark Distribution Criteria Mark Remark
Attendance 8
Lab report 8
Viva 8
Discipline 1
Total 25
Lab Report Format
 Title
 Background Theory
 MATLAB tools used in your lab program
 Algorithm&Flowchart
 Code
 Output : Screen shots/handwritten output
 Discussion & Conclusion
Integer representation (Fixed point representation):
 Only have 0 & 1 to represent everything
 Positive numbers stored in binary; e.g. 41=00101001
 No minus sign and No period
 Sign-Magnitude
 Left most bit (MSB) is sign bit
 0 means positive and 1 means negative e.g. +18 = 00010010 and -18 = 10010010
 Problems: Need to consider both sign and magnitude in arithmetic&Two
representations of zero (+0 and -0)
 Two’s compliment
 2’s compliment representation uses the most significant bit (MSB) as sign bit
making it easy to rest whether the integer is negative or positive. It differs from
the use of sign magnitude representation in the way the other bits are interpreted.
For negation take the Boolean complement of each bit of corresponding positive
number and then add one to the resulting bit pattern viewed as unsigned integer.

2. COMPUTER ORGANIZATION & ARCHITECTURE LAB
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 +3 = 00000011 and -3 = 11111101
 Benefits:
 One representation of zero
 Arithmetic works easily
 Negating is fairly easy
 3 = 00000011
 Boolean complement gives 11111100 then add 1 to LSB11111101
Addition and Subtraction
 Normal binary addition
 Monitor sign bit for overflow
 Take twos compliment of subtrahend and add to minuend
 i.e. a - b = a + (-b) ,So we only need addition and complement circuits
For example
The 2’s complement of 0111 is 1001 and is obtained by leaving first 1 unchanged, and then
replacing 1’s by 0’s and 0’s by 1’s in the other three most significant bits. Let us see an
example of subtraction using two binary numbers X = 10(1010) and Y = 9 (1001) and
perform X-Y and Y-X.
X = 1010
2’s complement of Y = +0111
-----------
Sum = 10001
Discard end carry 24 = -10000
----------
Answer: X-Y = 0001
Y = 1001
2’s complement of X = +0110
-----------
Sum = 1111
There is no end carry
Answer is negative 0001 = 2’s compliment of 1111 and for addition of 2’s complement use
same algorithm.

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Hardware for Addition and Subtraction
Figure: Hardware implementation of Addition/Subtraction
To implement the two arithmetic operations with hardware, it is first necessary that the two
numbers to be stored in registers. Let A and B be two registers that hold the magnitude of the
numbers and As and Bs be two flip-flops that hold the corresponding signs. The result of the
operation may be transferred to a third register.
The data path and hardware elements needed to accomplish addition and subtraction is shown in
Fig. 5.1. The center element is binary adder, which is presented two numbers for addition and
produces a sum and an overflow indication. The binary adder treats from two registers A and B.
the result may be stored in one of these registers or in the third register. The overflow indication
is stored in a 1-bit overflow flag. For subtraction, the subtrahend (B register) is passed through a
2’s complement unit so that its 2’s complement is presented to the adder (a-b=a + (-b)).

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Logical operation:
The fundamental logic gate family
The seven fundamental logic gates are:
1. NOT (Inverter)
2. AND
3. NAND
4. OR
5. NOR
6. XOR
7. XNOR

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Main program to add two unsigned binary number [4 bit binary adder]
%******* Main Program Code*******%
display('Enter First Binary Sequence')
for i=1:4
a(i)=input('');
end
display('Enter Second Binary Sequence')
for i=1:4
b(i)=input('');
end
carry=0;
for i=4:-1:1
c(i)=xors(xors(a(i),b(i)),carry);
carry=ors(ands(a(i),b(i)),ands(xors(a(i),b(i)),carry));
end
%*******************************************
fprintf('%d',a)
fprintf('n')
fprintf('%d',b)
fprintf('+n')
display('=====================')
fprintf('%d%d',carry,c)
fprintf('n')
Function for AND operation
function [res] = ands(a,b)
if(a==1) && (b==1)
res=1;
else
res=0;
end
end
Function for XOR operation
function [res]= xors(a,b)
if (a~=b)
res=1;
else
res=0;
end
end
Function for OR operation
function [res] = ors(a,b)
if (a==0) && (b==0)
res=0;
else
res=1;
end
end

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Lab@2
%%***** Matlab code for subtraction *******%%
display('Enter First Number')
for i=1:4
a(i)=input('');
end
display ('Enter Second Number')
for i=1:4
b(i)=input('');
end
%%2's complement of Second Sequence
for i=1:4
b(i)=xor(1,b(i));
end
c=1;% for 2's complement we add 1 so initialize carry as 1
for i=4:-1:1
[s (i) c] = adder ( a(i) , b(i) , c);
end
display('result')
%% Carry decide the result is in negative or positive. ifCayy is 0 then
%% result is negative else result is positive
if (c==0)
for (i=1:4)
s(i) = xor(1,s(i));
end
car=1;
for (i=4:-1:1)
[s(i) , car] = adder(s(i),0,car);
end
%display('Negative')
fprintf('-')

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fprintf('%d',s)
else
%display('Positive')
fprintf('+')
fprintf('%d',s)
end
% Plotting input and output
subplot(3,1,1)
stem(a,'R');
xlabel('First sequence');
subplot(3,1,2);
stem(b,'G');
xlabel('Second Sequence');
subplot(3,1,3);
stem(s,'B');
xlabel('Result(a-b)');
Function for Addition Operation
function [res,car] = adder(a,b,c)
res= xor(xor(a,b),c);
car= or(and(a,b),and(xor(a,b),c));
end

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Lab@3
Multiplication Algorithm
 Complex
 Work out partial product for each digit
 Take care with place value (column)
 Add partial products
Example:
1011 Multiplicand (11 decimal)
X 1101 Multiplier (13 decimal)
1011 Partial products
0000 Note: if multiplier bit is 1 copy multiplicand (place value)
1011 otherwise zero
1011
10001111 Product (143 Dec)
Note: need double length result
Hardware Implementation:

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The multiplier and multiplicand bits are loaded into two registers Q and M. A third register A is
initially set to zero. C is the 1 bit register which holds the carry bit resulting from addition. Now,
the control logic reads the bits of the multiplier one at a time. If Q0 is 1, the multiplicand is added
to the register A and is stored back in register A with C bit used for carry. Then all the bits of
CAQ are shifted to the right 1 bit so that C bit goes to An-1, A0 goes to Qn-1 and Q0 is lost. If Q0 is
0, no addition is performed just do the shift. The process is repeated for each bit of the original
multiplier. The resulting 2n bit product is contained in the QA register.
Flowchart for unsigned binary multiplication

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%% Matlab code for Multiplication of two unsigned 4-bit binary number
clearall;
closeall;
R=[0 0 0 0 0 0 0 0];
display('Enter First Number');
for i=5:8
A(i)=input('');
end
display ('Enter Second Number');
for i=5:8
B(i)=input('');
end
display('***==============================***');
fprintf('Multiplicant=');
fprintf('%d',A);
fprintf('n');
fprintf('Multiplier=');
fprintf('%d',B);
fprintf('n');
fprintf('***************************');
subplot(3,1,1);
stem(A,'G');
xlabel('Multiplicant');
if(B(8)==1)
R=A;% Assign the given number First partial product
end
for i=7:-1:5
if(B(i)==1)
c=0;
for j=8:-1:1
[A(j) c]=adds(A(j),A(j),c);

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end
c=0;
for j=8:-1:1
[ R(j) c]=adds(R(j),A(j),c);% shifting left
end
else
c=0;
for j=8:-1:1
[A(j) c]=adds(A(j),A(j),c);
end
end
end
%% Result Plotting
fprintf('n');
fprintf('Multiplication result=');
fprintf('%d',R);
fprintf('n');
display('***==============================***');
subplot(3,1,2);
stem(B,'R');
xlabel('Multiplier');
subplot(3,1,3);
stem(R);
xlabel('Result after multiplication');

12. COMPUTER ORGANIZATION & ARCHITECTURE LAB
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Lab@4
Division of Unsigned Binary Integers
Hardware implementation of division algorithm
Restoring Division:
This method is called restoring division because the partial remainder is restored by adding the
divisor to the negative difference. Here division process requires controlled subtract-restore
operations. Whether the next operation is a subtraction or restoration, is controlled by the
result of the current operation.
Shift left
Divisor
Add/Subtract
An An-1 .....………. An
0 Mn-1 ……..…... Mn
Qn-1 ……..…… … Q0
N+1 Bit
Adder
Control
unit

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Flowchart of Restoring Division algorithm
Algorithm
Step1: Initialize A 0, dividend (Q) & divisor (M) registers and counter 0
Step2: Shift left A, Q on binary position.
Step3: If MSB of A is 1, set Q (0)  0 and add M back to A (restore A), else set Q (0)  1
Step4: counter counter + 1; if couner ≠ n-1 where n is the number of bits in the dividend,
repeat process from step2 else stop the process. Finally remainder will be in A and
Quotient will be in Q.

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%% Matlab Code for restoring Division algorithm [two 4-bit binary number %%
A = [ 0 0 0 0 ];
B = [0 0 0 0];
disp('Enter Dividend:')
for i=1:4
Q(i)=input('');
end
disp('Enter Divisor:')
for j=1:4
B(j)=input('');
end
%% Display Input Data
display('Dividend:');
Q
display('Divisor:');
B
%% code of 2's complement of Divisor
c=1;
for i=4:-1:1
[nB(i) c]=adds(xor(B(i),1),0,c);
end
%% Main code start
for cnt=1:4
% Shift operation (left Shift A, Q)
[A Q]=shifts(A,Q);
C=0;
% Subtraction operation (A=A-B)
for i=4:-1:1
[A(i) C]=adds(A(i),nB(i),C);
end
% Check MSB of A

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if(A(1)==0)
Q(4)=1; % Set LSB of Q
else
Q(4)=0; % Set LSB of Q
c=0;
% Addition Operation (A=A+B)
for i=4:-1:1
[A(i) C] = adds(A(i),B(i),C);
end
end
end
%% Result Display
disp('Quotient: ')
Q
disp('Remainder: ')
A
%% Plotting Result
subplot(2,2,1);
stem(Q, 'Y');
xlabel('Dividend');
subplot(2,2,2);
stem(B,'B');
xlabel('Divisor');
subplot(2,2,3);
stem(Q,'R');
xlabel('Quotient');
subplot(2,2,4);
stem(A,'G');
xlabel('Remainder');