5 sedra ch 05 mosfet

Copyright  Muhammad A M Islam.SBE202A Device Structure and Physical Operation 19/21/2020
MOS Field-Effect
Transistors (MOSFETs)
Chapter 5

MOS Field Effect Transistors
1. Device Structure and Physical Operation
2. Current-Voltage Characteristics
3. MOSFET Circuits at DC
4. Applying the MOSFET in Amplifier Design
5. Small Signal Operations and Models
6. Basic MOSFET Amplifier Configurations
7. Biasing in MOSFET Amplifier Circuits
8. Discrete-Circuit MOS Amplifiers
9. The Body Effect and other Topics

DEVICE STRUCTURE AND
PHYSICAL OPERATION

Device Structure
NMOS
npn BJT

Operation with Zero Gate Voltage

Creating a Channel for Current Flow
GS tv V
𝑣 𝑜𝑣 = 𝑣 𝐺𝑆 − 𝑉𝑡
𝑄 = 𝐶𝑣 𝑂𝑉
𝐶 𝑜𝑥 =
𝜀 𝑜𝑥
𝑡 𝑜𝑥
Oxide
Permittivity
Thickness
𝐶 = 𝐶 𝑜𝑥 𝑊𝐿
Unipolar

Applying a Small vDS
𝑖 𝐷 = 𝜇 𝑛
𝑄
𝐿
𝐸
𝑖 𝐷 = 𝜇 𝑛
𝐶 𝑂𝑥 𝑊𝐿𝑣 𝑂𝑉
𝐿
𝑣 𝐷𝑆
𝐿
𝑖 𝐷 = 𝜇 𝑛 𝐶 𝑂𝑥
𝑊
𝐿
𝑣 𝑂𝑉 𝑣 𝐷𝑆

Applying a Small vDS 𝑖 𝐷 = 𝜇 𝑛 𝐶 𝑂𝑥
𝑊
𝐿
𝑣 𝑂𝑉 𝑣 𝐷𝑆
𝑘 𝑛
′ = 𝜇 𝑛 𝐶 𝑂𝑥
𝑘 𝑛 = 𝑘 𝑛
′
𝑊
𝐿
𝑖 𝐷 = 𝑘 𝑛 𝑣 𝑂𝑉 𝑣 𝐷𝑆
 
1DS
DS n OV
D
v
r k v
i

 
1
DS
n OV
r
k v


Applying a Small vDS
vOV

Operation as vDS Is Increased
𝑖 𝐷 = 𝑘 𝑛 𝑣 𝑂𝑉 −
1
2
𝑣 𝐷𝑆 𝑣 𝐷𝑆

𝑖 𝐷 = 𝑘 𝑛 𝑣 𝑂𝑉 −
1
2
𝑣 𝐷𝑆 𝑣 𝐷𝑆

Triode Region:
Saturation Region:
1
2
D n OV DS DSi k v v v
 
   
21
2
D n OVi k v
OV GS Tv v V  '
n n
W
k k
L

Derivation of the iD-vDS Relationship
DS OVv v
DS OVv v
 n OxC
W
L


The p-Channel MOSFET

The Complementary MOS or CMOS

Operating the MOS Transistor in the Sub-threshold
Region
GSv
Di e

CURRENT-VOLTAGE
CHARACTERISTICS

Circuit Symbols

The iD-vDS Characteristics

The iD-vGS Characteristics

21
2
D n OVi k v
Sat

Sat

Channel-length Modulation

Finite Output Resistance in Saturation
21 1
2 1
D n OVi k v
L
L



' 21
2
D n OV
W
i k v
L L

 
21
1 ; 1
2
D n OV
L L
i k v
L L
  
   
 
'
DSL v 
'
21
1
2
D n DS OVi k v v
L
 
  
 
'
L

 
 21
1
2
D n OV DSi k v v 
 0 1D D DSi I v 

The Effect of vDS on iD
 0 1D D DSi I v 
1
AV

 '
A AV V L
'
:5 50A
V
V
m

0 1 DS
D D
A
v
i I
V
 
  
 
2
0
1
2
D n OVI k v
Slope 0DI 0D
A
I
V


Large-signal Equivalent Circuit Model
0Di

Large-signal Equivalent Circuit Model
1
ConstantGS
D
O
DS V
di
r
dv

 
  
  0
A
O
D
V
r
I

2
0
1
2
D n OVI k VA
D
V
I

0 1 DS
D D
A
v
i I
V
 
  
 

Circuit Symbols
Characteristics of the p-Channel MOSFET

Circuit Symbols

tV ve@
SG tv V
DS OVv vTriode Region:
Saturation Region:
OV GS tv v V 
DS OVv v
1
2
D p OV DS DSi k v v v
 
   
'
p p
W
k k
L

21
1
2
DS
D p OV
A
v
i k v
V
 
  
 

Terminal Voltage-Region Relationship

MOSFET CIRCUITS AT DC

Triode Region:
Saturation Region:
1
2
 
   
OV GS Tv v V 
Derivation of the iD-vDS Relationship
'
n n
W
k k
L

 21
1
2

Example 5.3
0.4
0.5
?
?
3.2k 
0.7tV 
0 
DR  5
2.5 0.5
0.4


5
S SR V : DS tQ V V Sat 
 21
1
2
21
0.4 3.2
2
OVv  
0.5 0.5OVv    
0.7 0.5 1.2GSv   
 1.2 2.5 1.3
3.25
0.4 0.4
SR
  
  

Example 5.4
  ?i v 
Saturation
21
2
D n OVi k v
0 
 
21
2
D n ti k v V 
Diode-connected transistor

Example 5.5
1k 
1tV DSR 
1
2
 
   
0.395Di mA
12.4 k 
Triode
?
?
VD = + 0.1 V
DS
D
V
I

?
= 253 Ω
2 Unkowns ← 2 Eqns

Example 5.6
 21
1
2
D n OV DSI k v v 
 
21
1 5 6 1
2
D DI I    
0.5 or 0.89DI mA mA
0.5DI mA
? ?
?
?
?
?
?𝜆 = 0
𝑘 𝑛 = 1 𝑚𝐴/𝑉2
𝑉𝑡 = 1𝑉

Example 5.7
1k 
0 
1tV  
?
?
?
Sat
 21
1
2
21
2
D n OVi k v 0.5 mA
1OVV V 
2GSV V 
maxDV  8DR k 
Sat, Largest RD?
6DR k 
3GV V
1
2
G
G
R
R

2
3
M
M

2
3
3 1 4V 

Exercise D5.14
?
𝑉𝑂𝑉 = 0.6 V
𝑉𝑡𝑝 = −0.4 V
𝑘 𝑝
′ = 0.1mA/V
𝑊
𝐿
=
10𝜇𝑚
0.18𝜇𝑚

Example 5.8

Example 5.8
1k 
0 
1tV 
?
? ?
0
2.5
2.5
 
 
 
  
02.52.5

APPLYING THE MOSFET IN
AMPLIFIER DESIGN

Ov
Di 
Obtaining a Voltage Amplifier
DSDD
D D
vV
R R

DD D DV R i DSv
Transconductance Amplifier

The Voltage Transfer Characteristics
 
21
2
D n GS ti k v V 
Ov DD D DV R i DSv
 
21
2
o DD n D GS tv V k R v V  
| |DS B GS B tV V V 
2 1 1
| n D DD
GS B t
n D
k R V
V V
k R
 
 

Biasing the MOSFET to Obtain a Linear Amplifier
 
21
2
o DD n D GS tv V k R v V  
 GS GS gsv V v t 

| I IQ
O
V v v
I
dv
A
dv

Operation as a Linear Amplifier
?

The Small-Signal Voltage Gain
| I IQ
O
V v v
I
dv
A
dv

 
21
2
o DD n D GS tv V k R v V    D IQ tR k V V D OVR kVVA 

| I IQ
O
V v v
I
dv
A
dv

21
2
D n OVI k V
D OVR kV 
1
2
1
2
OV
OV
V
V

2 D D
V
OV
R I
A
V
 
2 RD
V
OV
V
A
V
  max
2 DD
V
OV
V
A
V

The Small-Signal Voltage Gain

Determining VTC by Graphical Analysis
DSDD
D
D D
vV
i
R R
 

Determining VTC by Graphical Analysis

SMALL SIGNAL
OPERATION AND
MODELING

The DC Bias Point
21
2
D n OVi k v
D DD D DV V I R 
G D tV V V 
Conceptual Common Source Circuit

GS GS gsv V v 
 
21
2
D n GS ti k v V 
 
21
2
D n gs GS ti k v V V    
2 21 1
2 2
D n OV n OV gs n gsi k V k V v k v  
21
2
D n gs OVi k v V   
D D di I i 
The Signal Current in the Drain Terminal
21
2
d n OV gs n gsi k V v k v 
To achieve linearity:
21
2
n gs n OV gsk v k V v=
2gs OVv V=
d n OV gsi k V v
m n OVg k V
d m gsi g v

| GS GS
D
m v v
GS
di
g
dv


| GS GS
D
m v V
GS
di
g
dv

21
2
| GS GS
n OV
m v V
GS
d k v
g
dv

 
 
 
  | |GS GS GS GS
OV
m n OV v V n OV v V
GS
d v
g k V k V
dv
  
m n OVg k V

D DD D Dv V i R 
 D d DD D d DV v V I i R   
d d Dv i R 
d m gs Dv g v R 
d
V m D
gs
v
A g R
v
  
The Voltage Gain

 minGSv tV
The Voltage Gain
tV
Cut off
 maxGSv

Separating the DC Analysis and the Signal Analysis
Under the small-signal approximation:
ac is superimposed on dc.
Apply superposition
Solution: dc then ac

Small-Signal Equivalent-Circuit Models

Small-Signal Models for the MOSFET

 ||d
V m D O
gs
v
A g R r
v
  
The Voltage Gain
di

di 

D
m
GS
di
g
dv
 OVD
OV GS
dvdi
dv dv
  D
OV
di
dv

The Trans-Conductance gm
m n OVg k V
21
2
D n OVI k V
2m n Dg k I
2 D
OV
n
I
V
k

2
2 D
n
OV
I
k
V

2 D
m
OV
I
g
V


Example 5.10
?VA 
?inR 
_max ?iv 
1.5tV V
0.25nk 
50AV V

DC Solution
Neglect Modulation
21
1
2
DS
D n OV
A
V
I k V
V
 
  
 
15D D DV R I  1.06DI mA4.4DV V
21
2D n OVI k V
 
21
1.5
8
D DI V 
Example 5.10 1.5tV V
0.25nk 
50AV V

AC Solution
Example 5.10 1.5tV V
0.25nk 
50AV V

AC Solution
m n OVg k V  0.25 4.4 1.5  0.725 /mA V
A
o
D
V
r
I

50
1.06
 47 k 
Example 5.10
? ?
1.5tV V
0.25nk 
50AV V

AC Solution
10 1047
10 M
=4.52PR
VA  iv  ov 
vA 
o
i
v
v
m gs Pg v R 
Example 5.10
?
gsv
m Pg R  0.725 4.52   3.3 
m gs P
gs
g v R
v
 
Superposition

AC Solution
10 1047
10 M
=4.52PR
Example 5.10
inR  i
i
v
i
i
i o
G
v
v v
R

 
 
 
1
1
G
o
i
R
v
v


1
1
G
v
R
A


i
G
i o
v
R
v v


1
4.3
in GR R 2.33M

Largest Allowable Input Signal Vi
For linearity:
Example 5.10
No Triode: D G tv v V 
_min _maxD G tv v V 
D v i G i tV A v V v Vˆ ˆ   
ˆ ˆ3.3 1.5i iv v  
ˆ 0.34iv V
G D DV I V  
2 OVV
5
OVV
gsv  0.58
4.4 1.5
5

No Cut off: G S tv v V 
gs tv V

The T Equivalent-Circuit Model

Drain-to-Source Resistance ro
The T Equivalent-Circuit Model

Example 5.11
𝑅𝑖𝑛 =
1
𝑔 𝑚
𝐴 𝑉 = 𝑔 𝑚 𝑅 𝐷

Small-Signal Equivalent Circuit Model

BASIC MOSFET AMPLIFIER
CONFIGURATIONS

The Basic Configurations

Characterizing Amplifiers
Unilateral

inR 
vA   / / / /m o D Lg r R R
OutR  / /o Dr R
vG  vA
The Common-Source (CS) Amplifier
↑↑
↑×
↑
CD for ↓ 𝑅 𝑂𝑢𝑡
Voltage Amplifier

The Common-Source (CS) Amplifier
Performing the Analysis Directly on the Circuit Diagram

inR 
0vA 
1
D
S
m
R
R
g
 

OutR  DR
↓
𝑟0 is negligible for Discrete Ciruits
The Common-Source Amplifier with a Source Resistance
gsv 
1
1
m
i
S
m
g
v
R
g
 
 
 

1
1
i
m S
v
g R
Controls 𝑣𝑔𝑠
1
m D
m S
g R
g R


−
𝑅 𝐷𝑟𝑎𝑖𝑛_𝑇𝑜𝑡𝑎𝑙
𝑅 𝑆𝑜𝑢𝑟𝑐𝑒_𝑇𝑜𝑡𝑎𝑙

1
mginR 
0vA 
1
D
m
R
g

 
 
 
OutR  DR
𝑟0 is negligible for Discrete Ciruits
The Common-Gate Amplifier
m Dg R
↓
vG 
1
1
m
m D
Sig
m
g
g R
R
g
 
 
  
1
m D
m Sig
g R
g R
Similar to CS
Similar to CS
↓↓ Limited Applications
Amplify ↑ 𝑓 signal through ↓ 𝑅 coaxial cables

The Common-Drain Amplifier or Source-Follower

The Common-Drain Amplifier or Source-Follower
inR 
OutR 
1
|| O
m
r
g
vA 
||
1
||
L O
L O
m
R r
R r
g
 

vG
1
mg


BIASING IN MOS
AMPLIFIER CIRCUITS

Biasing in MOS Amplifier Circuits
• Fixing VG and Connecting a Resistance in the
Source
• Fixing VGS
• Using a Constant Current Source
• Using a Drain to Gate Feedback Resistor

Large Variation in MOS Parameters
Fixing VGS
1. Manufacturing
2. Temperature

Fixing VGS

Fixing VG and Connecting a Resistance in the Source
Degeneration Resistance
Basic Arrangement

Fixing VG and Connecting a Resistance in the Source
Reduced Variability

Single Supply Practical Implementation
Rule of Thumb

AC Coupling

Two Supply Practical Implementation
Rule of Thumb

?
?
Example 5.12
2
1 /k mA V
1tV V
?
Rule of Thumb
10
5
?
?
10
?10
21
2
D OVI kV
?7
8M
7M
0 1.5tV V
 
21
2
D GS tI k V V 
0.455 0.5DI  
0.045DI mA  
0.045
% 100%
0.5
DI

  
% 9%DI  
GS G S DV V R I 
7 10GS DV I 
 
21
7 10
2
D t DI k V I  
0.455DI 
% ?DI 

Using a Drain-to-Gate Feedback Resistor
DD GS D DV V I R 
GS DD D DV V I R 
-ve Feedback
↑ 𝐼 𝐷 →↓ 𝑉𝐺𝑆 →↓ 𝐼 𝐷

Using a Constant-Current Source
?
 
21
2
D GS tI k V V 

?
 
2
1
1
2
D n GS tI k V V Q
12 D
GS t
n
I
V V
k
  
1Q DD SS GS
D
V V V
I
R
 

1
DD SS GS
D
V V V
R
I
 
 
Current Mirror
 
2'
2
2
1
2
Q D n GS t
W
I I k V V
L
 
   
 
2
Ref
1
W
I L
WI
L
 
 
  
 
 
 

ICs use constant-current source biasing only!

DISCRETE-CIRCUIT MOS
AMPLIFIERS

Discrete-Circuit MOS Amplifiers
Amplifier Examples
MOS: Primarily used in IC’s

The Common-Source Amplifier
Coupling
Isolates DC
biasing
from RL
and RSig
By Pass
Capacitor
Input
Coupling
Equivalent Circuit

The Common-Source Amplifier Equivalent Circuit

The Common-Source Amplifier Input Resistance
GRinR 

Out GR R
The Common-Source Amplifier Output Resistance
?
/ /o Dr R

vA 
The Common-Source Amplifier Voltage Gain
o
i
v
v
 / / / /m gs o D L
gs
g v r R R
v

  / / / /m o D Lg r R R 

 / /m o Cg r R
The Common-Source Amplifier Proper Voltage Gain
voA 

vG 
The Common-Source Amplifier Overall Voltage Gain
o
sig
v
v
i o
sig i
v v
v v
 G
v
G sig
R
A
R R


  / / / /G
m o C L
G sig
R
g r R R
R R
 

 / / / /G
v m o C L
G sig
R
G g r R R
R R
 


The Common-Source Amplifier Current Gain
iA  o
i
i
i
o
L
i
i
v
R
v
R
 o i
i L
v R
v R
   / / / / G
m o C L
L
R
g r R R
R
  

The Common-Source Amplifier Short Circuit
Current Gain
isA  os
i
i
i
m gs
gs
i
g v
v
R
  m Gg R 

The Common-Source Amplifier Alternative Analysis
1
mg
Or

The Common-Source Amplifier with a Source
Resistance
Neglect for Simplicity
?

Resistance
?
? RD
Source Degeneration
Resistance

Resistance

Resistance
VA 
 ||
1
D L
S
m
R R
R
g

 
 
 
R
 
 
||
1
m D L
m S
g R R
g R

 

VOA 
 1
m D
m S
g R
g R



Resistance
vG  o
sig
v
v
i o
sig i
v v
v v
 G
v
G sig
R
A
R R


 
 
/ /
1
m D LG
v
G sig m S
g R RR
G
R R g R

 
 

Resistance
voG 
 1
G m D
G sig m S
R g R
R R g R

 

Resistance
iA  o
i
i
i
o
L
i
i
v
R
v
R
 i
v
L
R
A
R

 
 
||
1
m D L G
i
m S L
g R R R
A
g R R
 

  1
m D G
i
m S D L
g R R
A
g R R R
 
 

Resistance
isA 
  1
m D G
m S D
g R R
g R R


 1
m G
is
m S
g R
A
g R
 
   1
m D G
i
m S D L
g R R
A
g R R R
 
 

Resistance

Neglect gmb and rO for Simplicity
DR
o
v
i
v
A
v

?
1
i i
m
v i
g

?
 ||o i D Lv i R R
 ||m D Lg R R
voA  m Dg R

vG 
 ||o i D Lv i R R
o
sig
v
v
i o
sig i
v v
v v

 
1
||
1
m
v m D L
sig
m
g
G g R R
R
g


 ||
1
m D L
v
m sig
g R R
G
g R


voG 
1
m D
m sig
g R
g R
o
v
i
v
A
v
  ||m D Lg R R

iA 
isA 
D
D L
R
R R
1

Current Followersig ii i

The Common-Gate Amplifier Alternative Analysis

The Common-Drain or Source-Follower Amplifier

inR 
GR

outR 

outR 
1
/ /o
m
r
g

vA  o
i
v
v
||
1
||
o L
o L
m
r R
r R
g


?o Lr R
1
L
v
L
m
R
A
R
g


Vi

voA 
||
1
||
o L
v
o L
m
r R
A
r R
g


1
o
o
m
r
r
g


voG 
vG 
||
1
||
G o L
G sig
o L
m
R r R
R R r R
g
 
1
G o
G sig
o
m
R r
R R r
g
 

 
1
1
||
i
L
m o L
v
R
g r R

 
 
 
ii io
iA 
o
i
i
i
 
1
1
||
G
L
m o L
R
R
g r R
 
 
 
 
1
1
||
i
L
m o L
i
G
v
R
g r R
v
R
 
 
  
 
 
||
1
||
o Li
L
o L
m
r Rv
R r R
g
 
 
  
  
 
o
L
v
R
oi

0| L
o
is R
i
i
A
i
 
ii io

ii io
m Gg R
0| L
o
is R
i
i
A
i
 

Table 5.4
Summary and Comparisons

Table 5.4 (Continued)
Summary and Comparisons

The Role of the Substrate-The Body Effect
VB
VDR

VDRVB
VB VB
Depletion RegionChannel
WDep Channel Hight ID

2nd Gate VB
VDR WDep
Channel Hight ID

With Body Effect

Temperature Effects
0DdI
dT


Breakdown and Input Protection

Breakdown:
20 150DBV 
Avalanche
Avalanche

Breakdown: Punch Through
20DBV V
Modern MOS has short L

Breakdown
30GSV VStatic Charge

Velocity Saturation
↑↑ electric fields → channel carrier drift velocity
reaches an upper limit (≈ 107 cm/s for electrons and
holes in silicon).
Modem very-short-channel devices can occur for vDS
<1 V.
𝑖 𝐷 = 𝛼𝑣 𝐺𝑆
𝑔 𝑚 = 𝐶𝑜𝑛𝑠𝑡𝑎𝑛𝑡

The Depletion-Type MOSFET

End of Chapter

5 sedra ch 05 mosfet

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5 sedra ch 05 mosfet