This document summarizes the design of a low bitrate modulator using FPGA for satellite applications. It describes: 1) Modeling a BPSK modem using System Generator in MATLAB, including modulator, channel, and demodulator blocks. 2) Designing and simulating the individual blocks of a BPSK modulator in VHDL, and implementing the design on a Spartan 3 FPGA board. 3) Testing the design in ModelSim and verifying it achieves the expected BPSK modulation at a bitrate of 1200 bps for potential use in deep space telemetry or navigation systems.