This document summarizes a paper presented at the International Conference on Emerging Trends in Engineering and Management in 2014. The paper proposes a low complexity turbo decoder architecture using a modified Add Compare Select (ACS) unit and registers to implement the Constant log BCJR algorithm. The Constant log BCJR algorithm reduces complexity compared to other MAP decoding algorithms. The proposed decoder is designed to decode two blocks of data simultaneously, increasing throughput. Simulation and synthesis results showed the Constant log BCJR decoder uses less memory and power than an LUT log BCJR decoder.