This document describes the implementation of a SISO-OFDM transmission system using MATLAB and a TMS320C6713 digital signal processor (DSP). Key steps include:
1) Developing the baseband system model in Simulink with blocks for modulation, transmission over an AWGN channel, and demodulation.
2) Using Real-Time Workshop and the C6x Target to generate C code from the Simulink model and compile it for the TMS320C6713 DSP.
3) Deploying the system on TMS320C6713 DSP Starter Kits to perform real-time OFDM transmission and verify the implementation against simulations.
IRJET-Simulation of Channel-Estimation for Digital Communication System based...IRJET Journal
This document summarizes a simulation of an OFDM digital communication system that uses different modulation techniques. It describes:
1) The OFDM system model that uses techniques like BPSK, QPSK, 16-PSK and 256-PSK modulation to transmit data in the form of a grayscale image file.
2) How the system works, including converting the image to OFDM symbols, transmitting over an AWGN channel, and reconstructing the image at the receiver.
3) The results of simulations comparing different modulation techniques in terms of runtime, bit error rate, and pixel error for varying signal to noise ratios. The simulations show higher order modulations having higher error rates but lower runtimes.
This document describes an FPGA-based design and implementation of an orthogonal frequency division multiplexing (OFDM) transceiver module using VHDL. The key components developed include a serial-to-parallel converter, 4-QAM modulator, 64-point IFFT using a radix-4 butterfly structure, FFT, 4-QAM demodulator, and parallel-to-serial converter. The design utilizes CORDIC algorithms instead of multipliers to improve resource usage. The OFDM transceiver core was implemented and tested on a Xilinx Spartan-3AN FPGA using a loopback configuration.
Field programmable gate array implementation of multiwavelet transform based...IJECEIAES
This article offers an efficient design and implementation of a discrete multiwavelet critical-sampling transform based orthogonal frequency division multiplexing (DMWCST-OFDM) transceiver using field programmable gate array (FPGA) platform. The design uses 16-point discrete multiwavelet critical-sampling transform (DMWCST) and its inverse as main processing modules. All modules were designed using a part of Vivado® Design Suite version (2015.2), which is Xilinx system generator (XSG), and is compatible with MATLAB Simulink version R2013b. The FPGA implementation is carried out on a Zynq (XC7Z020-1CLG484) evaluation board with joint test action group (JTAG) hardware cosimulation. According to the results obtained from the implementation tools, the implemented system is efficient in terms of resource utilization and could support the real-time operations.
BER Performance Improvement for 4 X 4 MIMO Single Carrier FDMA System Using M...IRJET Journal
This document describes a system that aims to improve the bit error rate (BER) performance of 4x4 MIMO single-carrier frequency-division multiple access (SC-FDMA) uplink transmission. It investigates using minimum mean square error (MMSE) equalization at the receiver to better detect MIMO data over Rayleigh fading channels. Simulation results using MATLAB show that the proposed MMSE detection scheme decreases BER as signal-to-noise ratio increases for 16-QAM modulation. The BER performance is also compared to orthogonal frequency-division multiple access (OFDMA) MIMO systems, showing improved results for SC-FDMA.
Comparative study of_digital_modulation (1)Bindia Kumari
This document compares different digital modulation techniques that can be used in orthogonal frequency division multiplexing (OFDM) and WiMAX networks. It simulates BPSK, QPSK, 16-QAM and 64-QAM modulation in MATLAB and measures their performance in terms of bit error rate and throughput. The results show that higher order modulations like 64-QAM provide much higher throughput but also higher bit error rates compared to lower order modulations at a given signal-to-noise ratio. The best configuration balances low bit error rates and high throughput.
Implementation of Algorithms For Multi-Channel Digital Monitoring ReceiverIOSR Journals
Abstract: Monitoring Receivers form an important constituent of the Electronic support. In Monitoring
Receiver we can monitor, demodulate or scan the multiple channels.
In this project, the Implementation of algorithm for multi channel digital monitoring receiver. The
implementation will carry out the channelization by the way of Digital down Converters (DDCs) and Digital
Base band Demodulation. The Intermediate Frequency (IF) at 10.7 MHz will be digitalized using Analog to
Digital Converter (ADC) with sampling frequency 52.5 MHz and further converted to Base band using DDCs.
Virtually all the digital receivers perform channel access using a DDC. The Base band data will be streamed to
the appropriate demodulators. Matlab Simulink will be used to simulate the logic modules before the
implementation. This system will be prototyped on an FPGA based COTS (Commercial-off-the-shelf)
development board. Xilinx System Generator will be used for the implementation of the algorithms.
Keywords: DDC, ADC, Digital Base band demodulation, IF, Monitoring Receiver.
This report discusses the planning Associate in
nursing the implementation of an OFDM system
in several information module schemes like MQPSK,
M-QAM. First, a short introduction is
provided by explaining the background and the
specification of the project. Then the report deals
with the system model, every block of the OFDM
system is represented (IFFT, FFT, Cyclic prefix,
modulation / reception, Channel estimation, bit
error rate). System design is analyzed. The
transmission techniques, further because the
system parameters for transmission and reception
are explained well. Finally, the results are
provided.
This document summarizes the design of a low bitrate modulator using FPGA for satellite applications. It describes:
1) Modeling a BPSK modem using System Generator in MATLAB, including modulator, channel, and demodulator blocks.
2) Designing and simulating the individual blocks of a BPSK modulator in VHDL, and implementing the design on a Spartan 3 FPGA board.
3) Testing the design in ModelSim and verifying it achieves the expected BPSK modulation at a bitrate of 1200 bps for potential use in deep space telemetry or navigation systems.
IRJET-Simulation of Channel-Estimation for Digital Communication System based...IRJET Journal
This document summarizes a simulation of an OFDM digital communication system that uses different modulation techniques. It describes:
1) The OFDM system model that uses techniques like BPSK, QPSK, 16-PSK and 256-PSK modulation to transmit data in the form of a grayscale image file.
2) How the system works, including converting the image to OFDM symbols, transmitting over an AWGN channel, and reconstructing the image at the receiver.
3) The results of simulations comparing different modulation techniques in terms of runtime, bit error rate, and pixel error for varying signal to noise ratios. The simulations show higher order modulations having higher error rates but lower runtimes.
This document describes an FPGA-based design and implementation of an orthogonal frequency division multiplexing (OFDM) transceiver module using VHDL. The key components developed include a serial-to-parallel converter, 4-QAM modulator, 64-point IFFT using a radix-4 butterfly structure, FFT, 4-QAM demodulator, and parallel-to-serial converter. The design utilizes CORDIC algorithms instead of multipliers to improve resource usage. The OFDM transceiver core was implemented and tested on a Xilinx Spartan-3AN FPGA using a loopback configuration.
Field programmable gate array implementation of multiwavelet transform based...IJECEIAES
This article offers an efficient design and implementation of a discrete multiwavelet critical-sampling transform based orthogonal frequency division multiplexing (DMWCST-OFDM) transceiver using field programmable gate array (FPGA) platform. The design uses 16-point discrete multiwavelet critical-sampling transform (DMWCST) and its inverse as main processing modules. All modules were designed using a part of Vivado® Design Suite version (2015.2), which is Xilinx system generator (XSG), and is compatible with MATLAB Simulink version R2013b. The FPGA implementation is carried out on a Zynq (XC7Z020-1CLG484) evaluation board with joint test action group (JTAG) hardware cosimulation. According to the results obtained from the implementation tools, the implemented system is efficient in terms of resource utilization and could support the real-time operations.
BER Performance Improvement for 4 X 4 MIMO Single Carrier FDMA System Using M...IRJET Journal
This document describes a system that aims to improve the bit error rate (BER) performance of 4x4 MIMO single-carrier frequency-division multiple access (SC-FDMA) uplink transmission. It investigates using minimum mean square error (MMSE) equalization at the receiver to better detect MIMO data over Rayleigh fading channels. Simulation results using MATLAB show that the proposed MMSE detection scheme decreases BER as signal-to-noise ratio increases for 16-QAM modulation. The BER performance is also compared to orthogonal frequency-division multiple access (OFDMA) MIMO systems, showing improved results for SC-FDMA.
Comparative study of_digital_modulation (1)Bindia Kumari
This document compares different digital modulation techniques that can be used in orthogonal frequency division multiplexing (OFDM) and WiMAX networks. It simulates BPSK, QPSK, 16-QAM and 64-QAM modulation in MATLAB and measures their performance in terms of bit error rate and throughput. The results show that higher order modulations like 64-QAM provide much higher throughput but also higher bit error rates compared to lower order modulations at a given signal-to-noise ratio. The best configuration balances low bit error rates and high throughput.
Implementation of Algorithms For Multi-Channel Digital Monitoring ReceiverIOSR Journals
Abstract: Monitoring Receivers form an important constituent of the Electronic support. In Monitoring
Receiver we can monitor, demodulate or scan the multiple channels.
In this project, the Implementation of algorithm for multi channel digital monitoring receiver. The
implementation will carry out the channelization by the way of Digital down Converters (DDCs) and Digital
Base band Demodulation. The Intermediate Frequency (IF) at 10.7 MHz will be digitalized using Analog to
Digital Converter (ADC) with sampling frequency 52.5 MHz and further converted to Base band using DDCs.
Virtually all the digital receivers perform channel access using a DDC. The Base band data will be streamed to
the appropriate demodulators. Matlab Simulink will be used to simulate the logic modules before the
implementation. This system will be prototyped on an FPGA based COTS (Commercial-off-the-shelf)
development board. Xilinx System Generator will be used for the implementation of the algorithms.
Keywords: DDC, ADC, Digital Base band demodulation, IF, Monitoring Receiver.
This report discusses the planning Associate in
nursing the implementation of an OFDM system
in several information module schemes like MQPSK,
M-QAM. First, a short introduction is
provided by explaining the background and the
specification of the project. Then the report deals
with the system model, every block of the OFDM
system is represented (IFFT, FFT, Cyclic prefix,
modulation / reception, Channel estimation, bit
error rate). System design is analyzed. The
transmission techniques, further because the
system parameters for transmission and reception
are explained well. Finally, the results are
provided.
This document summarizes the design of a low bitrate modulator using FPGA for satellite applications. It describes:
1) Modeling a BPSK modem using System Generator in MATLAB, including modulator, channel, and demodulator blocks.
2) Designing and simulating the individual blocks of a BPSK modulator in VHDL, and implementing the design on a Spartan 3 FPGA board.
3) Testing the design in ModelSim and verifying it achieves the expected BPSK modulation at a bitrate of 1200 bps for potential use in deep space telemetry or navigation systems.
IRJET- Review of Orthogonal Frequency Division Multiplexing for Wireless ...IRJET Journal
This document provides an overview of Orthogonal Frequency Division Multiplexing (OFDM) for wireless communication. It discusses how OFDM works by splitting a high-rate data stream into multiple lower rate streams that are transmitted simultaneously over different subcarriers. This allows for efficient use of bandwidth and reduces interference. The document reviews the key components of an OFDM system, including serial to parallel conversion, modulation of subcarriers, use of inverse fast Fourier transform and cyclic prefix to maintain orthogonality. It also discusses transmission of an OFDM signal using binary phase-shift keying modulation and recovering the signal at the receiver.
This document discusses implementing security and steganography in 802.11n networks. It proposes hiding information in the cyclic prefix of OFDM symbols. Modifying the cyclic prefix does not require additional bandwidth and increases the potential hidden transmission capacity depending on the modulation scheme. Simulation results show the steganographic system does not increase costs for ordinary users and security is improved by using private keys to randomly select modified symbols.
This document discusses VLSI implementation of orthogonal frequency division multiplexing (OFDM). It provides background on OFDM, explaining that it consists of multiple closely spaced carriers that can achieve high data transmission rates with wide bandwidths. The document outlines the key components of an OFDM transceiver including scrambling, interleaving, constellation mapping, IFFT/FFT processing, and parallel-to-serial conversion. It describes the hardware implementation of these components and advantages of OFDM such as robustness to interference and insensitivity to timing errors.
Performance analysis of DWT based OFDM over FFT based OFDM and implementing o...VLSICS Design
Growth in technology has led to unprecedented demand for high speed architectures for complex signal processing applications. In 4G wireless communication systems, bandwidth is a precious commodity, and service providers are continuously met with the challenge of accommodating more users with in a limited allocated bandwidth. To increase data rate of wireless medium with higher performance, OFDM (orthogonal frequency division multiplexing) is used. Recently DWT (Discrete wavelet transforms) is adopted in place of FFT (Fast Fourier transform) for frequency translation. Modulation schemes such as 16-QAM, 32-QAM, 64-QAM and 128-QAM (Quadrature amplitude modulation) have been used in the developed OFDM system for both DWT and FFT based model. In this paper we propose a DWT-IDWT based OFDM transmitter and receiver that achieve better performance in terms SNR and BER for AWGN channel. It proves all the wavelet families better over the IFFT-FFT implementation. The OFDM model is developed using Simulink, various test cases have been considered to verify its performance. The DWTOFDM using Lifting Scheme architecture is implemented on FPGA optimizing hardware, speed & cost. The wavelet filter used for this is Daubechies (9, 7) with N=2. The RTL code is written in Verilog-HDL and simulated in Modelsim. The design is then synthesized in Xilinx and implemented on Virtex5 FPGA board and the results were validated using ChipScope.
Iaetsd stbc-ofdm downlink baseband receiver for mobile wmanIaetsd Iaetsd
This document discusses a proposed space time block code-orthogonal frequency division multiplexing (STBC-OFDM) downlink baseband receiver for mobile wireless metropolitan area networks (WMANs). The proposed receiver applies STBC-OFDM techniques using two transmit antennas and one receive antenna to provide robust performance in outdoor mobile environments. It includes a simple and robust synchronizer and an accurate but affordable channel estimator to overcome challenges of multipath fading channels. Simulation results show the receiver can achieve a coded bit error rate of less than 10-6 for 16QAM modulation under vehicle speeds of 120 km/hr while supporting up to 27.32 Mb/s of uncoded data transmission. The receiver designed in a 90-nm CMOS
Performance Evaluation of MC-CDMA for Fixed WiMAX with EqualizationIRJET Journal
This document discusses the performance evaluation of MC-CDMA (Multi-Carrier Code Division Multiple Access) for fixed WiMAX systems with equalization. MC-CDMA combines OFDM and CDMA to provide advantages like high data rates and increased number of users. The performance is analyzed using Rayleigh and Rician fading channel models with SUI channel parameters. Bit error rate is used as the performance metric and simulations are done in MATLAB. Fixed WiMAX uses OFDM and supports fixed wireless services, while mobile WiMAX uses OFDMA and supports both fixed and mobile broadband networks. Fading channel models are used to simulate real world channel conditions.
Performance analysis of DWT based OFDM over FFT based OFDM and implementing o...VLSICS Design
Growth in technology has led to unprecedented demand for high speed architectures for complex signal processing applications. In 4G wireless communication systems, bandwidth is a precious commodity, and service providers are continuously met with the challenge of accommodating more users with in a limited allocated bandwidth. To increase data rate of wireless medium with higher performance, OFDM (orthogonal frequency division multiplexing) is used. Recently DWT (Discrete wavelet transforms) is adopted in place of FFT (Fast Fourier transform) for frequency translation. Modulation schemes such as 16-QAM, 32-QAM, 64-QAM and 128-QAM (Quadrature amplitude modulation) have been used in the developed OFDM system for both DWT and FFT based model. In this paper we propose a DWT-IDWT based OFDM transmitter and receiver that achieve better performance in terms SNR and BER for AWGN channel. It proves all the wavelet families better over the IFFT-FFT implementation. The OFDM model is developed using Simulink, various test cases have been considered to verify its performance. The DWTOFDM using Lifting Scheme architecture is implemented on FPGA optimizing hardware, speed & cost. The wavelet filter used for this is Daubechies (9, 7) with N=2. The RTL code is written in Verilog-HDL and simulated in Modelsim. The design is then synthesized in Xilinx and implemented on Virtex5 FPGA board and the results were validated using ChipScope.
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
OFDM synchronization system using wavelet transform for symbol rate detectionTELKOMNIKA JOURNAL
In radio communications, using wavelet signal analysis to recover the symbol rate timing clock of orthogonal frequency-division multiplexing (OFDM) is a new approach that can tolerate signal distortion from intersymbol interference (ISI) and intercarrier interference of encoding digital data on multiple carrier frequencies. Typically, the reception synchronization with wavelet signal analysis in OFDM can improve the performance over the fourier transform-based OFDM. However, a synchronization procedure that is stable against distortion and noise is essential to diminish the symbol synchronization establishment and operation sampling period. In this paper, we propose an OFDM synchronization system and analyze the impact of the wavelet denoise procedure on the OFDM system, which extracts the symbol rate of the OFDM frame. The evaluation results show that the proposed system can optimize the frequency window size to enable an efficient timing and frequency offset estimation with high and stable performance in terms of bit error rate (BER) and Frame Error Rate (FER) especially when the value of EbN0 (a normalized signal-to-noise ratio SNR measure) is greater than 8 dB, thanks to the wavelet transform.
On the Performance of Carrier Interferometry OFDM by Wavelet TransformIRJET Journal
This document presents a novel carrier interferometry (CI) spreading code design for orthogonal frequency division multiplexing (OFDM) systems using a wavelet transform instead of a fast Fourier transform (FFT). The proposed wavelet-based CI/OFDM system is simulated over Rayleigh and Rician fading channels and its performance is compared to conventional OFDM and FFT-based CI/OFDM. Simulation results show that the wavelet-based CI codes improve bit error rate performance, being more robust at signal-to-noise ratios above approximately 10 dB for Rician fading and 7 dB for Rayleigh fading compared to FFT-based CI codes. The wavelet transform provides time-frequency localization advantages over the FFT for realizing CI in OF
Software Design of Digital Receiver using FPGAIRJET Journal
This document describes the design and implementation of a digital receiver using an FPGA. It involves sampling an analog signal from a radar target using an ADC at a high sampling rate. This sampled signal is then sent to a digital down converter (DDC) which performs frequency translation and decimation. The DDC is implemented using IP cores on an FPGA. It translates the sampled signal to a lower frequency and outputs I and Q signals at a lower sampling rate. This provides a digital signal with higher precision and stability for extracting information from radar targets.
Performance Analysis of 802.lln MIMO OFDM TransceiverIJERA Editor
The increasing demand on real time application to achieve high throughput, reliable wireless system and network capacity for fourth generation wireless local area networks is to combine MIMO wireless technology with OFDM. Orthogonal Frequency Division Multiplexing (OFDM), which offers reliable high bit rate wireless system with reasonable low complexity. OFDM does provide large data rates with sufficient robustness to radio channel impairments. OFDM is a combination of modulation and multiplexing and are able to maximize spectral efficiency without causing adjacent channel interference. This paper first focuses on 802.11n standard, MIMO-OFDM system. This paper further reviews different work done on implementation of MIMO-OFDM transceiver for 802.11n standard.
A significant problem in Multicarrier Code Division Multiple Access (MC-
CDMA) system is the possibility of high Peak to Average Power Ratio (PAPR). This is due
to the cumulative sum of N subcarrier peaks in the transmitted signals which reduces Power
efficiency, resolution and battery life. In this paper a technique is proposed to make use of
Inverse Discrete Cosine Transform (IDCT) and Inverse Discrete Wavelet Transform
(IDWT) based Multicarrier Code Division Multiple Access (MC-CDMA) system. This
system is in combination with Modified Exponential Companding with Clipping Transform
(MECCT) technique which reduces PAPR and that is analyzed over Additive White
Gaussian Noise (AWGN) channel, Rayleigh and Stanford University Interim (SUI)
multipath fading channel.
IRJET- A Novel Technique for the Transmission of Digital Data through Ban...IRJET Journal
This document presents a novel technique for transmitting digital data through a bandlimited channel using a multi-antenna approach in the presence of channel fading. The technique utilizes multiple input multiple output (MIMO) with 4 antennas at the transmitter and receiver. It implements space shift keying (SSK) to convey data by activating different transmitter antennas, reducing complexity compared to conventional modulation schemes. Experimental results showed the technique can increase data transmission rates while introducing no errors at the receiver over a wireless fading channel.
Evaluation and Design an Efficient Mobile WiMax Architecture Using Coded OFDM...IRJET Journal
This document summarizes a research paper that evaluates the performance of a coded orthogonal frequency-division multiplexing (OFDM) system for mobile WiMAX applications. It models an OFDM system using different trellis coded structures with variable constraint lengths and a 1/2 code rate. It evaluates the performance of the different trellis structures for a coded interleaved OFDM system with variable fast Fourier transform sizes and different modulation orders like BPSK, QPSK, and 4QAM. The paper finds that using trellis encoding significantly improves the bit error rate performance of the system, and that higher constraint lengths like 7 provide better performance at higher signal-to-noise ratios above 12 dB.
This document summarizes a research paper that proposes a modified channel shortener filter (MCSF) to improve the spectral efficiency of OFDM systems. The MCSF exploits the null space of an underdetermined system of equations to provide multiple independent equivalent channels to the receiver. It is shown that the MCSF can achieve a higher spectral efficiency than conventional OFDM when the cyclic prefix length is significantly smaller than the channel delay spread. Simulation results demonstrate that the MCSF improves bit error rate performance and can provide up to 2dB gain compared to full cyclic prefix OFDM systems. The MCSF has the potential to reduce receiver complexity compared to existing channel shortening approaches.
IRJET- A Digital Down Converter on Zynq SoCIRJET Journal
This document describes the design and implementation of a digital down converter (DDC) on a Zynq System on Chip (SoC). Key points:
- The DDC is designed for airborne radar receivers to downconvert high sample rate digitized signals to a lower frequency for easier processing.
- The DDC implementation includes a direct digital synthesizer to generate input signals, complex multiplication for mixing, and a two-stage decimation and filtering process.
- The design is implemented on a Zynq SoC which provides the flexibility of a processor and programmability of an FPGA.
- Results show the DDC design achieves significant improvements in resource utilization compared to a full
IMPLEMENTATION OF A NEW IR-UWB SYSTEM BASED ON M-OAM MODULATION ON FPGA COMPO...ijwmn
This paper presents the implementation ofan Impulse Radio Ultra Wide Band (IR-UWB) communication system based on Orthogonal Amplitude Modulation (OAM) on the FPGA board (Field Programmable Gate Array). The Orthogonal Amplitude Modulationis a new modulation technique that provides a high data rate transmission, using the orthogonal waveforms named MGF (ModifiedGegenbaeur Function).In this work, the FPGA card and the converters DAC(Digital-to-Analog Converter) and ADC (Analog to Digital Converter) are considered to perform the implementation. The system is running in the simulation field
andin the real system on the hardware equipment.The obtained results show that the implementation of UWB-OAM system on FPGA board is running well andprovide a high - real time computations system.
IRJET- Review of Orthogonal Frequency Division Multiplexing for Wireless ...IRJET Journal
This document provides an overview of Orthogonal Frequency Division Multiplexing (OFDM) for wireless communication. It discusses how OFDM works by splitting a high-rate data stream into multiple lower rate streams that are transmitted simultaneously over different subcarriers. This allows for efficient use of bandwidth and reduces interference. The document reviews the key components of an OFDM system, including serial to parallel conversion, modulation of subcarriers, use of inverse fast Fourier transform and cyclic prefix to maintain orthogonality. It also discusses transmission of an OFDM signal using binary phase-shift keying modulation and recovering the signal at the receiver.
This document discusses implementing security and steganography in 802.11n networks. It proposes hiding information in the cyclic prefix of OFDM symbols. Modifying the cyclic prefix does not require additional bandwidth and increases the potential hidden transmission capacity depending on the modulation scheme. Simulation results show the steganographic system does not increase costs for ordinary users and security is improved by using private keys to randomly select modified symbols.
This document discusses VLSI implementation of orthogonal frequency division multiplexing (OFDM). It provides background on OFDM, explaining that it consists of multiple closely spaced carriers that can achieve high data transmission rates with wide bandwidths. The document outlines the key components of an OFDM transceiver including scrambling, interleaving, constellation mapping, IFFT/FFT processing, and parallel-to-serial conversion. It describes the hardware implementation of these components and advantages of OFDM such as robustness to interference and insensitivity to timing errors.
Performance analysis of DWT based OFDM over FFT based OFDM and implementing o...VLSICS Design
Growth in technology has led to unprecedented demand for high speed architectures for complex signal processing applications. In 4G wireless communication systems, bandwidth is a precious commodity, and service providers are continuously met with the challenge of accommodating more users with in a limited allocated bandwidth. To increase data rate of wireless medium with higher performance, OFDM (orthogonal frequency division multiplexing) is used. Recently DWT (Discrete wavelet transforms) is adopted in place of FFT (Fast Fourier transform) for frequency translation. Modulation schemes such as 16-QAM, 32-QAM, 64-QAM and 128-QAM (Quadrature amplitude modulation) have been used in the developed OFDM system for both DWT and FFT based model. In this paper we propose a DWT-IDWT based OFDM transmitter and receiver that achieve better performance in terms SNR and BER for AWGN channel. It proves all the wavelet families better over the IFFT-FFT implementation. The OFDM model is developed using Simulink, various test cases have been considered to verify its performance. The DWTOFDM using Lifting Scheme architecture is implemented on FPGA optimizing hardware, speed & cost. The wavelet filter used for this is Daubechies (9, 7) with N=2. The RTL code is written in Verilog-HDL and simulated in Modelsim. The design is then synthesized in Xilinx and implemented on Virtex5 FPGA board and the results were validated using ChipScope.
Iaetsd stbc-ofdm downlink baseband receiver for mobile wmanIaetsd Iaetsd
This document discusses a proposed space time block code-orthogonal frequency division multiplexing (STBC-OFDM) downlink baseband receiver for mobile wireless metropolitan area networks (WMANs). The proposed receiver applies STBC-OFDM techniques using two transmit antennas and one receive antenna to provide robust performance in outdoor mobile environments. It includes a simple and robust synchronizer and an accurate but affordable channel estimator to overcome challenges of multipath fading channels. Simulation results show the receiver can achieve a coded bit error rate of less than 10-6 for 16QAM modulation under vehicle speeds of 120 km/hr while supporting up to 27.32 Mb/s of uncoded data transmission. The receiver designed in a 90-nm CMOS
Performance Evaluation of MC-CDMA for Fixed WiMAX with EqualizationIRJET Journal
This document discusses the performance evaluation of MC-CDMA (Multi-Carrier Code Division Multiple Access) for fixed WiMAX systems with equalization. MC-CDMA combines OFDM and CDMA to provide advantages like high data rates and increased number of users. The performance is analyzed using Rayleigh and Rician fading channel models with SUI channel parameters. Bit error rate is used as the performance metric and simulations are done in MATLAB. Fixed WiMAX uses OFDM and supports fixed wireless services, while mobile WiMAX uses OFDMA and supports both fixed and mobile broadband networks. Fading channel models are used to simulate real world channel conditions.
Performance analysis of DWT based OFDM over FFT based OFDM and implementing o...VLSICS Design
Growth in technology has led to unprecedented demand for high speed architectures for complex signal processing applications. In 4G wireless communication systems, bandwidth is a precious commodity, and service providers are continuously met with the challenge of accommodating more users with in a limited allocated bandwidth. To increase data rate of wireless medium with higher performance, OFDM (orthogonal frequency division multiplexing) is used. Recently DWT (Discrete wavelet transforms) is adopted in place of FFT (Fast Fourier transform) for frequency translation. Modulation schemes such as 16-QAM, 32-QAM, 64-QAM and 128-QAM (Quadrature amplitude modulation) have been used in the developed OFDM system for both DWT and FFT based model. In this paper we propose a DWT-IDWT based OFDM transmitter and receiver that achieve better performance in terms SNR and BER for AWGN channel. It proves all the wavelet families better over the IFFT-FFT implementation. The OFDM model is developed using Simulink, various test cases have been considered to verify its performance. The DWTOFDM using Lifting Scheme architecture is implemented on FPGA optimizing hardware, speed & cost. The wavelet filter used for this is Daubechies (9, 7) with N=2. The RTL code is written in Verilog-HDL and simulated in Modelsim. The design is then synthesized in Xilinx and implemented on Virtex5 FPGA board and the results were validated using ChipScope.
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
OFDM synchronization system using wavelet transform for symbol rate detectionTELKOMNIKA JOURNAL
In radio communications, using wavelet signal analysis to recover the symbol rate timing clock of orthogonal frequency-division multiplexing (OFDM) is a new approach that can tolerate signal distortion from intersymbol interference (ISI) and intercarrier interference of encoding digital data on multiple carrier frequencies. Typically, the reception synchronization with wavelet signal analysis in OFDM can improve the performance over the fourier transform-based OFDM. However, a synchronization procedure that is stable against distortion and noise is essential to diminish the symbol synchronization establishment and operation sampling period. In this paper, we propose an OFDM synchronization system and analyze the impact of the wavelet denoise procedure on the OFDM system, which extracts the symbol rate of the OFDM frame. The evaluation results show that the proposed system can optimize the frequency window size to enable an efficient timing and frequency offset estimation with high and stable performance in terms of bit error rate (BER) and Frame Error Rate (FER) especially when the value of EbN0 (a normalized signal-to-noise ratio SNR measure) is greater than 8 dB, thanks to the wavelet transform.
On the Performance of Carrier Interferometry OFDM by Wavelet TransformIRJET Journal
This document presents a novel carrier interferometry (CI) spreading code design for orthogonal frequency division multiplexing (OFDM) systems using a wavelet transform instead of a fast Fourier transform (FFT). The proposed wavelet-based CI/OFDM system is simulated over Rayleigh and Rician fading channels and its performance is compared to conventional OFDM and FFT-based CI/OFDM. Simulation results show that the wavelet-based CI codes improve bit error rate performance, being more robust at signal-to-noise ratios above approximately 10 dB for Rician fading and 7 dB for Rayleigh fading compared to FFT-based CI codes. The wavelet transform provides time-frequency localization advantages over the FFT for realizing CI in OF
Software Design of Digital Receiver using FPGAIRJET Journal
This document describes the design and implementation of a digital receiver using an FPGA. It involves sampling an analog signal from a radar target using an ADC at a high sampling rate. This sampled signal is then sent to a digital down converter (DDC) which performs frequency translation and decimation. The DDC is implemented using IP cores on an FPGA. It translates the sampled signal to a lower frequency and outputs I and Q signals at a lower sampling rate. This provides a digital signal with higher precision and stability for extracting information from radar targets.
Performance Analysis of 802.lln MIMO OFDM TransceiverIJERA Editor
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Implementation of SISO-OFDM Transmission using MATLAB on DSP Processor
1. www.ijsetr.com
ISSN 2319-8885
Vol.05,Issue.04,
February-2016,
Pages:0676-0682
Copyright @ 2016 IJSETR. All rights reserved.
Implementationof SISO-OFDM Transmission using MATLAB on DSP Processor
S. V. N. SATTYA KIRAN
1
, S. P. V. SUBBA RAO
2
1
PG Scholar, Dept of ECE, Sreenidhi Institute of Science & Technology, Hyderabad, TS, India, E-mail: svnskiran@gmail.com.
2
Professor, Dept of ECE, Sreenidhi Institute of Science & Technology, Hyderabad, TS, India.
Abstract: The design and deployment of a real-time simplex wireless SISO-OFDM transmission setup on 5GHz employing on
TMS320C6713 DSP Starter Kits (DSKs) as the baseband transmitter and receiver is proposed. The baseband system level design
is done using Matlab/Simulink and the deployment on the TMS320C6713 DSKs is performed by means of IDE link via automatic
code generation directly from Simulink blocks, offering a flexible way from system level design and simulation to actual
implementation and verification. Orthogonal Frequency Division Multiplexing (OFDM) technology has been adopted by a variety
of standards. This technology was chosen due to its robustness at high data rates in a frequency selective multipath channel. In
orthogonal frequency-division multiplexing (OFDM), multiple user symbols are transmitted simultaneously over orthogonal
subcarriers which form an OFDM symbol. Compared to other modulation methods, OFDM symbols have a relatively long time
duration, whereas each subcarrier has a narrow bandwidth. The bandwidth of each subcarrier is small enough to assume a flat(non
selective) fading in a moderately frequency-selective system. These subcarriers have overlap in time and frequency domains,
nonetheless, the signal waveforms are designed to be orthogonal, due to a cyclic extension of each OFDM symbol in the time
domain. A practical implementation involves the inverse fast Fourier transform (IFFT) at the transmitter and the fast Fourier
transform (FFT) at the receiver. The narrowband nature of subcarriers makes the signal robust against frequency selectivity
caused by a multipath delay spread. However, OFDM is relatively sensitive to its dual, namely, time selectivity, which is due to
rapid time variations. Time variations corrupt the orthogonality of the OFDM subcarrier waveforms so that inter carrier
interference (ICI) occurs. Orthogonal frequency division multiplexing (OFDM) techniques has widely been considered to be a
very promising strategy to enhance data rate, capacity, and quality for broadband wireless systems.
Keywords: SISO-OFDM, MATLAB, Simulink ,Code Composer Studio(CCS), DSP Processor, FFT,IDFT.
I. INTRODUCTION
The rapid growths in telecommunication market in the last
decades are in need of new techniques that can provide high
data rates. Wireless communications has seen enormous
growth in the past few years. Wideband wireless OFDM
communication systems are much popular because of their
high spectral efficiency and the capability of OFDM to
transmit high data rates over Broadband radio channels with
frequency selective fading. Such systems are also popular due
to the inherent error robustness in a multipath environment
and hence has been chosen for several next generation
broadband wireless local area network (WLAN) standards
like IEEE802.11a,IEEE802.11g,and European HIPERLAN/2,
and terrestrial digital audio broadcasting (DAB) and digital
video broadcasting (DVB-T).OFDM is a special case of
multicarrier data transmission technique in which a single
data stream is transmitted over multiple subcarriers of narrow
bands. The subcarriers are closely spaced and are modulated
with low data rates. These subcarriers are orthogonal to each
other. Due to rapid increase in the transistor density, it is
better to keep the functionality completely in a programmable
Digital Signal Processor (DSP) which allows for much faster
changes and upgrades. OFDM needs to compute several
hundred or thousand points of Fast Fourier Transforms (FFT)
within a few tens of microseconds in order to achieve high
speed data transmission in narrow bands. Initially
TMS320C5402 DSP Starter Kit (DSK5402) was used as the
combination of C and Assembly programming languages.
After that the main programming language was assembly.
Since the assembly programming is very difficult, ready to
use assembly code segments are required. So instead of
working on C or Assembly languages, it is better to work with
Matlab and Simulink. First, the use of Simulink enables the
creation of models from the Simulink’s large collection of
pre-written block-sets and then the C code is generated with
the help of Real Time Workshop and Embedded Target for TI
C6000 DSP. Here, both Matlab and Simulink are effectively
used to develop an OFDM system including transmitter and
receiver. The complete OFDM system is simulated in the
Simulink environment, which can then be downloaded on to a
DSP processor. OFDM is leading the engineers into a new era
of digital transmission and is becoming the chosen
modulation technique worldwide.
II. IMPLEMENTATION
Here, the signal processing is description that is we will
begin with a concept of what should be programmed. The
next step is to model the concept with blocks from Simulink’s
large collection of prewritten block sets. Basically, a block
2. S. V. N. SATTYA KIRAN, S. P. V. SUBBA RAO
International Journal of Scientific Engineering and Technology Research
Volume.05, IssueNo.04, February-2016, Pages: 0676-0682
diagram that models the concept is built using Simulink. If a
specific block required is not included in Simulink’s block
sets, we may choose to write the own blocks from scratch
using Matlab. The Simulink uses a block based approach
to algorithm design and implementation. At this point the
design is still not designed to operate on any specifically
hardware. To do that, we are using the C6x Target and Real
Time Workshop to generate (or build) ANSI C code intended
for the TI C6713 DSK. The C6x Target will then
automatically take the generated ANSI C code from the
SIMULINK block diagram. In the next step, the TI CCS tools
such as the compiler, assembler and a linker are used to
compile the specific machine code and load the targeted
machine code to the TI C6713 DSK hardware. The
experienced designer may choose to directly write the ANSI
C code instead of building the SIMULINK model. The Code
Composer Studio communicates with the DSP board through
an USB host interface. The real time processed data can then
be finally observed using an oscilloscope.
III. OFDM SYSTEM USING DSP PRINCIPLES
OFDM is a special case of multicarrier data transmission
technique in which a single data stream is transmitted over
multiple subcarriers of narrow bands. The subcarriers
are closely spaced and are modulated with low data rates.
They are made orthogonal to one another by appropriately
choosing the frequency spacing between them. The
orthogonality allows simultaneous transmission on a lot of
sub-carriers in a tight frequency space without interference
from each other. The block diagram of an OFDM system is
shown in fig.1. The random data generator generates a bit
stream. This data stream is processed using the 16-QAM
modulator to map the data into complex signals. These
symbols are passed to an IFFT block to perform the IFFT
operation and the time domain signals are obtained.
The time domain modulated OFDM symbol from IFFT block
is converted back to a serial stream and a guard interval in the
form of cyclic prefix is added to each OFDM symbol. This
data is now passed through an AWGN channel. The reverse
operation is done at the receiver to obtain the original data
back. That is, the cyclic prefix is removed and processed in
the FFT block and finally passed through demodulator
for data recovery.
Fig.1. Block diagram of OFDM system.
A. Modulation
In the modulation technique, the signal wave is transformed
in order to send it over the communication channel to
minimize the effect of noise. This is done so that the received
data can be demodulated to give back the original data. In an
OFDM system, the high data rate information is divided into
small packets of data which are placed orthogonal to each
other. This is achieved by modulating the data by a desirable
modulation technique such as Quadrature Amplitude
Modulation.
B. Communication Channel
This is an AWGN channel through which the data is
transferred. The noise present in this channel affects the
signal and causes distortion in its data content.
C. Demodulation
Demodulation is the technique by which the original data is
recovered from the modulated signal which is received at the
receiver end. Here, the received data is first passed through a
low pass filter and the Guard Interval is removed. After the
data is converted back to parallel stream, the FFT operation is
performed. A demodulator is used to get back the original
signal. By considering the un modulated signal data and the
data at the receiving end, the bit error rate and the signal to
noise ratio is calculated. This is achieved by de modulating
the data by a desirable modulation technique such as
Quadrature de amplitude modulation.
IV. OFDM SIMULATION
The OFDM model has been developed in Simulink using
16- level QAM as shown in Fig.2. The blocks included in
this model are random integer generator, Integer to Bit
Converter, Bit to integer converter, general 16 level QAM
modulator, selecting rows and obtaining complex conjugate,
IFFT(Inverse Fast Fourier Transform), FFT (Fast Fourier
Transform frame status Conversion general 16 Level De-
Modulator And a time scope to observe the simulation results.
Fig.2. Simulink model of a complete OFDM system.
3. Implementationof SISO-OFDM Transmissionusing MATLAB on DSP Processor
International Journal of Scientific Engineering and Technology Research
Volume.05, IssueNo.04, February-2016, Pages: 0676-0682
V. DIGITAL SIGNAL PROCESSING
DSP is one of the fastest growing fields of technology and
computer science in the world. In today's world almost
everyone uses DSPs in their everyday life but, unlike
PCusers, almost no one knows that he/she is using DSPs.
DSPs are special purpose microprocessors used in all kind of
electronic products, from mobile phones, modems and CD
players to the automotive industry; medical imaging systems
to the electronic battlefield and from dish washers to
satellites. There are many reasons why we process these
analog signals in the digital world. Traditional signal
processing was achieved by using analogue components such
as resistors, capacitors and inductors. However, the inherent
tolerance associated with these components, temperature and
voltage changes and mechanical vibrations can dramatically
affect the effectiveness of analogue circuitry. On the other
hand, DSP is inherently stable, reliable and repeatable. With
DSP it is easy to chance, correct or updates applications.
Additionally, DSP reduces noise susceptibility, chip count,
development time, cost and power consumption.
A. TMS320C6713 DSP Description
The TMS320C67 DSPs (including the TMS320C6713
device) compose the floating point DSP generation in the
TMS320C6000 DSP platform. The TMS320C6713 (C6713)
device is based on the high-performance, Very Long
Instruction Word (VLIW) architecture developed by Texas
Instruments, making this DSP an excellent choice for
multichannel and multifunction applications. The features of
the C6713, 225 MHz device delivering up to1800 MIPs. This
DSP generation is designed for applications that require high
precision accuracy. The C6713 is based on the
TMS320C6000 DSP platform designed to fit the needs of
high-performing high- precision applications such as pro-
audio, medical and diagnostic.
Fig.3. TMS320C6713 board architecture.
Other hardware features of the C6713 board include:
Embedded JTAG support via USB.
High-quality 24-bit stereo codec.
Four 3.5mm audio jacks for microphone, line in,
speaker and line out.
512K words of Flash and 8 MB SDRAM.
Expansion port connector for plug-in modules.
On-board standard IEEE JTAG interface.
+5V universal power supply.
The DSP environment used in this paper is the C6713. Fig.3
shows the architecture of the C6713.
B. DSP Implementation
In the past, the small systems implemented on DSP by
writing its algorithm by C/C++ or assembly, using a text
programming languages in writing, but long and complicated
algorithms makes the process exhaustive and difficult to
debug, modify, and learn. The following sections describe the
simulation and implementation of OFDM transceiver with on
a DSP platform through a graphical programming language,
which is SIMULINK. This makes every part in the system
architecture very clear and easier to understand, follow,
modify and debug.
VI. DSP SOFTWARE IMPLEMENTATION
In, the C6713 board, like a personal computer, needs to
load software to establish its behaviour and function. This
software’s can be designed in a variety of approaches. The
designer will begin with a concept of what they want to
program. The next step is to model the concept with blocks
from Simulink’s large collection of pre written block sets.
Basically, a block diagram that models the concept is built
using Simulink as shown in Fig.4. If a specific block
required is not included in Simulink’s block sets, the
designer may choose to write their own blocks from
scratch using MATLAB. At this At this point the design is
still not designed to operate on any specified hardware. To do
that, the designer uses the C6x Target and RTW to generate
(or build) ANSI C code intended for the C6713. The C6x
Target will then automatically take the generated ANSI C
code and uses the Code Composer Studio (CCS) tools to
compile specific machine code and finally loads the targeted
machine code to the C6713 hardware. For the experienced
designer, they may choose to directly write the ANSI C code.
Fig.4. Software design flow.
4. S. V. N. SATTYA KIRAN, S. P. V. SUBBA RAO
International Journal of Scientific Engineering and Technology Research
Volume.05, IssueNo.04, February-2016, Pages: 0676-0682
A. Simulation Model
OFDM transmitter with variable symbol timing and carrier
frequency error is designed. The model implements a 64
carrier OFDM waveform with a 16 point cyclic prefix. The
OFDM symbol has 16 pilots, and uses 4 Quadrature
Amplitude (QAM) for the 48 remaining data streams. Once
the implementation of the model in SIMULINK is achieved,
and already tested that it works properly, the next step is
targeting the model on the DSP board. In this paper, the
implementation of the model on a TMS320C6713 DSP board
from Texas Instrument is carried out. Having the
implementation of the model in Simulink and after testing that
this is working properly, the next step is targeting the model
on the DSP board. For accomplishing this assignment, the
following tools have been used:
Code Composer Studio v 3.1
Embedded Target for TI c6000 DSP
B. The Code Composer Studio
CCS is the necessary software support tools, which provides
an integrated development environment (IDE), bringing
together the C compiler, assembler, linker, debugger, and so
on. It has graphical capabilities and supports real-time
debugging. It provides an easy-to-use software tool to build
and debug programs. The C compiler compiles a C source
program to produce an assembly source file. The assembler
assembles the source file to produce a machine language
object file, combines object files and object libraries as input
to produce an executable file by the linker with extension
".out". This executable file can be loaded and run directly on
the C6713 processor.
C. Real-Time Data Exchange
DSP programs can be transfer data between the DSP device
and a host computer without affecting the DSP application
using RTDX. There are components on the DSP device
(target) and the host computer that allow this communication
to happen. Real-Time Data Exchange (RTDX) provides real-
time, continuous visibility into the way target applications
operate in the real world. RTDX allows system developers to
transfer data between target devices and a host without
interfering with the target application. Key statistics and
performance can be monitored in real time. Through the Joint
Team Action Group (JTAG), communication with on-chip
emulation support occurs to control and monitor program
execution. The C6713 DSK board includes a JTAG interface
through the USB port.
D. Target for c6000 DSP
Embedded Target for the TMS320C6000 DSP Platform
integrates Simulink® and MATLAB®with Texas Instruments
eXpressDSP™ tools. The software collection lets you
develop and validate digital signal processing designs from
concept through code. The Embedded Target for C6000
DSP consists of the C6000 target that automates rapid
prototyping on your C6000 hardware targets. The target uses
C code generated by Real-Time Workshop® and your
development tools to build an executable file for your targeted
processor. The Real-Time Workshop build process loads the
targeted machine code to your board and runs the executable
file on the digital signal processor. Using the Embedded
Target for C6000 DSP and Real-Time Workshop, you can
create executable code for the following boards:
C6416 DSP from Texas Instruments
C6701 Evaluation Module from Texas Instruments
C6711 DSP from Texas Instruments
C6713 DSP from Texas Instruments (board used in this
paper work)
TMDX326040. A daughter card for the C6711 DSK
VII. DEPLOYMENT AND EXPERIMENTAL
DEMONSTRATION
The Simulink models for the transmitter and receiver are
hierarchically organized into subsystems. That is, processes
such as modulation, synchronization, estimation, sampling
clock offset estimation etc., are organized into discrete
modules. Hence, a clear intuitive link between theory and
practice is illustrated. As mentioned, implementation is done
at the TMS320C6713 DSK, through automatic code
generation from these Simulink modules. The TMS320C6713
DSK board revision C, serves as a hardware reference design
for the TMS320C6713 Digital Signal Processor (DSP) . The
DSP is a 32 bit floating-point processor operating at 225MHz.
The board has 8MB of synchronous DRAM and 512KB of
non-volatile Flash memory. The board ships with an
embedded AIC23 stereo codec with sampling frequencies up
to 96 KHz. In this work, we use a sampling frequency of
48 KHz. The first 10 subcarriers(1875Hz) are set to null
(unused) due to codec, mixer and amplifier bandwidths.
Technical specifications are shown in Table 1. Also, to reduce
the Codec’s frame rate, blocks symbols are transmitted/
received and then un-buffered so as processing to be
performed over single transmission symbols.
TABLE I: DSP Parameters
VIII. SIMULATION AND DSP BOARD RESULTS
The simulation and DSP results are taken for CFO=0 Hz,
20 Hz, 100 Hz, 300 Hz, 500 Hz, while STO = 0 sample, 1
sample, 4 samples and SNR=10 dB. Then the Bit Error Rate
(BER) and Mean Square Error (MSE) are plotted against
SNR.
5. Implementationof SISO-OFDM Transmissionusing MATLAB on DSP Processor
International Journal of Scientific Engineering and Technology Research
Volume.05, IssueNo.04, February-2016, Pages: 0676-0682
A. Symbol Timing Offset and Carrier Frequency Offset
Effect
These are some of simulation and DSP cases results as
shown in Figs.5 to 13.
Case 1: There is no timing and frequency error CFO = 0,
STO= 0, Channel = No Noise
(a)Data(MATLAB)
(b)Data(C6713)
Fig.5. MATLAB and DSP data Constellation provided
CFO = 0, STO = 0 and No Noise.
Case 2: In this case STO =1 sample, CFO=0 and Channel
=No Noise.
(a) Data (MATLAB)
(b)Data (C6713)
Fig.6. MATLAB and DSP data Constellation provided
CFO = 0, STO = 1 sample and No Noise.
Case 3: In this case STO = 0, CFO = 100 Hz, and
Channel=No Noise.
(a)Data (MATLAB)
(b) Data (C6713)
Fig.7. MATLAB and DSP data Constellation provided
CFO=20 Hz, STO = 0 and Channel = No Noise.
6. S. V. N. SATTYA KIRAN, S. P. V. SUBBA RAO
International Journal of Scientific Engineering and Technology Research
Volume.05, IssueNo.04, February-2016, Pages: 0676-0682
Case4: In this case STO=0, CFO=100Hz and Channel
=AWGN SNR = 10.
(a) Data (MATLAB)
(b) Data (C6713)
Fig.8.MATLAB and DSP data Constellation provided
CFO = 100 Hz, STO = 0 and Channel = AWGN SNR = 10.
After simulate the model on different values of STO and
CFO and use Monte Carlo Simulink, plot the Bit Error Rate
and SNR relation for these different values.
Fig.9. Illustrates the Effect of Symbol Timing Offset.
Fig.10. Illustrates the Effect of Carrier Frequency Offset.
From MATLAB results, the Mean Square Error with respect
to SNR for different values of STO and CFO had been plotted
after record the input data and the output data, calculate the
mean square error for these results. Fig.11 and Fig.12
illustrate the effect of timing and frequency offsets.
Fig.11. Illustrates the Effect of Symbol Timing Offset.
Fig.12. Illustrates the Effect of Carrier Frequency Offset.
7. Implementationof SISO-OFDM Transmissionusing MATLAB on DSP Processor
International Journal of Scientific Engineering and Technology Research
Volume.05, IssueNo.04, February-2016, Pages: 0676-0682
Fig.13. Code Composer Studio and hardware set up with
DSK 6713.
IX. CONCLUSION
Real time broadcast-like SISO-OFDM wireless transmission
on 5GHz employing TMS320C6713 DSP boards was
demonstrated. Baseband design was based on Simulink and
deployment was done on the C6713 DSP’s via automatic code
generation. Experimental measurements confirmed the
system’s specifications and typical results verified its
functionality and showed its potential for demonstrating
contemporary wireless communication concepts to students.
Thus the purpose of this simulator has achieved. It makes the
study of OFDM processing very easy.
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