The Intel 8086 microprocessor

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The Intel 8086 - architecture - MN/MX modes

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The Intel 8086 microprocessor

  1. 1. 8086 Microprocessor
  2. 2. Architecture of 8086 • The architecture of 8086 includes – Arithmetic Logic Unit (ALU) – Flags – General registers – Instruction byte queue – Segment registers
  3. 3. EU & BIU • The 8086 CPU logic has been partitioned into two functional units namely Bus Interface Unit (BIU) and Execution Unit (EU) • The major reason for this separation is to increase the processing speed of the processor • The BIU has to interact with memory and input and output devices in fetching the instructions and data required by the EU • EU is responsible for executing the instructions of the programs and to carry out the required processing
  4. 4. EU & BIU
  5. 5. BUS INTERFACE UNIT (BU) The BIU performs all bus operations for EU . Fetching instructions Responsible for executing all external bus cycles. Read operands and write result. EXECUTION UNIT (EU) Execution unit contains the complete infrastructure required to execute an instruction
  6. 6. Architecture Diagram
  7. 7. Execution Unit • The Execution Unit (EU) has – Control unit – Instruction decoder – Arithmetic and Logical Unit (ALU) – General registers – Flag register – Pointers – Index registers
  8. 8. Execution Unit • Control unit is responsible for the co-ordination of all other units of the processor • ALU performs various arithmetic and logical operations over the data • The instruction decoder translates the instructions fetched from the memory into a series of actions that are carried out by the EU
  9. 9. Execution Unit - Registers • General registers are used for temporary storage and manipulation of data and instructions • Accumulator register consists of two 8-bit registers AL and AH, which can be combined together and used as a 16-bit register AX • Accumulator can be used for I/O operations and string manipulation
  10. 10. Execution Unit - Registers • Base register consists of two 8-bit registers BL and BH, which can be combined together and used as a 16-bit register BX • BX register usually contains a data pointer used for based, based indexed or register indirect addressing. Similar to 8085 H-L register. • Count register consists of two 8-bit registers CL and CH, which can be combined together and used as a 16-bit register CX • Count register can be used as a counter in string manipulation and shift/rotate instructions
  11. 11. Execution Unit - Registers • Data register consists of two 8-bit registers DL and DH, which can be combined together and used as a 16-bit register DX • Data register can be used to hold 16 bit result in 16 in 16x16 multiplication.
  12. 12. Execution Unit - Registers Pointer Registers Stack pointer and BP are used to access data in the stack segment. SP is used as an offset from the current SS during execution of instructions that involve the stack segment in external memory. BP is used in based addressing mode.
  13. 13. Execution Unit - Registers Index Register Source index register (SI) and Destination Index Registers are used in indexed addressing.
  14. 14. Execution Unit - Registers
  15. 15. Execution Unit - Flags
  16. 16. Execution Unit - Flags • Overflow Flag (OF) - set if the size of the exceeds the capacity of the destination location. • Direction Flag (DF) – It is used with string operations. When set , it causing string instructions to auto – decrement or to process strings from right to left. • Interrupt-enable Flag (IF) - setting this bit enables maskable interrupts . When IF = 0 , all maskable interrupt are disable. • Single-step Flag (Trap F) – put 8086 in the single step mode.
  17. 17. Execution Unit - Flags • Sign Flag (SF) - set if the most significant bit of the result is one. • Zero Flag (ZF) - set if the result is zero. • Auxiliary carry Flag (AF) - set if there was a carry from or borrow to bits 0-3 in the AL register. • Parity Flag (PF) - set if parity (the number of "1" bits) in the low-order byte of the result is even. • Carry Flag (CF) - set if there was a carry from or borrow to the most significant bit during last result calculation
  18. 18. Execution Unit - Flags
  19. 19. Execution Unit - Pointers • Stack Pointer (SP) is a 16-bit register pointing to program stack • Base Pointer (BP) is a 16-bit register pointing to data in stack segment. BP register is usually used for based, based indexed or register indirect addressing. • Source Index (SI) is a 16-bit register. SI is used for indexed, based indexed and register indirect addressing, as well as a source data addresses in string manipulation instructions. • Destination Index (DI) is a 16-bit register. DI is used for indexed, based indexed and register indirect addressing, as well as a destination data addresses in string manipulation instructions.
  20. 20. Execution Unit - Pointers
  21. 21. Bus Interface Unit • The BIU has – Instruction stream byte queue – A set of segment registers – Instruction pointer
  22. 22. BIU – Instruction Byte Queue • 8086 instructions vary from 1 to 6 bytes • Therefore fetch and execution are taking place concurrently in order to improve the performance of the microprocessor • The BIU feeds the instruction stream to the execution unit through a 6 byte prefetch queue
  23. 23. BIU – Instruction Byte Queue • Execution and decoding of certain instructions do not require the use of buses • While such instructions are executed, the BIU fetches up to six instruction bytes for the following instructions (the subsequent instructions) • The BIU store these prefetched bytes in a first-in-first out register by name instruction byte queue • When the EU is ready for its next instruction, it simply reads the instruction byte(s) for the instruction from the queue in BIU
  24. 24. Segment: Offset Notation • The total addressable memory size is 1MB • Most of the processor instructions use 16-bit pointers the processor can effectively address only 64 KB of memory • To access memory outside of 64 KB the CPU uses special segment registers to specify where the code, stack and data 64 KB segments are positioned within 1 MB of memory
  25. 25. Segment: Offset Notation • A simple scheme would be to order the bytes in a serial fashion and number them from 0 (or 1) to the end of memory • The scheme used in the 8086 is called segmentation • Every address has two parts, a SEGMENT and an OFFSET (Segmnet:Offset ) • The segment indicates the starting of a 64 kilobyte portion of memory, in multiples of 16 • The offset indicates the position within the 64k portion • Absolute address = (segment * 16) + offset
  26. 26. Segment Registers • The memory of 8086 is divided into 4 segments namely – Code segment (program memory) – Data segment (data memory) – Stack memory (stack segment) – Extra memory (extra segment)
  27. 27. Different Areas in Memory • Program memory – Program can be located anywhere in memory • Data memory – The processor can access data in any one out of 4 available segments • Stack memory – A stack is a section of the memory set aside to store addresses and data while a subprogram executes • Extra segment – This segment is also similar to data memory where additional data may be stored and maintained
  28. 28. Segment Registers • Code Segment (CS) register is a 16-bit register containing address of 64 KB segment with processor instructions • The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register • Stack Segment (SS) register is a 16-bit register containing address of 64KB segment with program stack • By default, the processor assumes that all data referenced by the stack pointer (SP) and base pointer (BP) registers is located in the stack segment
  29. 29. Segment Registers • Data Segment (DS) register is a 16-bit register containing address of 64KB segment with program data • By default, the processor assumes that all data referenced by general registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment • Extra Segment (ES) register is a 16-bit register containing address of 64KB segment, usually with program data • By default, the processor assumes that the DI register references the ES segment in string manipulation instructions
  30. 30. Segment Registers If a location 109F0 of Code Segment is to be addressed to fetch An instruction, the physical address will be calculated as follows CSR = 010A IP = F950 Effective Address = 109F0
  31. 31. Minimum-Mode and Maximum- Mode System
  32. 32. Minimum-Mode and Maximum- Mode System (cont.) Signals common to both minimum and maximum mode
  33. 33. Minimum-Mode and Maximum- Mode System (cont.) Unique minimum-mode signals
  34. 34. Minimum-Mode and Maximum- Mode System (cont.) Unique maximum-mode signals
  35. 35. PIN DESCRIPTION -8086 Pin 1, 20 Ground Pin 40 Vcc Pin 19 CLK Pin 17 INTR Pin 18 NMI
  36. 36. AD15 –AD0 [ Pin 2- 16 &39] The signal have dual function as in case of the 8085. They act as bus during the first part of machine cycle and as data bus in the later part. A19/S6 –A16/S3 [Pin 35- 38] Contains address information in the first part and status bits in the later part. The status bits, when decoded, indicates the type of operations (eg. Memory access) being performed and the segment register being used. S4 S3 SEGMENT REGISTER 0 0 ES 0 1 SS 1 0 CS 1 1 DS S5 = IF S6 = 0 (ALWAYS)
  37. 37. BHE/S7 [pin 34] MN/MX [pin 33] High – Minimum Mode Operation Low – Maximum Mode Operation RD [pin 32] Read or receive data from M or I/O device TEST [pin 23] Relate to wait instruction. The instruction puts the 8086 in idle state which ends only when the TEST input goes low
  38. 38. READY [Pin 22] Ready is a signal provided by the memory or I/O devices to the microprocesssor.When READY = High, the microprocessor proceeds to process the data in usual manner. When READY = Low, the micropressor goes into wait state and waits for READY to become High. RESET [Pin 21] Resets the Processor
  39. 39. ……….PIN DESCRIPTION DEN Data bus Enable. This signal, when low indicates that the microprocessor address/data bus is to be used as data bus. HOLD HLDA
  40. 40. Minimum Mode pin Functions Pin 24 -31 INTA - Pin 24 ALE - Pin 25 Address Latch Enable. Since data and address are multiplexed on a single bus. ALE is output high to identify a valid address. DEN -Pin 26 Data Bus Enable. This signal, when low indicates that the microprocessor address/data bus is to be used as data bus.
  41. 41. DT/R - Pin 27 Data transmission/ Receive M/ IO – Pin 28 WR – Pin 29 HOLD – Pin 30 HLDA - Pin 31
  42. 42. Addressing Modes • Implied Addressing – The data value/data address is implicitly associated with the instruction • Register Addressing – The data is specified by referring the register or the register pair in which the data is present • Immediate Addressing – The data itself is provided in the instruction • Direct Addressing – The instruction operand specifies the memory address where data is located
  43. 43. Addressing Modes • Register indirect addressing – The instruction specifies a register containing an address, where data is located • Based - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP), the resulting value is a pointer to location where data resides • Indexed - 8-bit or 16-bit instruction operand is added to the contents of an index register (SI or DI), the resulting value is a pointer to location where data resides
  44. 44. Addressing Modes • Based Indexed - the contents of a base register (BX or BP) is added to the contents of an index register (SI or DI), the resulting value is a pointer to location where data resides • Based Indexed with displacement - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP) and index register (SI or DI), the resulting value is a pointer to location where data resides
  45. 45. Data Transfer Instructions
  46. 46. Data Transfer Instructions
  47. 47. Arithmetic Instructions
  48. 48. Arithmetic Instructions
  49. 49. Number Representation
  50. 50. Logical Instructions
  51. 51. String Instructions
  52. 52. Program Transfer Instructions
  53. 53. Program Transfer Instructions
  54. 54. Processor Control Instructions
  55. 55. Assembler Directives • Assembler directives give instruction to the assembler where as other instructions discussed in the above section give instruction to the 8086 microprocessor • Assembler directives are specific for a particular assembler • However all the popular assemblers like the Intel 8086 macro assembler, the turbo assembler and the IBM macro assembler use common assembler directives
  56. 56. Important Directives • The ASSUME directive tell the assembler the name of the logical segment it should use for a specified segment • The DB directive is used to declare a byte-type variable or to set aside one or more storage locations of type byte in memory (Define Byte) • The DD directive is used to declare a variable of type doubleword or to reserve memory locations which can be accessed as type doubleword (Define Doubleword) • The DQ directive is used to tell the assembler to declare a variable 4 words in length or to reverse 4 words of storage in memory (Define Quadword)
  57. 57. Important Directives • The ENDS directive is used with the name of a segment to indicate the end of that logical segment • The EQU is used to give a name to some value or symbol
  58. 58. Assembly Language Program • Writing assembly language programs for 8086 is slightly different from that of writing assembly language programs for 8085 • In addition to the instructions that are meant for solving the problem, some additional instructions are required to complete the programs • The purpose of these additional programs is to initialize various parts of the system, such as segment registers, flags and programmable port devices • Some of the instructions are to handle the stack of the 8086 based system
  59. 59. Assembly Language Program • Another purpose of these additional instructions is to handle the programmable peripheral devices such as ports, timers and controllers • The programmable peripheral interfaces should be assigned suitable control words to make them to function in the way as we expect • The best way to approach the initialization task is to make a checklist of all the registers, programmable devices and flags in the system we are working on
  60. 60. Assembly Language Program • An 8086 assembly language program has five columns namely – Address – Data or code – Labels – Mmnemonics – Operands – Comments
  61. 61. Assembly Language Program • The address column is used for the address or the offset of a code byte or a data byte • The actual code bytes or data bytes are put in the data or code column • A label is a name which represents an address referred to in a jump or call instruction • Labels are put in the labels column
  62. 62. Assembly Language Program • The operands column contains the registers, memory locations or data acted upon by the instructions • A comments column gives space to describe the function of the instruction for future reference

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